N25Q128 driver files renamed for consistency.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@9466 35acf78f-673a-0410-8e92-d51de3d6d3f4
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@ -18,16 +18,16 @@
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*/
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*/
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/**
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/**
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* @file n25q128.c
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* @file n25q128_spi.c
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* @brief N25Q128 flash interface module code.
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* @brief N25Q128 over SPI driver code.
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*
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*
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* @addtogroup n25q128
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* @addtogroup n25q128_spi
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* @{
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* @{
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*/
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*/
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#include "hal.h"
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#include "hal.h"
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#include "n25q128.h"
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#include "n25q128_spi.h"
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver local definitions. */
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/* Driver local definitions. */
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@ -18,9 +18,10 @@
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*/
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*/
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/**
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/**
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* @file n25q128.h
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* @file n25q128_spi.h
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* @brief N25Q128 flash interface module header.
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* @brief N25Q128 over SPI driver header.
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*
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*
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* @addtogroup n25q128_spi
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* @{
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* @{
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*/
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*/
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@ -1,6 +1,6 @@
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# List of all the N25Q128 device files.
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# List of all the N25Q128 device files.
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N25Q128SRC := $(CHIBIOS)/os/hal/lib/peripherals/flash/hal_flash.c \
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N25Q128SRC := $(CHIBIOS)/os/hal/lib/peripherals/flash/hal_flash.c \
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$(CHIBIOS)/os/ex/Micron/n25q128.c
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$(CHIBIOS)/os/ex/Micron/n25q128_spi.c
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# Required include directories
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# Required include directories
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N25Q128INC := $(CHIBIOS)/os/hal/lib/peripherals/flash \
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N25Q128INC := $(CHIBIOS)/os/hal/lib/peripherals/flash \
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@ -98,7 +98,7 @@ include $(CHIBIOS)/os/hal/osal/rt/osal.mk
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include $(CHIBIOS)/os/rt/rt.mk
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include $(CHIBIOS)/os/rt/rt.mk
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include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/port_v7m.mk
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include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/port_v7m.mk
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# Other files (optional).
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# Other files (optional).
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include $(CHIBIOS)/os/ex/Micron/n25q128.mk
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include $(CHIBIOS)/os/ex/Micron/n25q128_spi.mk
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include $(CHIBIOS)/os/ex/subsystems/mfs/mfs.mk
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include $(CHIBIOS)/os/ex/subsystems/mfs/mfs.mk
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# Define linker script file here
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# Define linker script file here
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@ -17,7 +17,7 @@
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#include "ch.h"
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#include "ch.h"
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#include "hal.h"
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#include "hal.h"
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#include "n25q128.h"
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#include "n25q128_spi.h"
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/*
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/*
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* Maximum speed SPI configuration (18MHz, CPHA=0, CPOL=0, MSb first).
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* Maximum speed SPI configuration (18MHz, CPHA=0, CPOL=0, MSb first).
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