From c6b3961857d6b3a88948173eaf34f41895d2c31d Mon Sep 17 00:00:00 2001 From: Giovanni Di Sirio Date: Tue, 25 May 2021 09:20:12 +0000 Subject: [PATCH] - NEW: STM32 improved ADCv4 driver (H7) back-ported from trunk. - NEW: New "VT Storm" test application for RT. - NEW: More efficient virtual timers implementation for RT, it has been back-ported from RT7. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/stable_20.3.x@14430 27425a3e-05d8-49a3-a47f-9c15f0e5edd8 --- .../cfg/mcuconf.h | 2 +- .../RT-STM32H755ZI-NUCLEO144/cfg/mcuconf.h | 2 +- os/hal/ports/STM32/LLD/ADCv4/hal_adc_lld.c | 129 +-- os/hal/ports/STM32/LLD/ADCv4/hal_adc_lld.h | 91 ++- os/rt/src/chvt.c | 519 +++++++----- readme.txt | 4 + .../ADC/cfg/stm32h743zi_nucleo144/mcuconf.h | 2 +- .../DAC/cfg/stm32h743_nucleo144/mcuconf.h | 2 +- .../SPI/cfg/stm32h743_nucleo144/mcuconf.h | 2 +- .../SPI/cfg/stm32h755_nucleo144/mcuconf.h | 2 +- .../USB_CDC/cfg/stm32h743_nucleo144/mcuconf.h | 2 +- testrt/VT_STORM/.cproject | 130 +++ testrt/VT_STORM/.project | 91 +++ testrt/VT_STORM/Makefile | 18 + .../cfg/stm32g474re_nucleo64/chconf.h | 756 ++++++++++++++++++ .../cfg/stm32g474re_nucleo64/halconf.h | 531 ++++++++++++ .../cfg/stm32g474re_nucleo64/mcuconf.h | 387 +++++++++ .../cfg/stm32g474re_nucleo64/portab.c | 67 ++ .../cfg/stm32g474re_nucleo64/portab.h | 77 ++ testrt/VT_STORM/main.c | 49 ++ .../VT_STORM/make/stm32g474re_nucleo64.make | 191 +++++ testrt/VT_STORM/source/vt_storm.c | 281 +++++++ testrt/VT_STORM/source/vt_storm.h | 111 +++ .../conf/mcuconf_stm32h743xx/mcuconf.h.ftl | 2 +- 24 files changed, 3179 insertions(+), 269 deletions(-) create mode 100644 testrt/VT_STORM/.cproject create mode 100644 testrt/VT_STORM/.project create mode 100644 testrt/VT_STORM/Makefile create mode 100644 testrt/VT_STORM/cfg/stm32g474re_nucleo64/chconf.h create mode 100644 testrt/VT_STORM/cfg/stm32g474re_nucleo64/halconf.h create mode 100644 testrt/VT_STORM/cfg/stm32g474re_nucleo64/mcuconf.h create mode 100644 testrt/VT_STORM/cfg/stm32g474re_nucleo64/portab.c create mode 100644 testrt/VT_STORM/cfg/stm32g474re_nucleo64/portab.h create mode 100644 testrt/VT_STORM/main.c create mode 100644 testrt/VT_STORM/make/stm32g474re_nucleo64.make create mode 100644 testrt/VT_STORM/source/vt_storm.c create mode 100644 testrt/VT_STORM/source/vt_storm.h diff --git a/demos/STM32/RT-STM32H743ZI_REV_XY-NUCLEO144/cfg/mcuconf.h b/demos/STM32/RT-STM32H743ZI_REV_XY-NUCLEO144/cfg/mcuconf.h index 86e929cda..f8bd58d26 100644 --- a/demos/STM32/RT-STM32H743ZI_REV_XY-NUCLEO144/cfg/mcuconf.h +++ b/demos/STM32/RT-STM32H743ZI_REV_XY-NUCLEO144/cfg/mcuconf.h @@ -224,7 +224,7 @@ * ADC driver system settings. */ #define STM32_ADC_DUAL_MODE FALSE -#define STM32_ADC_COMPACT_SAMPLES FALSE +#define STM32_ADC_SAMPLES_SIZE 16 #define STM32_ADC_USE_ADC12 FALSE #define STM32_ADC_USE_ADC3 FALSE #define STM32_ADC_ADC12_DMA_STREAM STM32_DMA_STREAM_ID_ANY diff --git a/demos/STM32/RT-STM32H755ZI-NUCLEO144/cfg/mcuconf.h b/demos/STM32/RT-STM32H755ZI-NUCLEO144/cfg/mcuconf.h index f78e68693..f167690b3 100644 --- a/demos/STM32/RT-STM32H755ZI-NUCLEO144/cfg/mcuconf.h +++ b/demos/STM32/RT-STM32H755ZI-NUCLEO144/cfg/mcuconf.h @@ -224,7 +224,7 @@ * ADC driver system settings. */ #define STM32_ADC_DUAL_MODE FALSE -#define STM32_ADC_COMPACT_SAMPLES FALSE +#define STM32_ADC_SAMPLES_SIZE 16 #define STM32_ADC_USE_ADC12 FALSE #define STM32_ADC_USE_ADC3 FALSE #define STM32_ADC_ADC12_DMA_STREAM STM32_DMA_STREAM_ID_ANY diff --git a/os/hal/ports/STM32/LLD/ADCv4/hal_adc_lld.c b/os/hal/ports/STM32/LLD/ADCv4/hal_adc_lld.c index af93dd13d..689db85e5 100644 --- a/os/hal/ports/STM32/LLD/ADCv4/hal_adc_lld.c +++ b/os/hal/ports/STM32/LLD/ADCv4/hal_adc_lld.c @@ -31,32 +31,37 @@ /*===========================================================================*/ #if STM32_ADC_DUAL_MODE == TRUE -#if STM32_ADC_COMPACT_SAMPLES == TRUE +#define ADC12_CCR_DUAL ADC_CCR_DUAL_REG_SIMULT +#if STM32_ADC_SAMPLES_SIZE == 8 /* Compact type dual mode, 2x8-bit.*/ #define ADC12_DMA_SIZE (STM32_DMA_CR_MSIZE_HWORD | STM32_DMA_CR_PSIZE_HWORD) #define ADC3_BDMA_SIZE (STM32_BDMA_CR_MSIZE_BYTE | STM32_BDMA_CR_PSIZE_BYTE) #define ADC_DMA_DAMDF ADC_CCR_DAMDF_BYTE -#else /* STM32_ADC_COMPACT_SAMPLES == FALSE */ +#else /* STM32_ADC_SAMPLES_SIZE == 16 */ /* Large type dual mode, 2x16bit.*/ #define ADC12_DMA_SIZE (STM32_DMA_CR_MSIZE_WORD | STM32_DMA_CR_PSIZE_WORD) #define ADC3_BDMA_SIZE (STM32_BDMA_CR_MSIZE_HWORD | STM32_BDMA_CR_PSIZE_HWORD) #define ADC_DMA_DAMDF ADC_CCR_DAMDF_HWORD -#endif /* !STM32_ADC_COMPACT_SAMPLES */ +#endif /* STM32_ADC_SAMPLES_SIZE == 8 */ #else /* STM32_ADC_DUAL_MODE == FALSE */ -#if STM32_ADC_COMPACT_SAMPLES +#define ADC12_CCR_DUAL ADC_CCR_DUAL_INDEPENDENT +#if STM32_ADC_SAMPLES_SIZE == 8 /* Compact type single mode, 8-bit.*/ #define ADC12_DMA_SIZE (STM32_DMA_CR_MSIZE_BYTE | STM32_DMA_CR_PSIZE_BYTE) #define ADC3_BDMA_SIZE (STM32_BDMA_CR_MSIZE_BYTE | STM32_BDMA_CR_PSIZE_BYTE) #define ADC_DMA_DAMDF ADC_CCR_DAMDF_DISABLED - -#else /* STM32_ADC_COMPACT_SAMPLES == FALSE */ +#elif STM32_ADC_SAMPLES_SIZE == 32 +#define ADC12_DMA_SIZE (STM32_DMA_CR_MSIZE_WORD | STM32_DMA_CR_PSIZE_WORD) +#define ADC3_BDMA_SIZE (STM32_BDMA_CR_MSIZE_WORD | STM32_BDMA_CR_PSIZE_WORD) +#define ADC_DMA_DAMDF ADC_CCR_DAMDF_DISABLED +#else /* STM32_ADC_SAMPLES_SIZE == 16 */ /* Large type single mode, 16-bit.*/ #define ADC12_DMA_SIZE (STM32_DMA_CR_MSIZE_HWORD | STM32_DMA_CR_PSIZE_HWORD) #define ADC3_BDMA_SIZE (STM32_BDMA_CR_MSIZE_HWORD | STM32_BDMA_CR_PSIZE_HWORD) #define ADC_DMA_DAMDF ADC_CCR_DAMDF_DISABLED -#endif /* STM32_ADC_COMPACT_SAMPLES == FALSE */ +#endif /* STM32_ADC_SAMPLES_SIZE == 8 */ #endif /* STM32_ADC_DUAL_MODE == FALSE */ /*===========================================================================*/ @@ -138,7 +143,7 @@ static void adc_lld_analog_on(ADCDriver *adcp) { } /** - * @brief Disables the ADC analog circuit. + * @brief Disables the ADC analog circuit. * * @param[in] adcp pointer to the @p ADCDriver object */ @@ -275,24 +280,29 @@ static void adc_lld_serve_interrupt(ADCDriver *adcp, uint32_t isr) { /* It could be a spurious interrupt caused by overflows after DMA disabling, just ignore it in this case.*/ if (adcp->grpp != NULL) { + adcerror_t emask = 0U; + /* Note, an overflow may occur after the conversion ended before the driver is able to stop the ADC, this is why the state is checked too.*/ if ((isr & ADC_ISR_OVR) && (adcp->state == ADC_ACTIVE)) { /* ADC overflow condition, this could happen only if the DMA is unable to read data fast enough.*/ - _adc_isr_error_code(adcp, ADC_ERR_OVERFLOW); + emask |= ADC_ERR_OVERFLOW; } if (isr & ADC_ISR_AWD1) { - /* Analog watchdog error.*/ - _adc_isr_error_code(adcp, ADC_ERR_AWD1); + /* Analog watchdog 1 error.*/ + emask |= ADC_ERR_AWD1; } if (isr & ADC_ISR_AWD2) { - /* Analog watchdog error.*/ - _adc_isr_error_code(adcp, ADC_ERR_AWD2); + /* Analog watchdog 2 error.*/ + emask |= ADC_ERR_AWD2; } if (isr & ADC_ISR_AWD3) { - /* Analog watchdog error.*/ - _adc_isr_error_code(adcp, ADC_ERR_AWD3); + /* Analog watchdog 3 error.*/ + emask |= ADC_ERR_AWD3; + } + if (emask != 0U) { + _adc_isr_error_code(adcp, emask); } } } @@ -312,19 +322,24 @@ OSAL_IRQ_HANDLER(STM32_ADC12_HANDLER) { OSAL_IRQ_PROLOGUE(); + /* Handle ADC1 ISR first in adc_lld_serve_interrupt. */ isr = ADC1->ISR; -#if STM32_ADC_DUAL_MODE - isr |= ADC2->ISR; -#endif ADC1->ISR = isr; -#if STM32_ADC_DUAL_MODE - ADC2->ISR = isr; -#endif #if defined(STM32_ADC_ADC12_IRQ_HOOK) STM32_ADC_ADC12_IRQ_HOOK #endif adc_lld_serve_interrupt(&ADCD1, isr); + /* Handle ADC2 ISR next in adc_lld_serve_interrupt. */ +#if STM32_ADC_DUAL_MODE + isr |= ADC2->ISR; + ADC2->ISR = isr; +#if defined(STM32_ADC_ADC12_IRQ_HOOK) + STM32_ADC_ADC12_IRQ_HOOK +#endif + adc_lld_serve_interrupt(&ADCD1, isr); +#endif + OSAL_IRQ_EPILOGUE(); } #endif /* STM32_ADC_USE_ADC12 == TRUE */ @@ -398,7 +413,7 @@ void adc_lld_init(void) { #if STM32_ADC_USE_ADC12 == TRUE rccEnableADC12(true); rccResetADC12(); - ADC12_COMMON->CCR = STM32_ADC_ADC12_CLOCK_MODE | ADC_DMA_DAMDF; + ADC12_COMMON->CCR = STM32_ADC_ADC12_CLOCK_MODE | ADC_DMA_DAMDF | ADC12_CCR_DUAL; rccDisableADC12(); #endif #if STM32_ADC_USE_ADC3 == TRUE @@ -523,7 +538,7 @@ void adc_lld_stop(ADCDriver *adcp) { adcp->data.dma = NULL; /* Resetting CCR options except default ones.*/ - adcp->adcc->CCR = STM32_ADC_ADC12_CLOCK_MODE | ADC_DMA_DAMDF; + adcp->adcc->CCR = STM32_ADC_ADC12_CLOCK_MODE | ADC_DMA_DAMDF | ADC12_CCR_DUAL; rccDisableADC12(); } #endif @@ -622,25 +637,40 @@ void adc_lld_start_conversion(ADCDriver *adcp) { /* ADC setup, if it is defined a callback for the analog watch dog then it is enabled.*/ + /* clear AWD1..3 flags */ adcp->adcm->ISR = adcp->adcm->ISR; - adcp->adcm->IER = ADC_IER_OVRIE | ADC_IER_AWD1IE; + /* If a callback is set enable the overflow and analog watch dog interrupts. */ + if (grpp->error_cb != NULL) { + adcp->adcm->IER = ADC_IER_OVRIE | ADC_IER_AWD1IE + | ADC_IER_AWD2IE + | ADC_IER_AWD3IE; + } #if STM32_ADC_DUAL_MODE == TRUE && STM32_ADC_USE_ADC12 == TRUE /* Configuration for dual mode ADC12 */ if (&ADCD1 == adcp) { + /* clear AWD1..3 flags */ + adcp->adcs->ISR = adcp->adcs->ISR; + /* If a callback is set enable the overflow and analog watch dog interrupts. */ + if (grpp->error_cb != NULL) { + adcp->adcs->IER = ADC_IER_OVRIE | ADC_IER_AWD1IE + | ADC_IER_AWD2IE + | ADC_IER_AWD3IE; /* Configuring the CCR register with the user-specified settings in the conversion group configuration structure, static settings are preserved.*/ adcp->adcc->CCR = (adcp->adcc->CCR & - (ADC_CCR_CKMODE_MASK | ADC_CCR_DAMDF_MASK)) | ccr; + (ADC_CCR_CKMODE_MASK | ADC_CCR_DAMDF_MASK | ADC_CCR_DUAL_MASK)) | ccr; adcp->adcm->CFGR2 = grpp->cfgr2; adcp->adcm->PCSEL = grpp->pcsel; adcp->adcm->LTR1 = grpp->ltr1; adcp->adcm->HTR1 = grpp->htr1; - adcp->adcm->LTR1 = grpp->ltr2; - adcp->adcm->HTR1 = grpp->htr2; - adcp->adcm->LTR1 = grpp->ltr3; - adcp->adcm->HTR1 = grpp->htr3; + adcp->adcm->LTR2 = grpp->ltr2; + adcp->adcm->HTR2 = grpp->htr2; + adcp->adcm->LTR3 = grpp->ltr3; + adcp->adcm->HTR3 = grpp->htr3; + adcp->adcm->AWD2CR = grpp->awd2cr; + adcp->adcm->AWD3CR = grpp->awd3cr; adcp->adcm->SMPR1 = grpp->smpr[0]; adcp->adcm->SMPR2 = grpp->smpr[1]; adcp->adcm->SQR1 = grpp->sqr[0] | ADC_SQR1_NUM_CH(grpp->num_channels / 2); @@ -649,12 +679,14 @@ void adc_lld_start_conversion(ADCDriver *adcp) { adcp->adcm->SQR4 = grpp->sqr[3]; adcp->adcs->CFGR2 = grpp->cfgr2; adcp->adcs->PCSEL = grpp->pcsel; - adcp->adcs->LTR1 = grpp->ltr1; - adcp->adcs->HTR1 = grpp->htr1; - adcp->adcs->LTR1 = grpp->ltr2; - adcp->adcs->HTR1 = grpp->htr2; - adcp->adcs->LTR1 = grpp->ltr3; - adcp->adcs->HTR1 = grpp->htr3; + adcp->adcs->LTR1 = grpp->sltr1; + adcp->adcs->HTR1 = grpp->shtr1; + adcp->adcs->LTR2 = grpp->sltr2; + adcp->adcs->HTR2 = grpp->shtr2; + adcp->adcs->LTR3 = grpp->sltr3; + adcp->adcs->HTR3 = grpp->shtr3; + adcp->adcs->AWD2CR = grpp->sawd2cr; + adcp->adcs->AWD3CR = grpp->sawd3cr; adcp->adcs->SMPR1 = grpp->ssmpr[0]; adcp->adcs->SMPR2 = grpp->ssmpr[1]; adcp->adcs->SQR1 = grpp->ssqr[0] | ADC_SQR1_NUM_CH(grpp->num_channels / 2); @@ -666,23 +698,22 @@ void adc_lld_start_conversion(ADCDriver *adcp) { adcp->adcm->CFGR = cfgr; adcp->adcs->CFGR = cfgr; } - +} #endif /* STM32_ADC_DUAL_MODE == TRUE && STM32_ADC_USE_ADC12 == TRUE */ #if STM32_ADC_DUAL_MODE == FALSE || STM32_ADC_USE_ADC3 == TRUE /* Configuration for ADC3 and single mode ADC1 */ -#if STM32_ADC_DUAL_MODE == TRUE && STM32_ADC_USE_ADC3 == TRUE - if (&ADCD3 == adcp) -#endif - { + adcp->adcm->CFGR2 = grpp->cfgr2; adcp->adcm->PCSEL = grpp->pcsel; adcp->adcm->LTR1 = grpp->ltr1; adcp->adcm->HTR1 = grpp->htr1; - adcp->adcm->LTR1 = grpp->ltr2; - adcp->adcm->HTR1 = grpp->htr2; - adcp->adcm->LTR1 = grpp->ltr3; - adcp->adcm->HTR1 = grpp->htr3; + adcp->adcm->LTR2 = grpp->ltr2; + adcp->adcm->HTR2 = grpp->htr2; + adcp->adcm->LTR3 = grpp->ltr3; + adcp->adcm->HTR3 = grpp->htr3; + adcp->adcm->AWD2CR = grpp->awd2cr; + adcp->adcm->AWD3CR = grpp->awd3cr; adcp->adcm->SMPR1 = grpp->smpr[0]; adcp->adcm->SMPR2 = grpp->smpr[1]; adcp->adcm->SQR1 = grpp->sqr[0] | ADC_SQR1_NUM_CH(grpp->num_channels); @@ -692,7 +723,6 @@ void adc_lld_start_conversion(ADCDriver *adcp) { /* ADC configuration.*/ adcp->adcm->CFGR = cfgr; - } #endif /* Starting conversion.*/ @@ -735,6 +765,10 @@ void adc_lld_stop_conversion(ADCDriver *adcp) { */ void adcSTM32EnableVREF(ADCDriver *adcp) { +#ifdef STM32H7XX + chDbgAssert(STM32_PWR_CR2 & PWR_CR2_MONEN, + "adcSTM32EnableVREF need PWR_CR2_MONEN in STM32_PWR_CR2"); +#endif adcp->adcc->CCR |= ADC_CCR_VREFEN; } @@ -765,6 +799,11 @@ void adcSTM32DisableVREF(ADCDriver *adcp) { */ void adcSTM32EnableTS(ADCDriver *adcp) { +#ifdef STM32H7XX + chDbgAssert(STM32_PWR_CR2 & PWR_CR2_MONEN, + "adcSTM32EnableVREF need PWR_CR2_MONEN in STM32_PWR_CR2"); +#endif + adcp->adcc->CCR |= ADC_CCR_TSEN; } diff --git a/os/hal/ports/STM32/LLD/ADCv4/hal_adc_lld.h b/os/hal/ports/STM32/LLD/ADCv4/hal_adc_lld.h index 690a404fa..433f5fbf2 100644 --- a/os/hal/ports/STM32/LLD/ADCv4/hal_adc_lld.h +++ b/os/hal/ports/STM32/LLD/ADCv4/hal_adc_lld.h @@ -31,6 +31,17 @@ /* Driver constants. */ /*===========================================================================*/ +/** + * @name Possible ADC errors mask bits. + * @{ + */ +#define ADC_ERR_DMAFAILURE 1U /**< DMA operations failure. */ +#define ADC_ERR_OVERFLOW 2U /**< ADC overflow condition. */ +#define ADC_ERR_AWD1 4U /**< Watchdog 1 triggered. */ +#define ADC_ERR_AWD2 8U /**< Watchdog 2 triggered. */ +#define ADC_ERR_AWD3 16U /**< Watchdog 3 triggered. */ +/** @} */ + /** * @name Available analog channels * @{ @@ -131,6 +142,10 @@ #define ADC_CFGR_EXTEN_FALLING (2U << 10U) #define ADC_CFGR_EXTEN_BOTH (3U << 10U) +#define ADC_CFGR_CONT_MASK (1U << 13U) +#define ADC_CFGR_CONT_DISABLED (0U << 13U) +#define ADC_CFGR_CONT_ENABLED (1U << 13U) + #define ADC_CFGR_DISCEN_MASK (1U << 16U) #define ADC_CFGR_DISCEN_DISABLED (0U << 16U) #define ADC_CFGR_DISCEN_ENABLED (1U << 16U) @@ -182,12 +197,14 @@ #endif /** - * @brief Makes the ADC samples type an 8bits one. - * @note 10, 12, 14 and 16 bits sampling mode must not be used when this - * option is enabled. + * @brief Specifies the ADC samples width. + * @note Must be 8, 16 or 32. + * @note 10, 12, 14 and 16 bits sampling modes must not be used when + * this option is set to 8. + * @note 32 is useful when oversampling is activated. */ -#if !defined(STM32_ADC_COMPACT_SAMPLES) || defined(__DOXYGEN__) -#define STM32_ADC_COMPACT_SAMPLES FALSE +#if !defined(STM32_ADC_SAMPLES_SIZE) || defined(__DOXYGEN__) +#define STM32_ADC_SAMPLES_SIZE 16 #endif /** @@ -357,6 +374,16 @@ #error "Invalid IRQ priority assigned to ADC3" #endif +#if ((STM32_ADC_SAMPLES_SIZE != 8) && \ + (STM32_ADC_SAMPLES_SIZE != 16) && \ + (STM32_ADC_SAMPLES_SIZE != 32)) +#error "STM32_ADC_SAMPLES_SIZE must be 8, 16 or 32" +#endif + +#if (STM32_ADC_SAMPLES_SIZE != 32) && STM32_ADC_DUAL_MODE +#error "STM32_ADC_SAMPLES_SIZE = 32 not compatible with STM32_ADC_DUAL_MODE" +#endif + #if !defined(STM32_ENFORCE_H7_REV_XY) /* ADC clock source checks.*/ #if (STM32_D1HPRE == STM32_D1HPRE_DIV1) @@ -490,10 +517,12 @@ /** * @brief ADC sample data type. */ -#if !STM32_ADC_COMPACT_SAMPLES || defined(__DOXYGEN__) +#if (STM32_ADC_SAMPLES_SIZE == 16) || defined(__DOXYGEN__) typedef uint16_t adcsample_t; -#else +#elif (STM32_ADC_SAMPLES_SIZE == 8) typedef uint8_t adcsample_t; +#elif (STM32_ADC_SAMPLES_SIZE == 32) +typedef uint32_t adcsample_t; #endif /** @@ -502,17 +531,9 @@ typedef uint8_t adcsample_t; typedef uint32_t adc_channels_num_t; /** - * @brief Possible ADC failure causes. - * @note Error codes are architecture dependent and should not relied - * upon. + * @brief Type of an ADC error mask. */ -typedef enum { - ADC_ERR_DMAFAILURE = 0, /**< DMA operations failure. */ - ADC_ERR_OVERFLOW = 1, /**< ADC overflow condition. */ - ADC_ERR_AWD1 = 2, /**< Watchdog 1 triggered. */ - ADC_ERR_AWD2 = 3, /**< Watchdog 2 triggered. */ - ADC_ERR_AWD3 = 4 /**< Watchdog 3 triggered. */ -} adcerror_t; +typedef uint32_t adcerror_t; /** * @brief Type of a DMA channel pointer choice. @@ -600,10 +621,26 @@ typedef union { uint32_t ltr3; \ /* ADC HTR3 register initialization data.*/ \ uint32_t htr3; \ + /* ADC AWD2CR register initialization data.*/ \ + uint32_t awd2cr; \ + /* ADC AWD3CR register initialization data.*/ \ + uint32_t awd3cr; \ /* ADC SMPRx registers initialization data.*/ \ uint32_t smpr[2]; \ /* ADC SQRx register initialization data.*/ \ uint32_t sqr[4]; \ + /* Slave ADC LTR/HTRx registers initialization data. \ + NOTE: This field is only present in dual mode.*/ \ + uint32_t sltr1; \ + uint32_t shtr1; \ + uint32_t sltr2; \ + uint32_t shtr2; \ + uint32_t sltr3; \ + uint32_t shtr3; \ + /* Slave ADC AWDxCR registers initialization data. \ + NOTE: This field is only present in dual mode.*/ \ + uint32_t sawd2cr; \ + uint32_t sawd3cr; \ /* Slave ADC SMPRx registers initialization data. \ NOTE: This field is only present in dual mode.*/ \ uint32_t ssmpr[2]; \ @@ -622,6 +659,8 @@ typedef union { uint32_t htr2; \ uint32_t ltr3; \ uint32_t htr3; \ + uint32_t awd2cr; \ + uint32_t awd3cr; \ uint32_t smpr[2]; \ uint32_t sqr[4] #endif /* STM32_ADC_DUAL_MODE == FALSE */ @@ -683,6 +722,24 @@ typedef union { #define ADC_SMPR2_SMP_AN19(n) ((n) << 27U)/**< @brief AN19 sampling time. */ /** @} */ +/** + * @name Analog watchdog settings helper macros + * @{ + */ +#define ADC_CFGR_AWD1_N(n) ((n) << 26U)/**< @brief AWD1 channel number */ +#define ADC_AWD23_MASK(n) (1U << (n)) /**< @brief AWD2/3 channels mask*/ +/** @} */ + +/** + * @name Oversampling settings helper macros + * @{ + */ +#define ADC_CFGR2_OVSS_N(n) ((n) << 5U)/**< @brief ovsr right shift */ +#define ADC_CFGR2_OVSR_N(n) ((n) << 16U)/**< @brief oversampling ratio */ +#define ADC_CFGR2_LSHIFT_N(n) ((n) << 28U)/**< @brief ovsr left shift */ + +/** @} */ + /*===========================================================================*/ /* External declarations. */ /*===========================================================================*/ diff --git a/os/rt/src/chvt.c b/os/rt/src/chvt.c index add9ad1a1..7bfa2c3f6 100644 --- a/os/rt/src/chvt.c +++ b/os/rt/src/chvt.c @@ -48,6 +48,20 @@ /* Module local functions. */ /*===========================================================================*/ +/** + * @brief Delta list initialization. + * + * @param[out] dlp pointer to the delta list header + * + * @notapi + */ +static inline void vt_init(delta_list_t *dlhp) { + + dlhp->next = dlhp; + dlhp->prev = dlhp; + dlhp->delta = (sysinterval_t)-1; +} + /** * @brief List empty check. * @@ -55,12 +69,11 @@ * * @notapi */ -static inline bool is_vtlist_empty(delta_list_t *dlhp) { +static inline bool vt_is_empty(delta_list_t *dlhp) { return (bool)(dlhp == dlhp->next); } -#if (CH_CFG_ST_TIMEDELTA > 0) || defined(__DOXYGEN__) /** * @brief Last timer in the list check. * @@ -69,7 +82,7 @@ static inline bool is_vtlist_empty(delta_list_t *dlhp) { * * @notapi */ -static inline bool is_last_timer(delta_list_t *dlhp, delta_list_t *dlp) { +static inline bool vt_is_last(delta_list_t *dlhp, delta_list_t *dlp) { return (bool)(dlp->next == dlhp); } @@ -82,7 +95,7 @@ static inline bool is_last_timer(delta_list_t *dlhp, delta_list_t *dlp) { * * @notapi */ -static inline bool is_first_timer(delta_list_t *dlhp, delta_list_t *dlp) { +static inline bool vt_is_first(delta_list_t *dlhp, delta_list_t *dlp) { return (bool)(dlhp->next == dlp); } @@ -95,39 +108,199 @@ static inline bool is_first_timer(delta_list_t *dlhp, delta_list_t *dlp) { * * @notapi */ -static inline bool is_timer(delta_list_t *dlhp, delta_list_t *dlp) { +static inline bool vt_is_timer(delta_list_t *dlhp, delta_list_t *dlp) { return (bool)(dlp != dlhp); } /** - * @brief Delta list compression. + * @brief Inserts an element after another header element. * - * @param[in] vtlp pointer to the delta list to be compressed - * @param[in] deltanow interval to be compacted starting from "lasttime" + * @param[in] dlhp pointer to the delta list header element + * @param[in] dlp element to be inserted after the header element * * @notapi */ -static void vt_list_compress(virtual_timers_list_t *vtlp, - sysinterval_t deltanow) { - delta_list_t *dlp = vtlp->dlist.next; +static inline void vt_insert_after(delta_list_t *dlhp, + delta_list_t *dlp, + sysinterval_t delta) { - /* The loop is bounded because the delta list header has the delta field - set to (sysinterval_t)-1 which is larger than all deltas.*/ - while (dlp->delta < deltanow) { - deltanow -= dlp->delta; - dlp->delta = (sysinterval_t)0; - dlp = dlp->next; - } - - vtlp->lasttime = vtlp->lasttime + deltanow; - - /* Adjusting next timer in the list, if any.*/ - if (is_timer(&vtlp->dlist, dlp)) { - dlp->delta -= deltanow; - } + dlp->delta = delta; + dlp->prev = dlhp; + dlp->next = dlp->prev->next; + dlp->next->prev = dlp; + dlhp->next = dlp; } + +/** + * @brief Inserts an element before another header element. + * + * @param[in] dlhp pointer to the delta list header element + * @param[in] dlp element to be inserted before the header element + * + * @notapi + */ +static inline void vt_insert_before(delta_list_t *dlhp, + delta_list_t *dlp, + sysinterval_t delta) { + + dlp->delta = delta; + dlp->next = dlhp; + dlp->prev = dlp->next->prev; + dlp->prev->next = dlp; + dlhp->prev = dlp; +} + +/** + * @brief Inserts an element in a delta list. + * + * @param[in] dlhp pointer to the delta list header element + * @param[in] dlep element to be inserted before the header element + * @param[in] delta delta of the element to be inserted + * + * @notapi + */ +static inline void vt_insert(delta_list_t *dlhp, + delta_list_t *dlep, + sysinterval_t delta) { + delta_list_t *dlp; + + /* The delta list is scanned in order to find the correct position for + this element. */ + dlp = dlhp->next; + while (dlp->delta < delta) { + /* Debug assert if the element is already in the list.*/ + chDbgAssert(dlp != dlep, "element already in list"); + + delta -= dlp->delta; + dlp = dlp->next; + } + + /* The timer is inserted in the delta list.*/ + vt_insert_before(dlp, dlep, delta); + + /* Adjusting delta for the following element.*/ + dlp->delta -= delta; + + /* Special case when the inserted element is in last position in the list, + the value in the header must be restored, just doing it is faster than + checking then doing.*/ + dlhp->delta = (sysinterval_t)-1; +} + +/** + * @brief Dequeues an element from the delta list. + * + * @param[in] dlhp pointer to the delta list header + * + * @notapi + */ +static inline delta_list_t *vt_remove_first(delta_list_t *dlhp) { + delta_list_t *dlp = dlhp->next; + + dlhp->next = dlp->next; + dlhp->next->prev = dlhp; + + return dlp; +} + +/** + * @brief Dequeues an element from the delta list. + * + * @param[in] dlp pointer to the delta list element + * + * @notapi + */ +static inline delta_list_t *vt_dequeue(delta_list_t *dlp) { + + dlp->prev->next = dlp->next; + dlp->next->prev = dlp->prev; + + return dlp; +} + +/** + * @brief Enqueues a virtual timer in a virtual timers list. + */ +static void vt_enqueue(virtual_timers_list_t *vtlp, + virtual_timer_t *vtp, + systime_t now, + sysinterval_t delay) { + sysinterval_t delta; + +#if CH_CFG_ST_TIMEDELTA > 0 + { + sysinterval_t nowdelta; + + /* Special case where the timers list is empty.*/ + if (vt_is_empty(&vtlp->dlist)) { + + /* The delta list is empty, the current time becomes the new + delta list base time, the timer is inserted.*/ + vtlp->lasttime = now; + vt_insert_after(&vtlp->dlist, &vtp->dlist, delay); + + /* If the requested delay is lower than the minimum safe delta then it + is raised to the minimum safe value.*/ + if (delay < (sysinterval_t)CH_CFG_ST_TIMEDELTA) { + /* We need to avoid that the system time goes past the alarm we are + going to set before the alarm is actually set.*/ + delay = (sysinterval_t)CH_CFG_ST_TIMEDELTA; + } + #if CH_CFG_INTERVALS_SIZE > CH_CFG_ST_RESOLUTION + else if (delay > (sysinterval_t)TIME_MAX_SYSTIME) { + /* The delta could be too large for the physical timer to handle + this can happen when: sizeof (systime_t) < sizeof (sysinterval_t).*/ + delay = (sysinterval_t)TIME_MAX_SYSTIME; + } + #endif + + /* Being the first element inserted in the list the alarm timer + is started.*/ + port_timer_start_alarm(chTimeAddX(vtlp->lasttime, delay)); + + return; + } + + /* Delay as delta from 'lasttime'. Note, it can overflow and the value + becomes lower than 'deltanow'.*/ + nowdelta = chTimeDiffX(vtlp->lasttime, now); + delta = nowdelta + delay; + + /* Scenario where a very large delay exceeded the numeric range, the + delta is shortened to make it fit the numeric range, the timer + will be triggered "deltanow" cycles earlier.*/ + if (delta < nowdelta) { + delta = delay; + } + + /* Checking if this timer would become the first in the delta list, this + requires changing the current alarm setting.*/ + if (delta < vtlp->dlist.next->delta) { + sysinterval_t deadline_delta; + + /* A small delay that will become the first element in the delta list + and next deadline.*/ + deadline_delta = delta; +#if CH_CFG_INTERVALS_SIZE > CH_CFG_ST_RESOLUTION + /* The delta could be too large for the physical timer to handle + this can happen when: sizeof (systime_t) < sizeof (sysinterval_t).*/ + if (deadline_delta > (sysinterval_t)TIME_MAX_SYSTIME) { + deadline_delta = (sysinterval_t)TIME_MAX_SYSTIME; + } #endif + port_timer_set_alarm(chTimeAddX(vtlp->lasttime, deadline_delta)); + } + } +#else /* CH_CFG_ST_TIMEDELTA == 0 */ + (void)now; + + /* Delta is initially equal to the specified delay.*/ + delta = delay; +#endif /* CH_CFG_ST_TIMEDELTA == 0 */ + + vt_insert(&vtlp->dlist, &vtp->dlist, delta); +} /*===========================================================================*/ /* Module exported functions. */ @@ -137,13 +310,13 @@ static void vt_list_compress(virtual_timers_list_t *vtlp, * @brief Virtual Timers initialization. * @note Internal use only. * + * @param[out] vtlp pointer to the @p virtual_timers_list_t structure + * * @notapi */ void _vt_init(void) { - ch.vtlist.dlist.next = &ch.vtlist.dlist; - ch.vtlist.dlist.prev = &ch.vtlist.dlist; - ch.vtlist.dlist.delta = (sysinterval_t)-1; + vt_init(&ch.vtlist.dlist); #if CH_CFG_ST_TIMEDELTA == 0 ch.vtlist.systime = (systime_t)0; #else /* CH_CFG_ST_TIMEDELTA > 0 */ @@ -152,7 +325,7 @@ void _vt_init(void) { } /** - * @brief Enables a virtual timer. + * @brief Enables a one-shot virtual timer. * @details The timer is enabled and programmed to trigger after the delay * specified as parameter. * @pre The timer must not be already armed before calling this function. @@ -176,106 +349,16 @@ void _vt_init(void) { void chVTDoSetI(virtual_timer_t *vtp, sysinterval_t delay, vtfunc_t vtfunc, void *par) { virtual_timers_list_t *vtlp = &ch.vtlist; - delta_list_t *dlp; - sysinterval_t delta; chDbgCheckClassI(); chDbgCheck((vtp != NULL) && (vtfunc != NULL) && (delay != TIME_IMMEDIATE)); - vtp->par = par; - vtp->func = vtfunc; + /* Timer initialization.*/ + vtp->par = par; + vtp->func = vtfunc; -#if CH_CFG_ST_TIMEDELTA > 0 - { - systime_t now = chVTGetSystemTimeX(); - sysinterval_t deltanow; - - /* If the requested delay is lower than the minimum safe delta then it - is raised to the minimum safe value.*/ - if (delay < (sysinterval_t)CH_CFG_ST_TIMEDELTA) { - delay = (sysinterval_t)CH_CFG_ST_TIMEDELTA; - } - - /* Special case where the timers list is empty.*/ - if (is_vtlist_empty(&vtlp->dlist)) { - - /* The delta list is empty, the current time becomes the new - delta list base time, the timer is inserted.*/ - vtlp->lasttime = now; - vtlp->dlist.next = &vtp->dlist; - vtlp->dlist.prev = &vtp->dlist; - vtp->dlist.next = &vtlp->dlist; - vtp->dlist.prev = &vtlp->dlist; - vtp->dlist.delta = delay; - -#if CH_CFG_INTERVALS_SIZE > CH_CFG_ST_RESOLUTION - /* The delta could be too large for the physical timer to handle.*/ - if (delay > (sysinterval_t)TIME_MAX_SYSTIME) { - delay = (sysinterval_t)TIME_MAX_SYSTIME; - } -#endif - - /* Being the first element in the list the alarm timer is started.*/ - port_timer_start_alarm(chTimeAddX(vtlp->lasttime, delay)); - - return; - } - - /* Delay as delta from 'lasttime'. Note, it can overflow and the value - becomes lower than 'deltanow'.*/ - deltanow = chTimeDiffX(vtlp->lasttime, now); - delta = deltanow + delay; - - /* Scenario where a very large delay exceeded the numeric range, it - requires a special handling, the compression procedure.*/ - if (delta < deltanow) { - vt_list_compress(vtlp, deltanow); - delta -= deltanow; - } - else if (delta < vtlp->dlist.next->delta) { - sysinterval_t deadline_delta; - - /* A small delay that will become the first element in the delta list - and next deadline.*/ - deadline_delta = delta; -#if CH_CFG_INTERVALS_SIZE > CH_CFG_ST_RESOLUTION - /* The delta could be too large for the physical timer to handle.*/ - if (deadline_delta > (sysinterval_t)TIME_MAX_SYSTIME) { - deadline_delta = (sysinterval_t)TIME_MAX_SYSTIME; - } -#endif - port_timer_set_alarm(chTimeAddX(vtlp->lasttime, deadline_delta)); - } - } -#else /* CH_CFG_ST_TIMEDELTA == 0 */ - /* Delta is initially equal to the specified delay.*/ - delta = delay; -#endif /* CH_CFG_ST_TIMEDELTA == 0 */ - - /* The delta list is scanned in order to find the correct position for - this timer. */ - dlp = vtlp->dlist.next; - while (dlp->delta < delta) { - /* Debug assert if the timer is already in the list.*/ - chDbgAssert(dlp != &vtp->dlist, "timer already armed"); - - delta -= dlp->delta; - dlp = dlp->next; - } - - /* The timer is inserted in the delta list.*/ - vtp->dlist.next = dlp; - vtp->dlist.prev = vtp->dlist.next->prev; - vtp->dlist.prev->next = &vtp->dlist; - dlp->prev = &vtp->dlist; - vtp->dlist.delta = delta; - - /* Calculate new delta for the following entry.*/ - dlp->delta -= delta; - - /* Special case when the timer is in last position in the list, the - value in the header must be restored.*/ - vtlp->dlist.delta = (sysinterval_t)-1; + /* Inserting the timer in the delta list.*/ + vt_enqueue(vtlp, vtp, chVTGetSystemTimeX(), delay); } /** @@ -291,16 +374,15 @@ void chVTDoResetI(virtual_timer_t *vtp) { chDbgCheckClassI(); chDbgCheck(vtp != NULL); - chDbgAssert(vtp->func != NULL, "timer not set or already triggered"); + chDbgAssert(chVTIsArmedI(vtp), "timer not armed"); #if CH_CFG_ST_TIMEDELTA == 0 /* The delta of the timer is added to the next timer.*/ vtp->dlist.next->delta += vtp->dlist.delta; - /* Removing the element from the delta list.*/ - vtp->dlist.prev->next = vtp->dlist.next; - vtp->dlist.next->prev = vtp->dlist.prev; + /* Removing the element from the delta list, marking it as not armed.*/ + (void) vt_dequeue(&vtp->dlist); vtp->func = NULL; /* The above code changes the value in the header when the removed element @@ -311,26 +393,29 @@ void chVTDoResetI(virtual_timer_t *vtp) { /* If the timer is not the first of the list then it is simply unlinked else the operation is more complex.*/ - if (!is_first_timer(&vtlp->dlist, &vtp->dlist)) { - /* Removing the element from the delta list.*/ - vtp->dlist.prev->next = vtp->dlist.next; - vtp->dlist.next->prev = vtp->dlist.prev; + if (!vt_is_first(&vtlp->dlist, &vtp->dlist)) { + + /* Removing the element from the delta list and marking it as not armed.*/ + (void) vt_dequeue(&vtp->dlist); vtp->func = NULL; /* Adding delta to the next element, if it is not the last one.*/ - if (is_timer(&vtlp->dlist, vtp->dlist.next)) - vtp->dlist.next->delta += vtp->dlist.delta; + vtp->dlist.next->delta += vtp->dlist.delta; + + /* Special case when the removed element from the last position in the list, + the value in the header must be restored, just doing it is faster than + checking then doing.*/ + vtlp->dlist.delta = (sysinterval_t)-1; return; } - /* Removing the first timer from the list.*/ - vtlp->dlist.next = vtp->dlist.next; - vtlp->dlist.next->prev = &vtlp->dlist; + /* Removing the first timer from the list and marking it as not armed.*/ + vt_remove_first(&vtlp->dlist); vtp->func = NULL; /* If the list become empty then the alarm timer is stopped and done.*/ - if (is_vtlist_empty(&vtlp->dlist)) { + if (vt_is_empty(&vtlp->dlist)) { port_timer_stop_alarm(); return; @@ -339,12 +424,6 @@ void chVTDoResetI(virtual_timer_t *vtp) { /* The delta of the removed timer is added to the new first timer.*/ vtlp->dlist.next->delta += vtp->dlist.delta; - /* If the new first timer has a delta of zero then the alarm is not - modified, the already programmed alarm will serve it.*/ -/* if (vtlp->dlist.next->delta == 0) { - return; - }*/ - /* Distance in ticks between the last alarm event and current time.*/ nowdelta = chTimeDiffX(vtlp->lasttime, chVTGetSystemTimeX()); @@ -375,6 +454,47 @@ void chVTDoResetI(virtual_timer_t *vtp) { #endif /* CH_CFG_ST_TIMEDELTA > 0 */ } +/** + * @brief Returns the remaining time interval before next timer trigger. + * @note This function can be called while the timer is active or + * after stopping it. + * + * @param[in] vtp the @p virtual_timer_t structure pointer + * @return The remaining time interval. + * + * @iclass + */ +sysinterval_t chVTGetRemainingIntervalI(virtual_timer_t *vtp) { + virtual_timers_list_t *vtlp = &ch.vtlist; + sysinterval_t delta; + delta_list_t *dlp; + + chDbgCheckClassI(); + + delta = (sysinterval_t)0; + dlp = vtlp->dlist.next; + do { + delta += dlp->delta; + if (dlp == &vtp->dlist) { +#if CH_CFG_ST_TIMEDELTA > 0 + systime_t now = chVTGetSystemTimeX(); + sysinterval_t nowdelta = chTimeDiffX(vtlp->lasttime, now); + if (nowdelta > delta) { + return (sysinterval_t)0; + } + return nowdelta - delta; +#else + return delta; +#endif + } + dlp = dlp->next; + } while (dlp != &vtlp->dlist); + + chDbgAssert(false, "timer not in list"); + + return (sysinterval_t)-1; +} + /** * @brief Virtual timers ticker. * @note The system lock is released before entering the callback and @@ -391,18 +511,23 @@ void chVTDoTickI(void) { #if CH_CFG_ST_TIMEDELTA == 0 vtlp->systime++; - if (!is_vtlist_empty(&vtlp->dlist)) { + if (!vt_is_empty(&vtlp->dlist)) { /* The list is not empty, processing elements on top.*/ --vtlp->dlist.next->delta; while (vtlp->dlist.next->delta == (sysinterval_t)0) { virtual_timer_t *vtp; vtfunc_t fn; + /* Triggered timer.*/ vtp = (virtual_timer_t *)vtlp->dlist.next; + + /* Removing the element from the delta list, marking it as not armed.*/ + (void) vt_dequeue(&vtp->dlist); fn = vtp->func; vtp->func = NULL; - vtp->dlist.next->prev = &vtlp->dlist; - vtlp->dlist.next = vtp->dlist.next; + + /* The callback is invoked outside the kernel critical section, it + is re-entered on the callback return.*/ chSysUnlockFromISR(); fn(vtp->par); chSysLockFromISR(); @@ -410,70 +535,64 @@ void chVTDoTickI(void) { } #else /* CH_CFG_ST_TIMEDELTA > 0 */ delta_list_t *dlp; - systime_t now; sysinterval_t delta, nowdelta; + systime_t now; - /* Looping through timers.*/ + /* Delta between current time and last execution time.*/ + now = chVTGetSystemTimeX(); + nowdelta = chTimeDiffX(vtlp->lasttime, now); + + /* Looping through timers consuming all timers with deltas lower or equal + than the interval between "now" and "lasttime". + Note that the list scan is limited by the delta list header having + "vtlp->dlist.delta == (sysinterval_t)-1" which is greater than all + deltas.*/ dlp = vtlp->dlist.next; - while (true) { + while (nowdelta >= dlp->delta) { + virtual_timer_t *vtp = (virtual_timer_t *)dlp; + systime_t lasttime; + vtfunc_t fn; - /* Getting the system time as reference.*/ + /* Last time deadline is updated to the next timer's time.*/ + lasttime = chTimeAddX(vtlp->lasttime, dlp->delta); + vtlp->lasttime = lasttime; + + /* Removing the timer from the list.*/ + (void) vt_dequeue(dlp); + + /* Marking the timer as not armed.*/ + fn = vtp->func; + vtp->func = NULL; + + /* If the list becomes empty then the alarm is disabled.*/ + if (vt_is_empty(&vtlp->dlist)) { + port_timer_stop_alarm(); + } + + /* The callback is invoked outside the kernel critical section, it + is re-entered on the callback return. Note that "lasttime" can be + modified within the callback if some timer function is called.*/ + chSysUnlockFromISR(); + fn(vtp->par); + chSysLockFromISR(); + + /* Delta between current time after callback execution time.*/ now = chVTGetSystemTimeX(); - nowdelta = chTimeDiffX(vtlp->lasttime, now); + nowdelta = chTimeDiffX(lasttime, now); - /* The list scan is limited by the timers header having - "vtlp->dlist.delta == (sysinterval_t)-1" which is - greater than all deltas.*/ - if (nowdelta < dlp->delta) { - break; - } - - /* Consuming all timers between "vtp->lasttime" and now.*/ - do { - vtfunc_t fn; - virtual_timer_t *vtp = (virtual_timer_t *)dlp; - - /* The "last time" becomes this timer's expiration time.*/ - vtlp->lasttime += dlp->delta; - nowdelta -= dlp->delta; - - /* Removing the timer from the list.*/ - dlp->next->prev = &vtlp->dlist; - vtlp->dlist.next = dlp->next; - - /* Calling the associated function and then marking the timer as - non active.*/ - fn = vtp->func; - vtp->func = NULL; - - /* If the list becomes empty then the timer is stopped.*/ - if (is_vtlist_empty(&vtlp->dlist)) { - port_timer_stop_alarm(); - } - - /* The callback is invoked outside the kernel critical zone.*/ - chSysUnlockFromISR(); - fn(vtp->par); - chSysLockFromISR(); - - /* Next element in the list.*/ - dlp = vtlp->dlist.next; - } - while (dlp->delta <= nowdelta); + /* Next element in the list.*/ + dlp = vtlp->dlist.next; } /* If the list is empty, nothing else to do.*/ - if (is_vtlist_empty(&vtlp->dlist)) { + if (vt_is_empty(&vtlp->dlist)) { return; } - /* The "unprocessed nowdelta" time slice is added to "last time" - and subtracted to next timer's delta.*/ - vtlp->lasttime += nowdelta; - vtlp->dlist.next->delta -= nowdelta; + /* Calculating the next alarm time.*/ + delta = dlp->delta - nowdelta; - /* Recalculating the next alarm time.*/ - delta = dlp->delta - chTimeDiffX(vtlp->lasttime, now); + /* For normal timers limit to CH_CFG_ST_TIMEDELTA.*/ if (delta < (sysinterval_t)CH_CFG_ST_TIMEDELTA) { delta = (sysinterval_t)CH_CFG_ST_TIMEDELTA; } @@ -483,11 +602,13 @@ void chVTDoTickI(void) { delta = (sysinterval_t)TIME_MAX_SYSTIME; } #endif + + /* Update alarm time to next timer.*/ port_timer_set_alarm(chTimeAddX(now, delta)); chDbgAssert(chTimeDiffX(vtlp->lasttime, chVTGetSystemTimeX()) <= chTimeDiffX(vtlp->lasttime, chTimeAddX(now, delta)), - "exceeding delta"); + "insufficient delta"); #endif /* CH_CFG_ST_TIMEDELTA > 0 */ } diff --git a/readme.txt b/readme.txt index 9c079ea04..7f5d863ba 100644 --- a/readme.txt +++ b/readme.txt @@ -74,6 +74,10 @@ ***************************************************************************** *** 20.3.4 *** +- NEW: STM32 improved ADCv4 driver (H7) back-ported from trunk. +- NEW: New "VT Storm" test application for RT. +- NEW: More efficient virtual timers implementation for RT, it has been + back-ported from RT7. - NEW: Improved PWR settings for STM32G4. - NEW: Improved boost settings for STM32G4. - NEW: Files mcuconf.h for STM32F746, F767, L432, L452, L476, L496 received diff --git a/testhal/STM32/multi/ADC/cfg/stm32h743zi_nucleo144/mcuconf.h b/testhal/STM32/multi/ADC/cfg/stm32h743zi_nucleo144/mcuconf.h index 70367d56a..1238ac1b5 100644 --- a/testhal/STM32/multi/ADC/cfg/stm32h743zi_nucleo144/mcuconf.h +++ b/testhal/STM32/multi/ADC/cfg/stm32h743zi_nucleo144/mcuconf.h @@ -224,7 +224,7 @@ * ADC driver system settings. */ #define STM32_ADC_DUAL_MODE FALSE -#define STM32_ADC_COMPACT_SAMPLES FALSE +#define STM32_ADC_SAMPLES_SIZE 16 #define STM32_ADC_USE_ADC12 TRUE #define STM32_ADC_USE_ADC3 TRUE #define STM32_ADC_ADC12_DMA_STREAM STM32_DMA_STREAM_ID_ANY diff --git a/testhal/STM32/multi/DAC/cfg/stm32h743_nucleo144/mcuconf.h b/testhal/STM32/multi/DAC/cfg/stm32h743_nucleo144/mcuconf.h index cd91ced8f..4ccbacde6 100644 --- a/testhal/STM32/multi/DAC/cfg/stm32h743_nucleo144/mcuconf.h +++ b/testhal/STM32/multi/DAC/cfg/stm32h743_nucleo144/mcuconf.h @@ -224,7 +224,7 @@ * ADC driver system settings. */ #define STM32_ADC_DUAL_MODE FALSE -#define STM32_ADC_COMPACT_SAMPLES FALSE +#define STM32_ADC_SAMPLES_SIZE 16 #define STM32_ADC_USE_ADC12 FALSE #define STM32_ADC_USE_ADC3 FALSE #define STM32_ADC_ADC12_DMA_STREAM STM32_DMA_STREAM_ID_ANY diff --git a/testhal/STM32/multi/SPI/cfg/stm32h743_nucleo144/mcuconf.h b/testhal/STM32/multi/SPI/cfg/stm32h743_nucleo144/mcuconf.h index 4e6daf9d6..11fdc7b72 100644 --- a/testhal/STM32/multi/SPI/cfg/stm32h743_nucleo144/mcuconf.h +++ b/testhal/STM32/multi/SPI/cfg/stm32h743_nucleo144/mcuconf.h @@ -224,7 +224,7 @@ * ADC driver system settings. */ #define STM32_ADC_DUAL_MODE FALSE -#define STM32_ADC_COMPACT_SAMPLES FALSE +#define STM32_ADC_SAMPLES_SIZE 16 #define STM32_ADC_USE_ADC12 TRUE #define STM32_ADC_USE_ADC3 FALSE #define STM32_ADC_ADC12_DMA_STREAM STM32_DMA_STREAM_ID_ANY diff --git a/testhal/STM32/multi/SPI/cfg/stm32h755_nucleo144/mcuconf.h b/testhal/STM32/multi/SPI/cfg/stm32h755_nucleo144/mcuconf.h index 6ceef86e8..235dc2417 100644 --- a/testhal/STM32/multi/SPI/cfg/stm32h755_nucleo144/mcuconf.h +++ b/testhal/STM32/multi/SPI/cfg/stm32h755_nucleo144/mcuconf.h @@ -224,7 +224,7 @@ * ADC driver system settings. */ #define STM32_ADC_DUAL_MODE FALSE -#define STM32_ADC_COMPACT_SAMPLES FALSE +#define STM32_ADC_SAMPLES_SIZE 16 #define STM32_ADC_USE_ADC12 FALSE #define STM32_ADC_USE_ADC3 FALSE #define STM32_ADC_ADC12_DMA_STREAM STM32_DMA_STREAM_ID_ANY diff --git a/testhal/STM32/multi/USB_CDC/cfg/stm32h743_nucleo144/mcuconf.h b/testhal/STM32/multi/USB_CDC/cfg/stm32h743_nucleo144/mcuconf.h index 3048f637e..c8824a83c 100644 --- a/testhal/STM32/multi/USB_CDC/cfg/stm32h743_nucleo144/mcuconf.h +++ b/testhal/STM32/multi/USB_CDC/cfg/stm32h743_nucleo144/mcuconf.h @@ -224,7 +224,7 @@ * ADC driver system settings. */ #define STM32_ADC_DUAL_MODE FALSE -#define STM32_ADC_COMPACT_SAMPLES FALSE +#define STM32_ADC_SAMPLES_SIZE 16 #define STM32_ADC_USE_ADC12 TRUE #define STM32_ADC_USE_ADC3 FALSE #define STM32_ADC_ADC12_DMA_STREAM STM32_DMA_STREAM_ID_ANY diff --git a/testrt/VT_STORM/.cproject b/testrt/VT_STORM/.cproject new file mode 100644 index 000000000..829c0027b --- /dev/null +++ b/testrt/VT_STORM/.cproject @@ -0,0 +1,130 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/testrt/VT_STORM/.project b/testrt/VT_STORM/.project new file mode 100644 index 000000000..17a0367f3 --- /dev/null +++ b/testrt/VT_STORM/.project @@ -0,0 +1,91 @@ + + + TEST-RT-VT_STORM + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + ?name? + + + + org.eclipse.cdt.make.core.append_environment + true + + + org.eclipse.cdt.make.core.autoBuildTarget + all + + + org.eclipse.cdt.make.core.buildArguments + -j1 + + + org.eclipse.cdt.make.core.buildCommand + make + + + org.eclipse.cdt.make.core.cleanBuildTarget + clean + + + org.eclipse.cdt.make.core.contents + org.eclipse.cdt.make.core.activeConfigSettings + + + org.eclipse.cdt.make.core.enableAutoBuild + false + + + org.eclipse.cdt.make.core.enableCleanBuild + true + + + org.eclipse.cdt.make.core.enableFullBuild + true + + + org.eclipse.cdt.make.core.fullBuildTarget + all + + + org.eclipse.cdt.make.core.stopOnError + true + + + org.eclipse.cdt.make.core.useDefaultBuildCmd + true + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + org.eclipse.cdt.core.ccnature + + + + os + 2 + CHIBIOS/os + + + test + 2 + CHIBIOS/test + + + diff --git a/testrt/VT_STORM/Makefile b/testrt/VT_STORM/Makefile new file mode 100644 index 000000000..b324f4216 --- /dev/null +++ b/testrt/VT_STORM/Makefile @@ -0,0 +1,18 @@ +############################################################################## +# Multi-project makefile rules +# + +all: + @echo + @echo === Building for STM32G474RE-Nucleo64 ============================== + +@make --no-print-directory -f ./make/stm32g474re_nucleo64.make all + @echo ==================================================================== + @echo + +clean: + @echo + +@make --no-print-directory -f ./make/stm32g474re_nucleo64.make clean + @echo + +# +############################################################################## diff --git a/testrt/VT_STORM/cfg/stm32g474re_nucleo64/chconf.h b/testrt/VT_STORM/cfg/stm32g474re_nucleo64/chconf.h new file mode 100644 index 000000000..94004b6eb --- /dev/null +++ b/testrt/VT_STORM/cfg/stm32g474re_nucleo64/chconf.h @@ -0,0 +1,756 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file rt/templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef CHCONF_H +#define CHCONF_H + +#define _CHIBIOS_RT_CONF_ +#define _CHIBIOS_RT_CONF_VER_6_1_ + +/*===========================================================================*/ +/** + * @name System timers settings + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System time counter resolution. + * @note Allowed values are 16, 32 or 64 bits. + */ +#if !defined(CH_CFG_ST_RESOLUTION) +#define CH_CFG_ST_RESOLUTION 32 +#endif + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_CFG_ST_FREQUENCY) +#define CH_CFG_ST_FREQUENCY 1000000 +#endif + +/** + * @brief Time intervals data size. + * @note Allowed values are 16, 32 or 64 bits. + */ +#if !defined(CH_CFG_INTERVALS_SIZE) +#define CH_CFG_INTERVALS_SIZE 32 +#endif + +/** + * @brief Time types data size. + * @note Allowed values are 16 or 32 bits. + */ +#if !defined(CH_CFG_TIME_TYPES_SIZE) +#define CH_CFG_TIME_TYPES_SIZE 32 +#endif + +/** + * @brief Time delta constant for the tick-less mode. + * @note If this value is zero then the system uses the classic + * periodic tick. This value represents the minimum number + * of ticks that is safe to specify in a timeout directive. + * The value one is not valid, timeouts are rounded up to + * this value. + */ +#if !defined(CH_CFG_ST_TIMEDELTA) +#define CH_CFG_ST_TIMEDELTA 20 +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + * @note The round robin preemption is not supported in tickless mode and + * must be set to zero in that case. + */ +#if !defined(CH_CFG_TIME_QUANTUM) +#define CH_CFG_TIME_QUANTUM 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread. The application @p main() + * function becomes the idle thread and must implement an + * infinite loop. + */ +#if !defined(CH_CFG_NO_IDLE_THREAD) +#define CH_CFG_NO_IDLE_THREAD FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_OPTIMIZE_SPEED) +#define CH_CFG_OPTIMIZE_SPEED TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Time Measurement APIs. + * @details If enabled then the time measurement APIs are included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_TM) +#define CH_CFG_USE_TM TRUE +#endif + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_REGISTRY) +#define CH_CFG_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_WAITEXIT) +#define CH_CFG_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_SEMAPHORES) +#define CH_CFG_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special + * requirements. + * @note Requires @p CH_CFG_USE_SEMAPHORES. + */ +#if !defined(CH_CFG_USE_SEMAPHORES_PRIORITY) +#define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_MUTEXES) +#define CH_CFG_USE_MUTEXES TRUE +#endif + +/** + * @brief Enables recursive behavior on mutexes. + * @note Recursive mutexes are heavier and have an increased + * memory footprint. + * + * @note The default is @p FALSE. + * @note Requires @p CH_CFG_USE_MUTEXES. + */ +#if !defined(CH_CFG_USE_MUTEXES_RECURSIVE) +#define CH_CFG_USE_MUTEXES_RECURSIVE FALSE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_MUTEXES. + */ +#if !defined(CH_CFG_USE_CONDVARS) +#define CH_CFG_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_CONDVARS. + */ +#if !defined(CH_CFG_USE_CONDVARS_TIMEOUT) +#define CH_CFG_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_EVENTS) +#define CH_CFG_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_EVENTS. + */ +#if !defined(CH_CFG_USE_EVENTS_TIMEOUT) +#define CH_CFG_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_MESSAGES) +#define CH_CFG_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special + * requirements. + * @note Requires @p CH_CFG_USE_MESSAGES. + */ +#if !defined(CH_CFG_USE_MESSAGES_PRIORITY) +#define CH_CFG_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_WAITEXIT. + * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS. + */ +#if !defined(CH_CFG_USE_DYNAMIC) +#define CH_CFG_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name OSLIB options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_SEMAPHORES. + */ +#if !defined(CH_CFG_USE_MAILBOXES) +#define CH_CFG_USE_MAILBOXES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_MEMCORE) +#define CH_CFG_USE_MEMCORE TRUE +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_CFG_USE_MEMCORE. + */ +#if !defined(CH_CFG_MEMCORE_SIZE) +#define CH_CFG_MEMCORE_SIZE 0 +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_MEMCORE and either @p CH_CFG_USE_MUTEXES or + * @p CH_CFG_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_CFG_USE_HEAP) +#define CH_CFG_USE_HEAP TRUE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_MEMPOOLS) +#define CH_CFG_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Objects FIFOs APIs. + * @details If enabled then the objects FIFOs APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_OBJ_FIFOS) +#define CH_CFG_USE_OBJ_FIFOS TRUE +#endif + +/** + * @brief Pipes APIs. + * @details If enabled then the pipes APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_PIPES) +#define CH_CFG_USE_PIPES TRUE +#endif + +/** + * @brief Objects Caches APIs. + * @details If enabled then the objects caches APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_OBJ_CACHES) +#define CH_CFG_USE_OBJ_CACHES TRUE +#endif + +/** + * @brief Delegate threads APIs. + * @details If enabled then the delegate threads APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_DELEGATES) +#define CH_CFG_USE_DELEGATES TRUE +#endif + +/** + * @brief Jobs Queues APIs. + * @details If enabled then the jobs queues APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_JOBS) +#define CH_CFG_USE_JOBS TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Objects factory options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Objects Factory APIs. + * @details If enabled then the objects factory APIs are included in the + * kernel. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_CFG_USE_FACTORY) +#define CH_CFG_USE_FACTORY TRUE +#endif + +/** + * @brief Maximum length for object names. + * @details If the specified length is zero then the name is stored by + * pointer but this could have unintended side effects. + */ +#if !defined(CH_CFG_FACTORY_MAX_NAMES_LENGTH) +#define CH_CFG_FACTORY_MAX_NAMES_LENGTH 8 +#endif + +/** + * @brief Enables the registry of generic objects. + */ +#if !defined(CH_CFG_FACTORY_OBJECTS_REGISTRY) +#define CH_CFG_FACTORY_OBJECTS_REGISTRY TRUE +#endif + +/** + * @brief Enables factory for generic buffers. + */ +#if !defined(CH_CFG_FACTORY_GENERIC_BUFFERS) +#define CH_CFG_FACTORY_GENERIC_BUFFERS TRUE +#endif + +/** + * @brief Enables factory for semaphores. + */ +#if !defined(CH_CFG_FACTORY_SEMAPHORES) +#define CH_CFG_FACTORY_SEMAPHORES TRUE +#endif + +/** + * @brief Enables factory for mailboxes. + */ +#if !defined(CH_CFG_FACTORY_MAILBOXES) +#define CH_CFG_FACTORY_MAILBOXES TRUE +#endif + +/** + * @brief Enables factory for objects FIFOs. + */ +#if !defined(CH_CFG_FACTORY_OBJ_FIFOS) +#define CH_CFG_FACTORY_OBJ_FIFOS TRUE +#endif + +/** + * @brief Enables factory for Pipes. + */ +#if !defined(CH_CFG_FACTORY_PIPES) || defined(__DOXYGEN__) +#define CH_CFG_FACTORY_PIPES TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, kernel statistics. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_STATISTICS) +#define CH_DBG_STATISTICS FALSE +#endif + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) +#define CH_DBG_SYSTEM_STATE_CHECK FALSE +#endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) +#define CH_DBG_ENABLE_CHECKS FALSE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) +#define CH_DBG_ENABLE_ASSERTS TRUE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the trace buffer is activated. + * + * @note The default is @p CH_DBG_TRACE_MASK_DISABLED. + */ +#if !defined(CH_DBG_TRACE_MASK) +#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_DISABLED +#endif + +/** + * @brief Trace buffer entries. + * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is + * different from @p CH_DBG_TRACE_MASK_DISABLED. + */ +#if !defined(CH_DBG_TRACE_BUFFER_SIZE) +#define CH_DBG_TRACE_BUFFER_SIZE 128 +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) +#define CH_DBG_ENABLE_STACK_CHECK FALSE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) +#define CH_DBG_FILL_THREADS FALSE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p thread_t structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p FALSE. + * @note This debug option is not currently compatible with the + * tickless mode. + */ +#if !defined(CH_DBG_THREADS_PROFILING) +#define CH_DBG_THREADS_PROFILING FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System structure extension. + * @details User fields added to the end of the @p ch_system_t structure. + */ +#define CH_CFG_SYSTEM_EXTRA_FIELDS \ + /* Add threads custom fields here.*/ + +/** + * @brief System initialization hook. + * @details User initialization code added to the @p chSysInit() function + * just before interrupts are enabled globally. + */ +#define CH_CFG_SYSTEM_INIT_HOOK() { \ + /* Add threads initialization code here.*/ \ +} + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p thread_t structure. + */ +#define CH_CFG_THREAD_EXTRA_FIELDS \ + /* Add threads custom fields here.*/ + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p _thread_init() function. + * + * @note It is invoked from within @p _thread_init() and implicitly from all + * the threads creation APIs. + */ +#define CH_CFG_THREAD_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + */ +#define CH_CFG_THREAD_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* Context switch code here.*/ \ +} + +/** + * @brief ISR enter hook. + */ +#define CH_CFG_IRQ_PROLOGUE_HOOK() { \ + /* IRQ prologue code here.*/ \ +} + +/** + * @brief ISR exit hook. + */ +#define CH_CFG_IRQ_EPILOGUE_HOOK() { \ + /* IRQ epilogue code here.*/ \ +} + +/** + * @brief Idle thread enter hook. + * @note This hook is invoked within a critical zone, no OS functions + * should be invoked from here. + * @note This macro can be used to activate a power saving mode. + */ +#define CH_CFG_IDLE_ENTER_HOOK() { \ + /* Idle-enter code here.*/ \ +} + +/** + * @brief Idle thread leave hook. + * @note This hook is invoked within a critical zone, no OS functions + * should be invoked from here. + * @note This macro can be used to deactivate a power saving mode. + */ +#define CH_CFG_IDLE_LEAVE_HOOK() { \ + /* Idle-leave code here.*/ \ +} + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#define CH_CFG_IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#define CH_CFG_SYSTEM_TICK_HOOK() { \ + /* System tick event code here.*/ \ +} + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#define CH_CFG_SYSTEM_HALT_HOOK(reason) { \ + /* System halt code here.*/ \ +} + +/** + * @brief Trace hook. + * @details This hook is invoked each time a new record is written in the + * trace buffer. + */ +#define CH_CFG_TRACE_HOOK(tep) { \ + /* Trace code here.*/ \ +} + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* CHCONF_H */ + +/** @} */ diff --git a/testrt/VT_STORM/cfg/stm32g474re_nucleo64/halconf.h b/testrt/VT_STORM/cfg/stm32g474re_nucleo64/halconf.h new file mode 100644 index 000000000..757d5a99b --- /dev/null +++ b/testrt/VT_STORM/cfg/stm32g474re_nucleo64/halconf.h @@ -0,0 +1,531 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef HALCONF_H +#define HALCONF_H + +#define _CHIBIOS_HAL_CONF_ +#define _CHIBIOS_HAL_CONF_VER_7_1_ + +#include "mcuconf.h" + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the cryptographic subsystem. + */ +#if !defined(HAL_USE_CRY) || defined(__DOXYGEN__) +#define HAL_USE_CRY FALSE +#endif + +/** + * @brief Enables the DAC subsystem. + */ +#if !defined(HAL_USE_DAC) || defined(__DOXYGEN__) +#define HAL_USE_DAC FALSE +#endif + +/** + * @brief Enables the EFlash subsystem. + */ +#if !defined(HAL_USE_EFL) || defined(__DOXYGEN__) +#define HAL_USE_EFL FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the I2S subsystem. + */ +#if !defined(HAL_USE_I2S) || defined(__DOXYGEN__) +#define HAL_USE_I2S FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL TRUE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SIO subsystem. + */ +#if !defined(HAL_USE_SIO) || defined(__DOXYGEN__) +#define HAL_USE_SIO FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the TRNG subsystem. + */ +#if !defined(HAL_USE_TRNG) || defined(__DOXYGEN__) +#define HAL_USE_TRNG FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/** + * @brief Enables the WDG subsystem. + */ +#if !defined(HAL_USE_WDG) || defined(__DOXYGEN__) +#define HAL_USE_WDG FALSE +#endif + +/** + * @brief Enables the WSPI subsystem. + */ +#if !defined(HAL_USE_WSPI) || defined(__DOXYGEN__) +#define HAL_USE_WSPI FALSE +#endif + +/*===========================================================================*/ +/* PAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(PAL_USE_CALLBACKS) || defined(__DOXYGEN__) +#define PAL_USE_CALLBACKS TRUE +#endif + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(PAL_USE_WAIT) || defined(__DOXYGEN__) +#define PAL_USE_WAIT TRUE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/** + * @brief Enforces the driver to use direct callbacks rather than OSAL events. + */ +#if !defined(CAN_ENFORCE_USE_CALLBACKS) || defined(__DOXYGEN__) +#define CAN_ENFORCE_USE_CALLBACKS FALSE +#endif + +/*===========================================================================*/ +/* CRY driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the SW fall-back of the cryptographic driver. + * @details When enabled, this option, activates a fall-back software + * implementation for algorithms not supported by the underlying + * hardware. + * @note Fall-back implementations may not be present for all algorithms. + */ +#if !defined(HAL_CRY_USE_FALLBACK) || defined(__DOXYGEN__) +#define HAL_CRY_USE_FALLBACK FALSE +#endif + +/** + * @brief Makes the driver forcibly use the fall-back implementations. + */ +#if !defined(HAL_CRY_ENFORCE_FALLBACK) || defined(__DOXYGEN__) +#define HAL_CRY_ENFORCE_FALLBACK FALSE +#endif + +/*===========================================================================*/ +/* DAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(DAC_USE_WAIT) || defined(__DOXYGEN__) +#define DAC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p dacAcquireBus() and @p dacReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(DAC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define DAC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the zero-copy API. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intervals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/** + * @brief OCR initialization constant for V20 cards. + */ +#if !defined(SDC_INIT_OCR_V20) || defined(__DOXYGEN__) +#define SDC_INIT_OCR_V20 0x50FF8000U +#endif + +/** + * @brief OCR initialization constant for non-V20 cards. + */ +#if !defined(SDC_INIT_OCR) || defined(__DOXYGEN__) +#define SDC_INIT_OCR 0x80100000U +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 16 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SERIAL_USB driver related setting. */ +/*===========================================================================*/ + +/** + * @brief Serial over USB buffers size. + * @details Configuration parameter, the buffer size must be a multiple of + * the USB data endpoint maximum packet size. + * @note The default is 256 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_USB_BUFFERS_SIZE 256 +#endif + +/** + * @brief Serial over USB number of buffers. + * @note The default is 2 buffers. + */ +#if !defined(SERIAL_USB_BUFFERS_NUMBER) || defined(__DOXYGEN__) +#define SERIAL_USB_BUFFERS_NUMBER 2 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables circular transfers APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_CIRCULAR) || defined(__DOXYGEN__) +#define SPI_USE_CIRCULAR FALSE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +/** + * @brief Handling method for SPI CS line. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_SELECT_MODE) || defined(__DOXYGEN__) +#define SPI_SELECT_MODE SPI_SELECT_MODE_PAD +#endif + +/*===========================================================================*/ +/* UART driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(UART_USE_WAIT) || defined(__DOXYGEN__) +#define UART_USE_WAIT FALSE +#endif + +/** + * @brief Enables the @p uartAcquireBus() and @p uartReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(UART_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define UART_USE_MUTUAL_EXCLUSION FALSE +#endif + +/*===========================================================================*/ +/* USB driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(USB_USE_WAIT) || defined(__DOXYGEN__) +#define USB_USE_WAIT FALSE +#endif + +/*===========================================================================*/ +/* WSPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(WSPI_USE_WAIT) || defined(__DOXYGEN__) +#define WSPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p wspiAcquireBus() and @p wspiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(WSPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define WSPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +#endif /* HALCONF_H */ + +/** @} */ diff --git a/testrt/VT_STORM/cfg/stm32g474re_nucleo64/mcuconf.h b/testrt/VT_STORM/cfg/stm32g474re_nucleo64/mcuconf.h new file mode 100644 index 000000000..6e1ee0ea3 --- /dev/null +++ b/testrt/VT_STORM/cfg/stm32g474re_nucleo64/mcuconf.h @@ -0,0 +1,387 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/* + * STM32G4xx drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +#ifndef MCUCONF_H +#define MCUCONF_H + +#define STM32G4xx_MCUCONF +#define STM32G473_MCUCONF +#define STM32G483_MCUCONF +#define STM32G474_MCUCONF +#define STM32G484_MCUCONF + +/* + * HAL driver system settings. + */ +#define STM32_NO_INIT FALSE +#define STM32_VOS STM32_VOS_RANGE1 +#define STM32_PWR_BOOST TRUE +#define STM32_PWR_CR2 (PWR_CR2_PLS_LEV0) +#define STM32_PWR_CR3 (PWR_CR3_EIWF) +#define STM32_PWR_CR4 (0U) +#define STM32_PWR_PUCRA (0U) +#define STM32_PWR_PDCRA (0U) +#define STM32_PWR_PUCRB (0U) +#define STM32_PWR_PDCRB (0U) +#define STM32_PWR_PUCRC (0U) +#define STM32_PWR_PDCRC (0U) +#define STM32_PWR_PUCRD (0U) +#define STM32_PWR_PDCRD (0U) +#define STM32_PWR_PUCRE (0U) +#define STM32_PWR_PDCRE (0U) +#define STM32_PWR_PUCRF (0U) +#define STM32_PWR_PDCRF (0U) +#define STM32_PWR_PUCRG (0U) +#define STM32_PWR_PDCRG (0U) +#define STM32_HSI16_ENABLED TRUE +#define STM32_HSI48_ENABLED TRUE +#define STM32_HSE_ENABLED TRUE +#define STM32_LSI_ENABLED FALSE +#define STM32_LSE_ENABLED TRUE +#define STM32_SW STM32_SW_PLLRCLK +#define STM32_PLLSRC STM32_PLLSRC_HSE +#define STM32_PLLM_VALUE 6 +#define STM32_PLLN_VALUE 85 +#define STM32_PLLPDIV_VALUE 0 +#define STM32_PLLP_VALUE 7 +#define STM32_PLLQ_VALUE 8 +#define STM32_PLLR_VALUE 2 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV2 +#define STM32_PPRE2 STM32_PPRE2_DIV1 +#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK +#define STM32_MCOPRE STM32_MCOPRE_DIV1 +#define STM32_LSCOSEL STM32_LSCOSEL_NOCLOCK + +/* + * Peripherals clock sources. + */ +#define STM32_USART1SEL STM32_USART1SEL_SYSCLK +#define STM32_USART2SEL STM32_USART2SEL_SYSCLK +#define STM32_USART3SEL STM32_USART3SEL_SYSCLK +#define STM32_UART4SEL STM32_UART4SEL_SYSCLK +#define STM32_UART5SEL STM32_UART5SEL_SYSCLK +#define STM32_LPUART1SEL STM32_LPUART1SEL_PCLK1 +#define STM32_I2C1SEL STM32_I2C1SEL_PCLK1 +#define STM32_I2C2SEL STM32_I2C2SEL_PCLK1 +#define STM32_I2C3SEL STM32_I2C3SEL_PCLK1 +#define STM32_I2C4SEL STM32_I2C4SEL_PCLK1 +#define STM32_LPTIM1SEL STM32_LPTIM1SEL_PCLK1 +#define STM32_SAI1SEL STM32_SAI1SEL_SYSCLK +#define STM32_I2S23SEL STM32_I2S23SEL_SYSCLK +#define STM32_FDCANSEL STM32_FDCANSEL_HSE +#define STM32_CLK48SEL STM32_CLK48SEL_HSI48 +#define STM32_ADC12SEL STM32_ADC12SEL_PLLPCLK +#define STM32_ADC345SEL STM32_ADC345SEL_PLLPCLK +#define STM32_QSPISEL STM32_QSPISEL_SYSCLK +#define STM32_RTCSEL STM32_RTCSEL_NOCLOCK + +/* + * IRQ system settings. + */ +#define STM32_IRQ_EXTI0_PRIORITY 6 +#define STM32_IRQ_EXTI1_PRIORITY 6 +#define STM32_IRQ_EXTI2_PRIORITY 6 +#define STM32_IRQ_EXTI3_PRIORITY 6 +#define STM32_IRQ_EXTI4_PRIORITY 6 +#define STM32_IRQ_EXTI5_9_PRIORITY 6 +#define STM32_IRQ_EXTI10_15_PRIORITY 6 +#define STM32_IRQ_EXTI164041_PRIORITY 6 +#define STM32_IRQ_EXTI17_PRIORITY 6 +#define STM32_IRQ_EXTI18_PRIORITY 6 +#define STM32_IRQ_EXTI19_PRIORITY 6 +#define STM32_IRQ_EXTI20_PRIORITY 6 +#define STM32_IRQ_EXTI212229_PRIORITY 6 +#define STM32_IRQ_EXTI30_32_PRIORITY 6 +#define STM32_IRQ_EXTI33_PRIORITY 6 + +#define STM32_IRQ_FDCAN1_PRIORITY 10 +#define STM32_IRQ_FDCAN2_PRIORITY 10 +#define STM32_IRQ_FDCAN3_PRIORITY 10 + +#define STM32_IRQ_TIM1_BRK_TIM15_PRIORITY 7 +#define STM32_IRQ_TIM1_UP_TIM16_PRIORITY 7 +#define STM32_IRQ_TIM1_TRGCO_TIM17_PRIORITY 7 +#define STM32_IRQ_TIM1_CC_PRIORITY 7 +#define STM32_IRQ_TIM2_PRIORITY 7 +#define STM32_IRQ_TIM3_PRIORITY 7 +#define STM32_IRQ_TIM4_PRIORITY 7 +#define STM32_IRQ_TIM5_PRIORITY 7 +#define STM32_IRQ_TIM6_PRIORITY 7 +#define STM32_IRQ_TIM7_PRIORITY 7 +#define STM32_IRQ_TIM8_UP_PRIORITY 7 +#define STM32_IRQ_TIM8_CC_PRIORITY 7 +#define STM32_IRQ_TIM20_UP_PRIORITY 7 +#define STM32_IRQ_TIM20_CC_PRIORITY 7 + +#define STM32_IRQ_USART1_PRIORITY 12 +#define STM32_IRQ_USART2_PRIORITY 12 +#define STM32_IRQ_USART3_PRIORITY 12 +#define STM32_IRQ_UART4_PRIORITY 12 +#define STM32_IRQ_UART5_PRIORITY 12 +#define STM32_IRQ_LPUART1_PRIORITY 12 + +/* + * ADC driver system settings. + */ +#define STM32_ADC_DUAL_MODE FALSE +#define STM32_ADC_COMPACT_SAMPLES FALSE +#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_USE_ADC2 TRUE +#define STM32_ADC_USE_ADC3 TRUE +#define STM32_ADC_USE_ADC4 TRUE +#define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID_ANY +#define STM32_ADC_ADC2_DMA_STREAM STM32_DMA_STREAM_ID_ANY +#define STM32_ADC_ADC3_DMA_STREAM STM32_DMA_STREAM_ID_ANY +#define STM32_ADC_ADC4_DMA_STREAM STM32_DMA_STREAM_ID_ANY +#define STM32_ADC_ADC1_DMA_PRIORITY 2 +#define STM32_ADC_ADC2_DMA_PRIORITY 2 +#define STM32_ADC_ADC3_DMA_PRIORITY 2 +#define STM32_ADC_ADC4_DMA_PRIORITY 2 +#define STM32_ADC_ADC12_IRQ_PRIORITY 5 +#define STM32_ADC_ADC3_IRQ_PRIORITY 5 +#define STM32_ADC_ADC4_IRQ_PRIORITY 5 +#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 5 +#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY 5 +#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY 5 +#define STM32_ADC_ADC4_DMA_IRQ_PRIORITY 5 +#define STM32_ADC_ADC12_CLOCK_MODE ADC_CCR_CKMODE_AHB_DIV4 +#define STM32_ADC_ADC345_CLOCK_MODE ADC_CCR_CKMODE_AHB_DIV4 +#define STM32_ADC_ADC12_PRESC ADC_CCR_PRESC_DIV2 +#define STM32_ADC_ADC345_PRESC ADC_CCR_PRESC_DIV2 + +/* + * CAN driver system settings. + */ +#define STM32_CAN_USE_FDCAN1 FALSE +#define STM32_CAN_USE_FDCAN2 FALSE +#define STM32_CAN_USE_FDCAN3 FALSE + +/* + * DAC driver system settings. + */ +#define STM32_DAC_DUAL_MODE FALSE +#define STM32_DAC_USE_DAC1_CH1 FALSE +#define STM32_DAC_USE_DAC1_CH2 FALSE +#define STM32_DAC_USE_DAC2_CH1 FALSE +#define STM32_DAC_USE_DAC3_CH1 FALSE +#define STM32_DAC_USE_DAC3_CH2 FALSE +#define STM32_DAC_USE_DAC4_CH1 FALSE +#define STM32_DAC_USE_DAC4_CH2 FALSE +#define STM32_DAC_DAC1_CH1_IRQ_PRIORITY 10 +#define STM32_DAC_DAC1_CH2_IRQ_PRIORITY 10 +#define STM32_DAC_DAC2_CH1_IRQ_PRIORITY 10 +#define STM32_DAC_DAC3_CH1_IRQ_PRIORITY 10 +#define STM32_DAC_DAC3_CH2_IRQ_PRIORITY 10 +#define STM32_DAC_DAC4_CH1_IRQ_PRIORITY 10 +#define STM32_DAC_DAC4_CH2_IRQ_PRIORITY 10 +#define STM32_DAC_DAC1_CH1_DMA_PRIORITY 2 +#define STM32_DAC_DAC1_CH2_DMA_PRIORITY 2 +#define STM32_DAC_DAC2_CH1_DMA_PRIORITY 2 +#define STM32_DAC_DAC3_CH1_DMA_PRIORITY 2 +#define STM32_DAC_DAC3_CH2_DMA_PRIORITY 2 +#define STM32_DAC_DAC4_CH1_DMA_PRIORITY 2 +#define STM32_DAC_DAC4_CH2_DMA_PRIORITY 2 +#define STM32_DAC_DAC1_CH1_DMA_STREAM STM32_DMA_STREAM_ID_ANY +#define STM32_DAC_DAC1_CH2_DMA_STREAM STM32_DMA_STREAM_ID_ANY +#define STM32_DAC_DAC2_CH1_DMA_STREAM STM32_DMA_STREAM_ID_ANY +#define STM32_DAC_DAC3_CH1_DMA_STREAM STM32_DMA_STREAM_ID_ANY +#define STM32_DAC_DAC3_CH2_DMA_STREAM STM32_DMA_STREAM_ID_ANY +#define STM32_DAC_DAC4_CH1_DMA_STREAM STM32_DMA_STREAM_ID_ANY +#define STM32_DAC_DAC4_CH2_DMA_STREAM STM32_DMA_STREAM_ID_ANY + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 FALSE +#define STM32_GPT_USE_TIM2 FALSE +#define STM32_GPT_USE_TIM3 FALSE +#define STM32_GPT_USE_TIM4 FALSE +#define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_USE_TIM6 FALSE +#define STM32_GPT_USE_TIM7 FALSE +#define STM32_GPT_USE_TIM8 FALSE +#define STM32_GPT_USE_TIM15 FALSE +#define STM32_GPT_USE_TIM16 FALSE +#define STM32_GPT_USE_TIM17 FALSE + +/* + * I2C driver system settings. + */ +#define STM32_I2C_USE_I2C1 FALSE +#define STM32_I2C_USE_I2C2 FALSE +#define STM32_I2C_USE_I2C3 FALSE +#define STM32_I2C_USE_I2C4 FALSE +#define STM32_I2C_BUSY_TIMEOUT 50 +#define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID_ANY +#define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY +#define STM32_I2C_I2C2_RX_DMA_STREAM STM32_DMA_STREAM_ID_ANY +#define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY +#define STM32_I2C_I2C3_RX_DMA_STREAM STM32_DMA_STREAM_ID_ANY +#define STM32_I2C_I2C3_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY +#define STM32_I2C_I2C4_RX_DMA_STREAM STM32_DMA_STREAM_ID_ANY +#define STM32_I2C_I2C4_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY +#define STM32_I2C_I2C1_IRQ_PRIORITY 5 +#define STM32_I2C_I2C2_IRQ_PRIORITY 5 +#define STM32_I2C_I2C3_IRQ_PRIORITY 5 +#define STM32_I2C_I2C4_IRQ_PRIORITY 5 +#define STM32_I2C_I2C1_DMA_PRIORITY 3 +#define STM32_I2C_I2C2_DMA_PRIORITY 3 +#define STM32_I2C_I2C3_DMA_PRIORITY 3 +#define STM32_I2C_I2C4_DMA_PRIORITY 3 +#define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure") + +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 FALSE +#define STM32_ICU_USE_TIM4 FALSE +#define STM32_ICU_USE_TIM5 FALSE +#define STM32_ICU_USE_TIM8 FALSE +#define STM32_ICU_USE_TIM15 FALSE +#define STM32_ICU_USE_TIM16 FALSE +#define STM32_ICU_USE_TIM17 FALSE + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_ADVANCED FALSE +#define STM32_PWM_USE_TIM1 FALSE +#define STM32_PWM_USE_TIM2 FALSE +#define STM32_PWM_USE_TIM3 FALSE +#define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM5 FALSE +#define STM32_PWM_USE_TIM8 FALSE +#define STM32_PWM_USE_TIM15 FALSE +#define STM32_PWM_USE_TIM16 FALSE +#define STM32_PWM_USE_TIM17 FALSE +#define STM32_PWM_USE_TIM20 FALSE + +/* + * RTC driver system settings. + */ + +/* + * SDC driver system settings. + */ + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 FALSE +#define STM32_SERIAL_USE_USART2 FALSE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USE_LPUART1 TRUE + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 FALSE +#define STM32_SPI_USE_SPI2 FALSE +#define STM32_SPI_USE_SPI3 FALSE +#define STM32_SPI_USE_SPI4 FALSE +#define STM32_SPI_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID_ANY +#define STM32_SPI_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY +#define STM32_SPI_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID_ANY +#define STM32_SPI_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY +#define STM32_SPI_SPI3_RX_DMA_STREAM STM32_DMA_STREAM_ID_ANY +#define STM32_SPI_SPI3_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY +#define STM32_SPI_SPI4_RX_DMA_STREAM STM32_DMA_STREAM_ID_ANY +#define STM32_SPI_SPI4_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 +#define STM32_SPI_SPI4_DMA_PRIORITY 1 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_SPI4_IRQ_PRIORITY 10 +#define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure") + +/* + * ST driver system settings. + */ +#define STM32_ST_IRQ_PRIORITY 8 +#define STM32_ST_USE_TIMER 2 + +/* + * TRNG driver system settings. + */ +#define STM32_TRNG_USE_RNG1 FALSE + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 FALSE +#define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USE_UART4 FALSE +#define STM32_UART_USE_UART5 FALSE +#define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID_ANY +#define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY +#define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID_ANY +#define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY +#define STM32_UART_USART3_RX_DMA_STREAM STM32_DMA_STREAM_ID_ANY +#define STM32_UART_USART3_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY +#define STM32_UART_UART4_RX_DMA_STREAM STM32_DMA_STREAM_ID_ANY +#define STM32_UART_UART4_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY +#define STM32_UART_UART5_RX_DMA_STREAM STM32_DMA_STREAM_ID_ANY +#define STM32_UART_UART5_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_UART4_DMA_PRIORITY 0 +#define STM32_UART_UART5_DMA_PRIORITY 0 +#define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure") + +/* + * USB driver system settings. + */ +#define STM32_USB_USE_USB1 FALSE +#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE +#define STM32_USB_USB1_HP_IRQ_PRIORITY 13 +#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 + +/* + * WDG driver system settings. + */ +#define STM32_WDG_USE_IWDG FALSE + +/* + * WSPI driver system settings. + */ +#define STM32_WSPI_USE_QUADSPI1 FALSE +#define STM32_WSPI_QUADSPI1_DMA_STREAM STM32_DMA_STREAM_ID_ANY + +#endif /* MCUCONF_H */ diff --git a/testrt/VT_STORM/cfg/stm32g474re_nucleo64/portab.c b/testrt/VT_STORM/cfg/stm32g474re_nucleo64/portab.c new file mode 100644 index 000000000..cc5ff4ddb --- /dev/null +++ b/testrt/VT_STORM/cfg/stm32g474re_nucleo64/portab.c @@ -0,0 +1,67 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file portab.c + * @brief Application portability module code. + * + * @addtogroup application_portability + * @{ + */ + +#include "hal.h" +#include "vt_storm.h" + +#include "portab.h" + +/*===========================================================================*/ +/* Module local definitions. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Module exported variables. */ +/*===========================================================================*/ + +/* + * VT Storm configuration. + */ +const vt_storm_config_t portab_vt_storm_config = { + (BaseSequentialStream *)&PORTAB_SD1, + PORTAB_LINE_LED1, + STM32_SYSCLK +}; + +/*===========================================================================*/ +/* Module local types. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Module local variables. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Module local functions. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Module exported functions. */ +/*===========================================================================*/ + +void portab_setup(void) { + +} + +/** @} */ diff --git a/testrt/VT_STORM/cfg/stm32g474re_nucleo64/portab.h b/testrt/VT_STORM/cfg/stm32g474re_nucleo64/portab.h new file mode 100644 index 000000000..42af87f73 --- /dev/null +++ b/testrt/VT_STORM/cfg/stm32g474re_nucleo64/portab.h @@ -0,0 +1,77 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file portab.h + * @brief Application portability macros and structures. + * + * @addtogroup application_portability + * @{ + */ + +#ifndef PORTAB_H +#define PORTAB_H + +/*===========================================================================*/ +/* Module constants. */ +/*===========================================================================*/ + +#define PORTAB_LINE_LED1 LINE_LED +#define PORTAB_LED_OFF PAL_LOW +#define PORTAB_LED_ON PAL_HIGH + +#define PORTAB_LINE_BUTTON LINE_BUTTON +#define PORTAB_BUTTON_PRESSED PAL_HIGH + +#define PORTAB_SD1 LPSD1 + +/*===========================================================================*/ +/* Module pre-compile time settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Derived constants and error checks. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Module data structures and types. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Module macros. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* External declarations. */ +/*===========================================================================*/ + +extern const vt_storm_config_t portab_vt_storm_config; + +#ifdef __cplusplus +extern "C" { +#endif + void portab_setup(void); +#ifdef __cplusplus +} +#endif + +/*===========================================================================*/ +/* Module inline functions. */ +/*===========================================================================*/ + +#endif /* PORTAB_H */ + +/** @} */ diff --git a/testrt/VT_STORM/main.c b/testrt/VT_STORM/main.c new file mode 100644 index 000000000..b382a43f5 --- /dev/null +++ b/testrt/VT_STORM/main.c @@ -0,0 +1,49 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#include "ch.h" +#include "hal.h" + +#include "vt_storm.h" + +#include "portab.h" + +/* + * Application entry point. + */ +int main(void) { + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* Serial Driver for output.*/ + sdStart(&PORTAB_SD1, NULL); + + /* Running the test.*/ + vt_storm_execute(&portab_vt_storm_config); + + /* Normal main() thread activity, nothing in this test.*/ + while (true) { + chThdSleepMilliseconds(5000); + } +} diff --git a/testrt/VT_STORM/make/stm32g474re_nucleo64.make b/testrt/VT_STORM/make/stm32g474re_nucleo64.make new file mode 100644 index 000000000..d3f5f7525 --- /dev/null +++ b/testrt/VT_STORM/make/stm32g474re_nucleo64.make @@ -0,0 +1,191 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -Og -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data. +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# Linker extra options here. +ifeq ($(USE_LDOPT),) + USE_LDOPT = +endif + +# Enable this if you want link time optimizations (LTO). +ifeq ($(USE_LTO),) + USE_LTO = yes +endif + +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no +endif + +# If enabled, this option makes the build process faster by not compiling +# modules not used in the current configuration. +ifeq ($(USE_SMART_BUILD),) + USE_SMART_BUILD = yes +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Stack size to be allocated to the Cortex-M process stack. This stack is +# the stack used by the main() thread. +ifeq ($(USE_PROCESS_STACKSIZE),) + USE_PROCESS_STACKSIZE = 0x400 +endif + +# Stack size to the allocated to the Cortex-M main/exceptions stack. This +# stack is used for processing interrupts and exceptions. +ifeq ($(USE_EXCEPTIONS_STACKSIZE),) + USE_EXCEPTIONS_STACKSIZE = 0x400 +endif + +# Enables the use of FPU (no, softfp, hard). +ifeq ($(USE_FPU),) + USE_FPU = no +endif + +# FPU-related options. +ifeq ($(USE_FPU_OPT),) + USE_FPU_OPT = -mfloat-abi=$(USE_FPU) -mfpu=fpv4-sp-d16 +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, target, sources and paths +# + +# Define project name here +PROJECT = ch + +# Target settings. +MCU = cortex-m4 + +# Imported source files and paths. +CHIBIOS := ../.. +CONFDIR := ./cfg/stm32g474re_nucleo64 +BUILDDIR := ./build/stm32g474re_nucleo64 +DEPDIR := ./.dep/stm32g474re_nucleo64 + +# Licensing files. +include $(CHIBIOS)/os/license/license.mk +# Startup files. +include $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32g4xx.mk +# HAL-OSAL files (optional). +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/hal/ports/STM32/STM32G4xx/platform.mk +include $(CHIBIOS)/os/hal/boards/ST_NUCLEO64_G474RE/board.mk +include $(CHIBIOS)/os/hal/osal/rt-nil/osal.mk +# RTOS files (optional). +include $(CHIBIOS)/os/rt/rt.mk +include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/port_v7m.mk +# Auto-build files in ./source recursively. +include $(CHIBIOS)/tools/mk/autobuild.mk +# Other files (optional). +#include $(CHIBIOS)/test/lib/test.mk +#include $(CHIBIOS)/test/rt/rt_test.mk +#include $(CHIBIOS)/test/oslib/oslib_test.mk +include $(CHIBIOS)/os/hal/lib/streams/streams.mk + +# Define linker script file here +LDSCRIPT= $(STARTUPLD)/STM32G474xE.ld + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(ALLCSRC) \ + $(TESTSRC) \ + $(CONFDIR)/portab.c \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = $(ALLCPPSRC) + +# List ASM source files here. +ASMSRC = $(ALLASMSRC) + +# List ASM with preprocessor source files here. +ASMXSRC = $(ALLXASMSRC) + +# Inclusion directories. +INCDIR = $(CONFDIR) $(ALLINC) $(TESTINC) + +# Define C warning options here. +CWARN = -Wall -Wextra -Wundef -Wstrict-prototypes + +# Define C++ warning options here. +CPPWARN = -Wall -Wextra -Wundef + +# +# Project, target, sources and paths +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user section +############################################################################## + +############################################################################## +# Common rules +# + +RULESPATH = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/mk +include $(RULESPATH)/arm-none-eabi.mk +include $(RULESPATH)/rules.mk + +# +# Common rules +############################################################################## + +############################################################################## +# Custom rules +# + +# +# Custom rules +############################################################################## diff --git a/testrt/VT_STORM/source/vt_storm.c b/testrt/VT_STORM/source/vt_storm.c new file mode 100644 index 000000000..11586a718 --- /dev/null +++ b/testrt/VT_STORM/source/vt_storm.c @@ -0,0 +1,281 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file irq_storm.c + * @brief IRQ Storm stress test code. + * + * @addtogroup IRQ_STORM + * @{ + */ + +#include + +#include "ch.h" +#include "hal.h" + +#include "chprintf.h" + +#include "vt_storm.h" + +/*===========================================================================*/ +/* Module local definitions. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Module exported variables. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Module local types. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Module local variables. */ +/*===========================================================================*/ + +static const vt_storm_config_t *config; + +static virtual_timer_t watchdog; +static virtual_timer_t wrapper; +static virtual_timer_t sweeper0, sweeperm1, sweeperp1, sweeperm3, sweeperp3; +static volatile sysinterval_t delay; +static volatile bool saturated; + +/*===========================================================================*/ +/* Module local functions. */ +/*===========================================================================*/ + +static void watchdog_cb(void *p) { + + (void)p; + + chSysLockFromISR(); + chVTResetI(&sweeper0); + chVTResetI(&sweeperm1); + chVTResetI(&sweeperp1); + chVTResetI(&sweeperm3); + chVTResetI(&sweeperp3); + chVTResetI(&wrapper); + chSysUnlockFromISR(); + + saturated = true; +} + +static void wrapper_cb(void *p) { + + (void)p; +} + +static void sweeper0_cb(void *p) { + + (void)p; + + chSysLockFromISR(); +#if VT_STORM_CFG_RANDOMIZE != FALSE + /* Pseudo-random delay.*/ + { + static volatile unsigned x = 0; + unsigned r; + + r = rand() & 31; + while (r--) + x++; + } +#endif + chVTSetI(&wrapper, (sysinterval_t)-1, wrapper_cb, NULL); + chVTSetI(&sweeper0, delay, sweeper0_cb, NULL); + chSysUnlockFromISR(); +} + +static void sweeperm1_cb(void *p) { + + (void)p; + + chSysLockFromISR(); +#if VT_STORM_CFG_RANDOMIZE != FALSE + /* Pseudo-random delay.*/ + { + static volatile unsigned x = 0; + unsigned r; + + r = rand() & 31; + while (r--) + x++; + } +#endif + chVTSetI(&sweeperm1, delay - 1, sweeperm1_cb, NULL); + chSysUnlockFromISR(); +} + +static void sweeperp1_cb(void *p) { + + (void)p; + + chSysLockFromISR(); +#if VT_STORM_CFG_RANDOMIZE != FALSE + /* Pseudo-random delay.*/ + { + static volatile unsigned x = 0; + unsigned r; + + r = rand() & 31; + while (r--) + x++; + } +#endif + chVTSetI(&sweeperp1, delay + 1, sweeperp1_cb, NULL); + chSysUnlockFromISR(); +} + +static void sweeperm3_cb(void *p) { + + (void)p; + + chSysLockFromISR(); +#if VT_STORM_CFG_RANDOMIZE != FALSE + /* Pseudo-random delay.*/ + { + static volatile unsigned x = 0; + unsigned r; + + r = rand() & 31; + while (r--) + x++; + } +#endif + chVTSetI(&sweeperm3, delay - 3, sweeperm3_cb, NULL); + chSysUnlockFromISR(); +} + +static void sweeperp3_cb(void *p) { + + (void)p; + + chSysLockFromISR(); +#if VT_STORM_CFG_RANDOMIZE != FALSE + /* Pseudo-random delay.*/ + { + static volatile unsigned x = 0; + unsigned r; + + r = rand() & 31; + while (r--) + x++; + } +#endif + chVTSetI(&sweeperp3, delay + 3, sweeperp3_cb, NULL); + chSysUnlockFromISR(); +} + +/*===========================================================================*/ +/* Module exported functions. */ +/*===========================================================================*/ + +/** + * @brief VT storm execution. + * + * @param[in] cfg pointer to the test configuration structure + * + * @api + */ +void vt_storm_execute(const vt_storm_config_t *cfg) { + unsigned i; + + config = cfg; + + /* Printing environment information.*/ + chprintf(cfg->out, ""); + chprintf(cfg->out, "\r\n*** ChibiOS/RT VT-STORM long duration test\r\n***\r\n"); + chprintf(cfg->out, "*** Kernel: %s\r\n", CH_KERNEL_VERSION); + chprintf(cfg->out, "*** Compiled: %s\r\n", __DATE__ " - " __TIME__); +#ifdef PORT_COMPILER_NAME + chprintf(cfg->out, "*** Compiler: %s\r\n", PORT_COMPILER_NAME); +#endif + chprintf(cfg->out, "*** Architecture: %s\r\n", PORT_ARCHITECTURE_NAME); +#ifdef PORT_CORE_VARIANT_NAME + chprintf(cfg->out, "*** Core Variant: %s\r\n", PORT_CORE_VARIANT_NAME); +#endif + chprintf(cfg->out, "*** System Clock: %d\r\n", cfg->sysclk); +#ifdef PORT_INFO + chprintf(cfg->out, "*** Port Info: %s\r\n", PORT_INFO); +#endif +#ifdef PLATFORM_NAME + chprintf(cfg->out, "*** Platform: %s\r\n", PLATFORM_NAME); +#endif +#ifdef BOARD_NAME + chprintf(cfg->out, "*** Test Board: %s\r\n", BOARD_NAME); +#endif + chprintf(cfg->out, "***\r\n"); + chprintf(cfg->out, "*** Randomize: %d\r\n", VT_STORM_CFG_RANDOMIZE); + chprintf(cfg->out, "*** Minimum Delay: %d ticks\r\n", VT_STORM_CFG_MIN_DELAY); + chprintf(cfg->out, "*** System Time size: %d bits\r\n", CH_CFG_ST_RESOLUTION); + chprintf(cfg->out, "*** Intervals size: %d bits\r\n", CH_CFG_INTERVALS_SIZE); + chprintf(cfg->out, "*** SysTick: %d Hz\r\n", CH_CFG_ST_FREQUENCY); + chprintf(cfg->out, "*** Delta: %d cycles\r\n", CH_CFG_ST_TIMEDELTA); + chprintf(cfg->out, "\r\n"); + + for (i = 1; i <= VT_STORM_CFG_ITERATIONS; i++) { + + chprintf(cfg->out, "Iteration %d\r\n", i); + chThdSleepS(TIME_MS2I(10)); + + delay = 120; + saturated = false; + do { + /* Starting sweepers.*/ + chSysLock(); + chVTSetI(&watchdog, TIME_MS2I(501), watchdog_cb, NULL); + chVTSetI(&sweeper0, delay, sweeper0_cb, NULL); + chVTSetI(&sweeperm1, delay - 1, sweeperm1_cb, NULL); + chVTSetI(&sweeperp1, delay + 1, sweeperp1_cb, NULL); + chVTSetI(&sweeperm3, delay - 3, sweeperm3_cb, NULL); + chVTSetI(&sweeperp3, delay + 3, sweeperp3_cb, NULL); + chVTSetI(&wrapper, (sysinterval_t) - 1, wrapper_cb, NULL); + + /* Letting them run for half second.*/ + chThdSleepS(TIME_MS2I(500)); + + /* Stopping everything.*/ + chVTResetI(&watchdog); + chVTResetI(&sweeper0); + chVTResetI(&sweeperm1); + chVTResetI(&sweeperp1); + chVTResetI(&sweeperm3); + chVTResetI(&sweeperp3); + chVTResetI(&wrapper); + chSysUnlock(); + + if (saturated) { + chprintf(cfg->out, "#"); + break; + } + + palToggleLine(config->line); + chprintf(cfg->out, "."); + delay--; + } while (delay >= VT_STORM_CFG_MIN_DELAY); + + if (saturated) { + chprintf(cfg->out, "\r\nSaturated at %u uS\r\n\r\n", TIME_I2US(delay)); + } + else { + chprintf(cfg->out, "\r\nNo Saturation Reached\r\n\r\n", TIME_I2US(delay)); + } + } +} + +/** @} */ diff --git a/testrt/VT_STORM/source/vt_storm.h b/testrt/VT_STORM/source/vt_storm.h new file mode 100644 index 000000000..e1ebd0f9f --- /dev/null +++ b/testrt/VT_STORM/source/vt_storm.h @@ -0,0 +1,111 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file vt_storm.h + * @brief VT Storm stress test header. + * + * @addtogroup VT_STORM + * @{ + */ + +#ifndef VT_STORM_H +#define VT_STORM_H + +/*===========================================================================*/ +/* Module constants. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Module pre-compile time settings. */ +/*===========================================================================*/ + +/** + * @name Configuration options + * @{ + */ +/** + * @brief Timings randomization. + */ +#if !defined(VT_STORM_CFG_RANDOMIZE) || defined(__DOXYGEN__) +#define VT_STORM_CFG_RANDOMIZE TRUE +#endif + +/** + * @brief Number of test iterations. + */ +#if !defined(VT_STORM_CFG_ITERATIONS) || defined(__DOXYGEN__) +#define VT_STORM_CFG_ITERATIONS 100 +#endif + +/** + * @brief Minimum delay for each iteration. + */ +#if !defined(VT_STORM_CFG_MIN_DELAY) || defined(__DOXYGEN__) +#define VT_STORM_CFG_MIN_DELAY 5 +#endif +/** @} */ + +/*===========================================================================*/ +/* Derived constants and error checks. */ +/*===========================================================================*/ + +#if (VT_STORM_CFG_MIN_DELAY < 5) || (VT_STORM_CFG_MIN_DELAY > 100) +#error "invalid VT_STORM_CFG_MIN_DELAY value" +#endif + +/*===========================================================================*/ +/* Module data structures and types. */ +/*===========================================================================*/ + +typedef struct { + /** + * @brief Stream for output. + */ + BaseSequentialStream *out; + /** + * @brief LED line. + */ + ioline_t line; + /** + * @brief System clock. + */ + uint32_t sysclk; +} vt_storm_config_t; + +/*===========================================================================*/ +/* Module macros. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* External declarations. */ +/*===========================================================================*/ + +#ifdef __cplusplus +extern "C" { +#endif + void vt_storm_execute(const vt_storm_config_t *cfg); +#ifdef __cplusplus +} +#endif + +/*===========================================================================*/ +/* Module inline functions. */ +/*===========================================================================*/ + +#endif /* VT_STORM_H */ + +/** @} */ diff --git a/tools/ftl/processors/conf/mcuconf_stm32h743xx/mcuconf.h.ftl b/tools/ftl/processors/conf/mcuconf_stm32h743xx/mcuconf.h.ftl index 48a2e8b04..51c701ec8 100644 --- a/tools/ftl/processors/conf/mcuconf_stm32h743xx/mcuconf.h.ftl +++ b/tools/ftl/processors/conf/mcuconf_stm32h743xx/mcuconf.h.ftl @@ -235,7 +235,7 @@ * ADC driver system settings. */ #define STM32_ADC_DUAL_MODE ${doc.STM32_ADC_DUAL_MODE!"FALSE"} -#define STM32_ADC_COMPACT_SAMPLES ${doc.STM32_ADC_COMPACT_SAMPLES!"FALSE"} +#define STM32_ADC_SAMPLES_SIZE ${doc.STM32_ADC_SAMPLES_SIZE!"16"} #define STM32_ADC_USE_ADC12 ${doc.STM32_ADC_USE_ADC12!"TRUE"} #define STM32_ADC_USE_ADC3 ${doc.STM32_ADC_USE_ADC3!"FALSE"} #define STM32_ADC_ADC12_DMA_STREAM ${doc.STM32_ADC_ADC12_DMA_STREAM!"STM32_DMA_STREAM_ID_ANY"}