diff --git a/demos/STM32/RT-STM32F767ZI-NUCLEO144/mcuconf.h b/demos/STM32/RT-STM32F767ZI-NUCLEO144/mcuconf.h index fd9272b39..de50e1bcb 100644 --- a/demos/STM32/RT-STM32F767ZI-NUCLEO144/mcuconf.h +++ b/demos/STM32/RT-STM32F767ZI-NUCLEO144/mcuconf.h @@ -190,13 +190,13 @@ #define STM32_I2C_USE_I2C4 FALSE #define STM32_I2C_BUSY_TIMEOUT 50 #define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) -#define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) +#define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) #define STM32_I2C_I2C2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) #define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) #define STM32_I2C_I2C3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) #define STM32_I2C_I2C3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) #define STM32_I2C_I2C4_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) -#define STM32_I2C_I2C4_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) +#define STM32_I2C_I2C4_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) #define STM32_I2C_I2C1_IRQ_PRIORITY 5 #define STM32_I2C_I2C2_IRQ_PRIORITY 5 #define STM32_I2C_I2C3_IRQ_PRIORITY 5 diff --git a/demos/STM32/RT-STM32F769I-DISCOVERY/mcuconf.h b/demos/STM32/RT-STM32F769I-DISCOVERY/mcuconf.h index 10436986d..5428aadc6 100644 --- a/demos/STM32/RT-STM32F769I-DISCOVERY/mcuconf.h +++ b/demos/STM32/RT-STM32F769I-DISCOVERY/mcuconf.h @@ -190,13 +190,13 @@ #define STM32_I2C_USE_I2C4 FALSE #define STM32_I2C_BUSY_TIMEOUT 50 #define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) -#define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) +#define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) #define STM32_I2C_I2C2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) #define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) #define STM32_I2C_I2C3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) #define STM32_I2C_I2C3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) #define STM32_I2C_I2C4_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) -#define STM32_I2C_I2C4_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) +#define STM32_I2C_I2C4_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) #define STM32_I2C_I2C1_IRQ_PRIORITY 5 #define STM32_I2C_I2C2_IRQ_PRIORITY 5 #define STM32_I2C_I2C3_IRQ_PRIORITY 5 diff --git a/os/hal/ports/STM32/STM32F7xx/stm32_registry.h b/os/hal/ports/STM32/STM32F7xx/stm32_registry.h index 6da55e7e8..124a57f92 100644 --- a/os/hal/ports/STM32/STM32F7xx/stm32_registry.h +++ b/os/hal/ports/STM32/STM32F7xx/stm32_registry.h @@ -1163,7 +1163,7 @@ #define STM32_I2C3_ERROR_NUMBER 73 #define STM32_I2C3_RX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 1) |\ STM32_DMA_STREAM_ID_MSK(1, 2)) -#define STM32_I2C3_RX_DMA_CHN 0x00000300 +#define STM32_I2C3_RX_DMA_CHN 0x00000310 #define STM32_I2C3_TX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 0) |\ STM32_DMA_STREAM_ID_MSK(1, 4)) #define STM32_I2C3_TX_DMA_CHN 0x00030008 @@ -1173,8 +1173,10 @@ #define STM32_I2C4_ERROR_HANDLER Vector1C0 #define STM32_I2C4_EVENT_NUMBER 95 #define STM32_I2C4_ERROR_NUMBER 96 -#define STM32_I2C4_RX_DMA_MSK STM32_DMA_STREAM_ID_MSK(1, 1) -#define STM32_I2C4_RX_DMA_CHN 0x00000080 +#define STM32_I2C4_RX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 5) |\ + STM32_DMA_STREAM_ID_MSK(1, 2) |\ + STM32_DMA_STREAM_ID_MSK(1, 1)) +#define STM32_I2C4_RX_DMA_CHN 0x00200280 #define STM32_I2C4_TX_DMA_MSK STM32_DMA_STREAM_ID_MSK(1, 6) #define STM32_I2C4_TX_DMA_CHN 0x08000000 diff --git a/readme.txt b/readme.txt index f2da15a50..76bfa1b73 100644 --- a/readme.txt +++ b/readme.txt @@ -167,6 +167,8 @@ dependencies and configuration directories. This makes possible to have multiple non-conflicting makefiles in the same project. Updated the various platform.mk implementing "smart build" mode. +- HAL: Fixed wrong DMA settings for STM32F76x I2C3 and I2C4 (bug #920) + (backported to 18.2.1 and 17.6.4). - LIB: Fixed heap allocator failing on simulators (bug #917)(backported to 17.6.4). - STP: Fixed CRT0_FORCE_MSP_INIT flag not defaulted in crt0_v7m.S (bug #916)