From 22d2162db773e677c900b8b397889b7087470248 Mon Sep 17 00:00:00 2001 From: barthess Date: Tue, 30 Aug 2011 22:52:11 +0000 Subject: [PATCH 02/12] RTC. Initial commit. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/rtc_dev@3269 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- os/hal/hal.mk | 3 +- os/hal/include/hal.h | 1 + os/hal/include/rtc.h | 77 ++++++++ os/hal/platforms/STM32/rtc_lld.c | 236 +++++++++++++++++++++++++ os/hal/platforms/STM32/rtc_lld.h | 100 +++++++++++ os/hal/platforms/STM32F1xx/platform.mk | 3 +- os/hal/src/hal.c | 3 + os/hal/src/rtc.c | 108 +++++++++++ 8 files changed, 529 insertions(+), 2 deletions(-) create mode 100644 os/hal/include/rtc.h create mode 100644 os/hal/platforms/STM32/rtc_lld.c create mode 100644 os/hal/platforms/STM32/rtc_lld.h create mode 100644 os/hal/src/rtc.c diff --git a/os/hal/hal.mk b/os/hal/hal.mk index 762bda57f..87a3c6dc3 100644 --- a/os/hal/hal.mk +++ b/os/hal/hal.mk @@ -15,7 +15,8 @@ HALSRC = ${CHIBIOS}/os/hal/src/hal.c \ ${CHIBIOS}/os/hal/src/uart.c \ ${CHIBIOS}/os/hal/src/usb.c \ ${CHIBIOS}/os/hal/src/mmc_spi.c \ - ${CHIBIOS}/os/hal/src/serial_usb.c + ${CHIBIOS}/os/hal/src/serial_usb.c \ + ${CHIBIOS}/os/hal/src/rtc.c # Required include directories HALINC = ${CHIBIOS}/os/hal/include diff --git a/os/hal/include/hal.h b/os/hal/include/hal.h index 1ed893aab..b92789b02 100644 --- a/os/hal/include/hal.h +++ b/os/hal/include/hal.h @@ -49,6 +49,7 @@ #include "usb.h" #include "mmc_spi.h" #include "serial_usb.h" +#include "rtc.h" /*===========================================================================*/ /* External declarations. */ diff --git a/os/hal/include/rtc.h b/os/hal/include/rtc.h new file mode 100644 index 000000000..4a36f4317 --- /dev/null +++ b/os/hal/include/rtc.h @@ -0,0 +1,77 @@ +/** + * @file rtc.h + * @brief RTC Driver macros and structures. + * + * @addtogroup RTC + * @{ + */ + + +#ifndef _RTC_H_ +#define _RTC_H_ + + + +#if HAL_USE_RTC || defined(__DOXYGEN__) + +/*===========================================================================*/ +/* Driver constants. */ +/*===========================================================================*/ +/* TODO: move this to hal_lld_f103.h & mcuconf.h */ +#define STM32_LSECLK 32768 /**< Low speed external clock. */ + + +/* RCC_CFGR register bits definitions.*/ +#define STM32_RTC_NONE (0 << 8) /**< */ +#define STM32_RTC_LSE (1 << 8) /**< LSE oscillator clock used as RTC clock */ +#define STM32_RTC_LSI (2 << 8) /**< LSI oscillator clock used as RTC clock */ +#define STM32_RTC_HSE (3 << 8) /**< HSE oscillator clock divided by 128 used as RTC clock */ + + +/*===========================================================================*/ +/* Driver pre-compile time settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Derived constants and error checks. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver data structures and types. */ +/*===========================================================================*/ + +typedef struct RTCDriver RTCDriver; + +typedef void (*rtccb_t)(RTCDriver *rtcp); + +#include "rtc_lld.h" + +/*===========================================================================*/ +/* Driver macros. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* External declarations. */ +/*===========================================================================*/ + +#ifdef __cplusplus +extern "C" { +#endif + void rtcInit(void); +#if RTC_SUPPORTS_CALLBACKS + void rtcStart(RTCDriver *rtcp, RTCConfig *rtccfgp); + void rtcStop(void); +#endif /* RTC_SUPPORTS_CALLBACKS */ + void rtcSetTime(uint32_t tv_sec); + uint32_t rtcGetSec(void); + uint16_t rtcGetMsec(void); + void rtcSetAlarm(uint32_t tv_alarm); + uint32_t rtcGetAlarm(void); +#ifdef __cplusplus +} +#endif + +#endif /* HAL_USE_RTC */ +#endif /* _RTC_H_ */ + +/** @} */ diff --git a/os/hal/platforms/STM32/rtc_lld.c b/os/hal/platforms/STM32/rtc_lld.c new file mode 100644 index 000000000..4af863005 --- /dev/null +++ b/os/hal/platforms/STM32/rtc_lld.c @@ -0,0 +1,236 @@ +/** + * @file STM32/rtc_lld.c + * @brief STM32 RTC subsystem low level driver header. + * + * @addtogroup RTC + * @{ + */ + +#include "ch.h" +#include "hal.h" + + + + + + +// TODO: defines look in 4492 stm32f10x.h + + + + + +/** The RTCCLK clock source can be either the HSE/128, LSE or LSI clocks. This is selected +by programming the RTCSEL[1:0] bits in the Backup domain control register (RCC_BDCR). +This selection +CANNOT +be modified without resetting the Backup domain. + +The LSE clock is in the Backup domain, whereas the HSE and LSI clocks are not. +Consequently: +* If LSE is selected as RTC clock: +– The RTC continues to work even if the VDD supply is switched off, provided the +VBAT supply is maintained. +* If LSI is selected as Auto-Wakeup unit (AWU) clock: +– The AWU state is not guaranteed if the VDD supply is powered off. Refer to +Section 6.2.5: LSI clock on page 87 for more details on LSI calibration. +* If the HSE clock divided by 128 is used as the RTC clock: +– The RTC state is not guaranteed if the VDD supply is powered off or if the internal +voltage regulator is powered off (removing power from the 1.8 V domain). +– The DPB bit (Disable backup domain write protection) in the Power controller +register must be set to 1 (refer to Section 4.4.1: Power control register +(PWR_CR)). +*/ + +#if HAL_USE_RTC || defined(__DOXYGEN__) + +/*===========================================================================*/ +/* Driver exported variables. */ +/*===========================================================================*/ + +RTCDriver RTCD; + + +/*===========================================================================*/ +/* Driver local variables. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver local functions. */ +/*===========================================================================*/ + +/** + * @brief Shared IRQ handler. + * + * @param[in] rtcp pointer to a @p RTCDriver object + */ +#if RTC_SUPPORTS_CALLBACKS + +static void rtc_lld_serve_interrupt(RTCDriver *rtcp){ + chSysLockFromIsr(); +//TODO: do not forget to reset flags manually + if (RTC->CRL & RTC_CRL_SECF){ + rtcp->config->second_cb(rtcp); + RTC->CRL &= ~RTC_CRL_SECF; + } + if (RTC->CRL & RTC_CRL_ALRF){ + rtcp->config->alarm_cb(rtcp); + RTC->CRL &= ~RTC_CRL_ALRF; + } + if (RTC->CRL & RTC_CRL_OWF){ + rtcp->config->overflow_cb(rtcp); + RTC->CRL &= ~RTC_CRL_OWF; + } + chSysUnlockFromIsr(); +} +#endif /* RTC_SUPPORTS_CALLBACKS */ + +/*===========================================================================*/ +/* Driver interrupt handlers. */ +/*===========================================================================*/ + +/** + * @brief RTC interrupt handler. + * @isr + */ +#if RTC_SUPPORTS_CALLBACKS + +CH_IRQ_HANDLER(RTC_IRQHandler) { + CH_IRQ_PROLOGUE(); + rtc_lld_serve_interrupt(&RTCD); + CH_IRQ_EPILOGUE(); +} + +#endif /* RTC_SUPPORTS_CALLBACKS */ + +/*===========================================================================*/ +/* Driver exported functions. */ +/*===========================================================================*/ + +/** + * @brief Enable access to registers and initialize RTC if BKP domain + * was previously reseted. + */ +void rtc_lld_init(void){ + RCC->APB1ENR |= (RCC_APB1ENR_PWREN | RCC_APB1ENR_BKPEN); /* enable clocking */ + PWR->CR |= PWR_CR_DBP; /* enable access */ + + if (!(RCC->BDCR & (RCC_BDCR_RTCEN | RCC_BDCR_LSEON))){ /* BKP domain was reseted */ + RCC->BDCR |= STM32_RTC_LSE; /* select clocking from LSE */ + RCC->BDCR |= RCC_BDCR_LSEON; /* switch LSE on */ + while(!(RCC->BDCR & RCC_BDCR_LSEON)) /* wait for stabilization */ + ; + RCC->BDCR |= RCC_BDCR_RTCEN; /* run clock */ + } + + /* Ensure that RTC_CNT and RTC_DIV contain actual values after enabling + * clocking on APB1, because these values only update when APB1 functioning.*/ + RTC->CRL &= ~(RTC_CRL_RSF); + while (!(RTC->CRL & RTC_CRL_RSF)) + ; +} + +/** + * @brief Configure and start interrupt servicing routines. + * + * @param[in] rtcp pointer to a @p RTCDriver object + * @param[in] rtccfgp pointer to a @p RTCDriver config object + */ +#if RTC_SUPPORTS_CALLBACKS +void rtc_lld_start(RTCDriver *rtcp, RTCConfig *rtccfgp){ + uint16_t flags = 0; + + NVICEnableVector(RTC_IRQn, CORTEX_PRIORITY_MASK(STM32_RTC_IRQ_PRIORITY)); + + rtcp->config = rtccfgp; + if (rtcp->config->overflow_cb != NULL){ + flags |= RTC_CRH_OWIE; + } + if (rtcp->config->alarm_cb != NULL){ + flags |= RTC_CRH_ALRIE; + } + if (rtcp->config->second_cb != NULL){ + flags |= RTC_CRH_SECIE; + } + + RTC->CRH |= flags; +} + +/** + * @brief Disable interrupt servicing routines. + */ +void rtc_lld_stop(void){ + NVICDisableVector(RTC_IRQn); + RTC->CRH = 0; +} +#endif /* RTC_SUPPORTS_CALLBACKS */ + + + +/** + * @brief Set current time. + * + * @param[in] tv_sec time value in UNIX notation. + */ +void rtc_lld_set_time(uint32_t tv_sec){ + uint32_t preload = STM32_LSECLK - 1UL; + + while(!(RTC->CRL & RTC_CRL_RTOFF)) + ; + + RTC->CRL |= RTC_CRL_CNF; /* switch on configure mode */ + RTC->PRLH = (uint16_t)((preload >> 16) & 0b1111); /* write preloader */ + RTC->PRLL = (uint16_t)(preload & 0xFFFF); + RTC->CNTH = (uint16_t)((tv_sec >> 16) & 0xFFFF); /* write time */ + RTC->CNTL = (uint16_t)(tv_sec & 0xFFFF); + RTC->CRL &= ~RTC_CRL_CNF; /* switch off configure mode */ + + while(!(RTC->CRL & RTC_CRL_RTOFF)) /* wait for completion */ + ; +} + +/** + * @brief Return current time in UNIX notation. + */ +uint32_t rtc_lld_get_sec(void){ + return ((RTC->CNTH << 16) + RTC->CNTL); +} + +/** + * @brief Return fractional part of current time (milliseconds). + */ +uint16_t rtc_lld_get_msec(void){ + uint32_t time_frac = 0; + time_frac = (((uint32_t)RTC->DIVH) << 16) + (RTC->DIVL); + return(((STM32_LSECLK - time_frac) * 1000) / STM32_LSECLK); +} + +/** + * @brief Set alarm date in UNIX notation. + */ +void rtc_lld_set_alarm(uint32_t tv_alarm){ + + while(!(RTC->CRL & RTC_CRL_RTOFF)) + ; + + RTC->CRL |= RTC_CRL_CNF; /* switch on configure mode */ + RTC->ALRH = (uint16_t)((tv_alarm >> 16) & 0xFFFF); /* write time */ + RTC->ALRL = (uint16_t)(tv_alarm & 0xFFFF); + RTC->CRL &= ~RTC_CRL_CNF; /* switch off configure mode */ + + while(!(RTC->CRL & RTC_CRL_RTOFF)) /* wait for completion */ + ; +} + +/** + * @brief Get current alarm date in UNIX notation. + * @note Default value after reset is 0xFFFFFFFF + */ +uint32_t rtc_lld_get_alarm(void){ + return ((RTC->ALRH << 16) + RTC->ALRL); +} + + +#endif /* HAL_USE_RTC */ + +/** @} */ diff --git a/os/hal/platforms/STM32/rtc_lld.h b/os/hal/platforms/STM32/rtc_lld.h new file mode 100644 index 000000000..cf18b664c --- /dev/null +++ b/os/hal/platforms/STM32/rtc_lld.h @@ -0,0 +1,100 @@ + +/** + * @file STM32/rtc_lld.h + * @brief STM32 RTC subsystem low level driver header. + * + * @addtogroup RTC + * @{ + */ + +#ifndef _RTC_LLD_H_ +#define _RTC_LLD_H_ + +#if HAL_USE_RTC || defined(__DOXYGEN__) + +/*===========================================================================*/ +/* Driver constants. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver pre-compile time settings. */ +/*===========================================================================*/ +/** + * @brief Switch to TRUE if you need callbacks from RTC. Switch to FALSE + * if you need only time keeping. + * @note Default is true. + */ +#if !defined(RTC_SUPPORTS_CALLBACKS) || defined(__DOXYGEN__) +#define RTC_SUPPORTS_CALLBACKS TRUE +#endif + +/*===========================================================================*/ +/* Derived constants and error checks. */ +/*===========================================================================*/ + +#if HAL_USE_RTC && !STM32_HAS_RTC +#error "RTC not present in the selected device" +#endif + +/*===========================================================================*/ +/* Driver data structures and types. */ +/*===========================================================================*/ +/** + * @brief Structure representing an RTC driver config. + */ +typedef struct { + /** + * @brief Overflow callback. Set it to NULL if not used. + */ + rtccb_t overflow_cb; + + /** + * @brief Every second callback. Set it to NULL if not used. + */ + rtccb_t second_cb; + + /** + * @brief Alarm callback. Set it to NULL if not used. + */ + rtccb_t alarm_cb; +}RTCConfig; + + +/** + * @brief Structure representing an RTC driver. + */ +struct RTCDriver{ + /** + * @brief Pointer to RCT config. + */ + const RTCConfig *config; +}; + +/*===========================================================================*/ +/* Driver macros. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* External declarations. */ +/*===========================================================================*/ + +#ifdef __cplusplus +extern "C" { +#endif + void rtc_lld_init(void); +#if RTC_SUPPORTS_CALLBACKS + void rtc_lld_start(RTCDriver *rtcp, RTCConfig *rtccfgp); + void rtc_lld_stop(void); +#endif /* RTC_SUPPORTS_CALLBACKS */ + void rtc_lld_set_time(uint32_t tv_sec); + uint32_t rtc_lld_get_sec(void); + uint16_t rtc_lld_get_msec(void); +#ifdef __cplusplus +} +#endif + + +#endif /* HAL_USE_RTC */ +#endif /* _RTC_LLD_H_ */ + +/** @} */ diff --git a/os/hal/platforms/STM32F1xx/platform.mk b/os/hal/platforms/STM32F1xx/platform.mk index 010a3f96d..26f13cd81 100644 --- a/os/hal/platforms/STM32F1xx/platform.mk +++ b/os/hal/platforms/STM32F1xx/platform.mk @@ -12,7 +12,8 @@ PLATFORMSRC = ${CHIBIOS}/os/hal/platforms/STM32F1xx/hal_lld.c \ ${CHIBIOS}/os/hal/platforms/STM32/DMAv1/spi_lld.c \ ${CHIBIOS}/os/hal/platforms/STM32/DMAv1/uart_lld.c \ ${CHIBIOS}/os/hal/platforms/STM32/DMAv1/stm32_dma.c \ - ${CHIBIOS}/os/hal/platforms/STM32/USBv1/usb_lld.c + ${CHIBIOS}/os/hal/platforms/STM32/USBv1/usb_lld.c \ + ${CHIBIOS}/os/hal/platforms/STM32/rtc_lld.c # Required include directories PLATFORMINC = ${CHIBIOS}/os/hal/platforms/STM32F1xx \ diff --git a/os/hal/src/hal.c b/os/hal/src/hal.c index ef7d7af8b..3c8fb2fe6 100644 --- a/os/hal/src/hal.c +++ b/os/hal/src/hal.c @@ -106,6 +106,9 @@ void halInit(void) { #endif #if HAL_USE_SERIAL_USB || defined(__DOXYGEN__) sduInit(); +#endif +#if HAL_USE_RTC || defined(__DOXYGEN__) + rtcInit(); #endif /* Board specific initialization.*/ boardInit(); diff --git a/os/hal/src/rtc.c b/os/hal/src/rtc.c new file mode 100644 index 000000000..bb0dc11f0 --- /dev/null +++ b/os/hal/src/rtc.c @@ -0,0 +1,108 @@ +/** + * @file rtc.c + * @brief Real Time Clock Abstraction Layer code. + * + * @addtogroup RTC + * @{ + */ + +#include "ch.h" +#include "hal.h" + + +#if HAL_USE_RTC || defined(__DOXYGEN__) + +/*===========================================================================*/ +/* Driver local definitions. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported variables. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver local variables. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver local functions. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported functions. */ +/*===========================================================================*/ +/** + * @brief Enable access to registers and initialize RTC if BKP doamin + * was previously reseted. + */ +void rtcInit(void){ + rtc_lld_init(); +} + +#if RTC_SUPPORTS_CALLBACKS +/** + * @brief Configure and start interrupt servicing routines. + * @param[in] rtcp - pointer to RTC driver structure. + * @param[in] rtccfgp - pointer to RTC config structure. + */ +void rtcStart(RTCDriver *rtcp, RTCConfig *rtccfgp){ + chDbgCheck(((rtcp != NULL) && (rtccfgp != NULL)), "rtcStart"); + rtc_lld_start(rtcp, rtccfgp); +} + +/** + * @brief Stop interrupt servicing routines. + */ +void rtcStop(void){ + rtc_lld_stop(); +} +#endif /* RTC_SUPPORTS_CALLBACKS */ + +/** + * @brief Set current time. + * @param[in] tv_sec - time value in UNIX notation. + */ +void rtcSetTime(uint32_t tv_sec){ + rtc_lld_set_time(tv_sec); +} + +/** + * @brief Return current time in UNIX notation. + */ +uint32_t rtcGetSec(void){ + return rtc_lld_get_sec(); +} + +/** + * @brief Return fractional part of current time (milliseconds). + */ +uint16_t rtcGetMsec(void){ + return rtc_lld_get_msec(); +} + +/** + * @brief Set alarm date in UNIX notation. + */ +void rtcSetAlarm(uint32_t tv_alarm){ + rtc_lld_set_alarm(tv_alarm); +} + +/** + * @brief Get current alarm date in UNIX notation. + */ +uint32_t rtcGetAlarm(void){ + return rtc_lld_get_alarm(); +} + + + + + + +#endif /* HAL_USE_RTC */ + + + +/** @} */ + + From 2991a477339a28ec275647930df45443a9f8a253 Mon Sep 17 00:00:00 2001 From: barthess Date: Wed, 31 Aug 2011 09:34:42 +0000 Subject: [PATCH 03/12] RTC. nop git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/rtc_dev@3270 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- os/hal/include/rtc.h | 2 +- os/hal/platforms/STM32/rtc_lld.c | 28 +++++++++++++++++++--------- os/hal/platforms/STM32/rtc_lld.h | 7 ++++++- os/hal/src/rtc.c | 3 ++- 4 files changed, 28 insertions(+), 12 deletions(-) diff --git a/os/hal/include/rtc.h b/os/hal/include/rtc.h index 4a36f4317..474862910 100644 --- a/os/hal/include/rtc.h +++ b/os/hal/include/rtc.h @@ -59,7 +59,7 @@ extern "C" { #endif void rtcInit(void); #if RTC_SUPPORTS_CALLBACKS - void rtcStart(RTCDriver *rtcp, RTCConfig *rtccfgp); + void rtcStart(RTCDriver *rtcp, const RTCConfig *rtccfgp); void rtcStop(void); #endif /* RTC_SUPPORTS_CALLBACKS */ void rtcSetTime(uint32_t tv_sec); diff --git a/os/hal/platforms/STM32/rtc_lld.c b/os/hal/platforms/STM32/rtc_lld.c index 4af863005..80f0185ba 100644 --- a/os/hal/platforms/STM32/rtc_lld.c +++ b/os/hal/platforms/STM32/rtc_lld.c @@ -48,6 +48,7 @@ register must be set to 1 (refer to Section 4.4.1: Power control register /* Driver exported variables. */ /*===========================================================================*/ +/** @brief RTC driver identifier.*/ RTCDriver RTCD; @@ -69,15 +70,21 @@ RTCDriver RTCD; static void rtc_lld_serve_interrupt(RTCDriver *rtcp){ chSysLockFromIsr(); //TODO: do not forget to reset flags manually - if (RTC->CRL & RTC_CRL_SECF){ + if ((RTC->CRH & RTC_CRH_SECIE) && \ + (RTC->CRL & RTC_CRL_SECF) && \ + (rtcp->config->second_cb != NULL)){ rtcp->config->second_cb(rtcp); RTC->CRL &= ~RTC_CRL_SECF; } - if (RTC->CRL & RTC_CRL_ALRF){ + if ((RTC->CRH & RTC_CRH_ALRIE) && \ + (RTC->CRL & RTC_CRL_ALRF) && \ + (rtcp->config->alarm_cb != NULL)){ rtcp->config->alarm_cb(rtcp); RTC->CRL &= ~RTC_CRL_ALRF; } - if (RTC->CRL & RTC_CRL_OWF){ + if ((RTC->CRH & RTC_CRH_OWIE) && \ + (RTC->CRL & RTC_CRL_OWF) && \ + (rtcp->config->overflow_cb != NULL)){ rtcp->config->overflow_cb(rtcp); RTC->CRL &= ~RTC_CRL_OWF; } @@ -128,6 +135,8 @@ void rtc_lld_init(void){ RTC->CRL &= ~(RTC_CRL_RSF); while (!(RTC->CRL & RTC_CRL_RSF)) ; + + RTCD.config = NULL; } /** @@ -137,23 +146,24 @@ void rtc_lld_init(void){ * @param[in] rtccfgp pointer to a @p RTCDriver config object */ #if RTC_SUPPORTS_CALLBACKS -void rtc_lld_start(RTCDriver *rtcp, RTCConfig *rtccfgp){ - uint16_t flags = 0; +void rtc_lld_start(RTCDriver *rtcp, const RTCConfig *rtccfgp){ + uint16_t isr_flags = 0; NVICEnableVector(RTC_IRQn, CORTEX_PRIORITY_MASK(STM32_RTC_IRQ_PRIORITY)); rtcp->config = rtccfgp; if (rtcp->config->overflow_cb != NULL){ - flags |= RTC_CRH_OWIE; + isr_flags |= RTC_CRH_OWIE; } if (rtcp->config->alarm_cb != NULL){ - flags |= RTC_CRH_ALRIE; + isr_flags |= RTC_CRH_ALRIE; } if (rtcp->config->second_cb != NULL){ - flags |= RTC_CRH_SECIE; + isr_flags |= RTC_CRH_SECIE; } - RTC->CRH |= flags; + RTC->CRL &= ~(RTC_CRL_SECF | RTC_CRL_ALRF | RTC_CRL_OWF); /* clear all even flags*/ + RTC->CRH |= isr_flags; } /** diff --git a/os/hal/platforms/STM32/rtc_lld.h b/os/hal/platforms/STM32/rtc_lld.h index cf18b664c..f26315784 100644 --- a/os/hal/platforms/STM32/rtc_lld.h +++ b/os/hal/platforms/STM32/rtc_lld.h @@ -78,17 +78,22 @@ struct RTCDriver{ /* External declarations. */ /*===========================================================================*/ +extern RTCDriver RTCD; + + #ifdef __cplusplus extern "C" { #endif void rtc_lld_init(void); #if RTC_SUPPORTS_CALLBACKS - void rtc_lld_start(RTCDriver *rtcp, RTCConfig *rtccfgp); + void rtc_lld_start(RTCDriver *rtcp, const RTCConfig *rtccfgp); void rtc_lld_stop(void); #endif /* RTC_SUPPORTS_CALLBACKS */ void rtc_lld_set_time(uint32_t tv_sec); uint32_t rtc_lld_get_sec(void); uint16_t rtc_lld_get_msec(void); + uint32_t rtc_lld_get_alarm(void); + void rtc_lld_set_alarm(uint32_t); #ifdef __cplusplus } #endif diff --git a/os/hal/src/rtc.c b/os/hal/src/rtc.c index bb0dc11f0..c6edca4a2 100644 --- a/os/hal/src/rtc.c +++ b/os/hal/src/rtc.c @@ -9,6 +9,7 @@ #include "ch.h" #include "hal.h" +#include "rtc_lld.h" #if HAL_USE_RTC || defined(__DOXYGEN__) @@ -45,7 +46,7 @@ void rtcInit(void){ * @param[in] rtcp - pointer to RTC driver structure. * @param[in] rtccfgp - pointer to RTC config structure. */ -void rtcStart(RTCDriver *rtcp, RTCConfig *rtccfgp){ +void rtcStart(RTCDriver *rtcp, const RTCConfig *rtccfgp){ chDbgCheck(((rtcp != NULL) && (rtccfgp != NULL)), "rtcStart"); rtc_lld_start(rtcp, rtccfgp); } From c8f60c27e1cdcd9d5a5592287d453d8d1fe0051f Mon Sep 17 00:00:00 2001 From: barthess Date: Wed, 31 Aug 2011 14:44:52 +0000 Subject: [PATCH 04/12] RTC. Small fixes. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/rtc_dev@3271 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- os/hal/platforms/STM32/rtc_lld.c | 14 ++++++-------- 1 file changed, 6 insertions(+), 8 deletions(-) diff --git a/os/hal/platforms/STM32/rtc_lld.c b/os/hal/platforms/STM32/rtc_lld.c index 80f0185ba..59699028d 100644 --- a/os/hal/platforms/STM32/rtc_lld.c +++ b/os/hal/platforms/STM32/rtc_lld.c @@ -10,16 +10,9 @@ #include "hal.h" - - - - // TODO: defines look in 4492 stm32f10x.h - - - /** The RTCCLK clock source can be either the HSE/128, LSE or LSI clocks. This is selected by programming the RTCSEL[1:0] bits in the Backup domain control register (RCC_BDCR). This selection @@ -69,7 +62,7 @@ RTCDriver RTCD; static void rtc_lld_serve_interrupt(RTCDriver *rtcp){ chSysLockFromIsr(); -//TODO: do not forget to reset flags manually + if ((RTC->CRH & RTC_CRH_SECIE) && \ (RTC->CRL & RTC_CRL_SECF) && \ (rtcp->config->second_cb != NULL)){ @@ -88,6 +81,7 @@ static void rtc_lld_serve_interrupt(RTCDriver *rtcp){ rtcp->config->overflow_cb(rtcp); RTC->CRL &= ~RTC_CRL_OWF; } + chSysUnlockFromIsr(); } #endif /* RTC_SUPPORTS_CALLBACKS */ @@ -136,6 +130,10 @@ void rtc_lld_init(void){ while (!(RTC->CRL & RTC_CRL_RSF)) ; + /* disable all interrupts and clear all even flags just to be safe */ + RTC->CRH &= ~(RTC_CRH_OWIE | RTC_CRH_ALRIE | RTC_CRH_SECIE); + RTC->CRL &= ~(RTC_CRL_SECF | RTC_CRL_ALRF | RTC_CRL_OWF); + RTCD.config = NULL; } From 7fd48a4a3f590d6cfe7cd98fe7dd96c7498f08e2 Mon Sep 17 00:00:00 2001 From: barthess Date: Wed, 31 Aug 2011 15:27:46 +0000 Subject: [PATCH 05/12] RTC. Hal test added. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/rtc_dev@3272 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F1xx/RTC/Makefile | 220 ++++++++++++++ testhal/STM32F1xx/RTC/chconf.h | 509 ++++++++++++++++++++++++++++++++ testhal/STM32F1xx/RTC/halconf.h | 356 ++++++++++++++++++++++ testhal/STM32F1xx/RTC/main.c | 62 ++++ testhal/STM32F1xx/RTC/main.h | 23 ++ testhal/STM32F1xx/RTC/mcuconf.h | 198 +++++++++++++ 6 files changed, 1368 insertions(+) create mode 100644 testhal/STM32F1xx/RTC/Makefile create mode 100644 testhal/STM32F1xx/RTC/chconf.h create mode 100644 testhal/STM32F1xx/RTC/halconf.h create mode 100644 testhal/STM32F1xx/RTC/main.c create mode 100644 testhal/STM32F1xx/RTC/main.h create mode 100644 testhal/STM32F1xx/RTC/mcuconf.h diff --git a/testhal/STM32F1xx/RTC/Makefile b/testhal/STM32F1xx/RTC/Makefile new file mode 100644 index 000000000..2f471c293 --- /dev/null +++ b/testhal/STM32F1xx/RTC/Makefile @@ -0,0 +1,220 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) +#-fno-inline +# Don't pay attention to the inline keyword. Normally this option is used to keep the compiler from expanding any functions inline. Note that if you are not optimizing, no functions can be expanded inline. +#-finline-functions +# Integrate all simple functions into their callers. The compiler heuristically decides which functions are simple enough to be worth integrating in this way. +# If all calls to a given function are integrated, and the function is declared static, then the function is normally not output as assembler code in its own right. +# Enabled at level '-O3'. + + USE_OPT = -O0 -ggdb -fomit-frame-pointer -falign-functions=16 + #USE_OPT = -O1 -ggdb -fomit-frame-pointer -falign-functions=16 -fno-inline + #USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 -fno-strict-aliasing + #USE_OPT = -O3 -ggdb -fomit-frame-pointer -falign-functions=16 + #USE_OPT = -Os -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable register caching optimization (read documentation). +ifeq ($(USE_CURRP_CACHING),) + USE_CURRP_CACHING = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FWLIB),) + USE_FWLIB = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Imported source files +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/OLIMEX_STM32_P103/board.mk +include $(CHIBIOS)/os/hal/platforms/STM32F1xx/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F1xx/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +#include $(CHIBIOS)/test/test.mk + +# Define linker script file here +LDSCRIPT= $(PORTLD)/STM32F103xB.ld + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + $(CHIBIOS)/os/various/evtimer.c \ + $(CHIBIOS)/os/various/syscalls.c \ + main.c \ + + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m3 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. + +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +ifeq ($(USE_FWLIB),yes) + include $(CHIBIOS)/ext/stm32lib/stm32lib.mk + CSRC += $(STM32SRC) + INCDIR += $(STM32INC) + USE_OPT += -DUSE_STDPERIPH_DRIVER +endif + +include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk + + + diff --git a/testhal/STM32F1xx/RTC/chconf.h b/testhal/STM32F1xx/RTC/chconf.h new file mode 100644 index 000000000..d97168805 --- /dev/null +++ b/testhal/STM32F1xx/RTC/chconf.h @@ -0,0 +1,509 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/* Kernel parameters. */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 0//20 +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/*===========================================================================*/ +/* Performance options. */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED FALSE +#endif + +/*===========================================================================*/ +/* Subsystem options. */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS FALSE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT FALSE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP FALSE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS FALSE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC FALSE +#endif + +/*===========================================================================*/ +/* Debug options. */ +/*===========================================================================*/ +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS TRUE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS TRUE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE FALSE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS TRUE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/*===========================================================================*/ +/* Kernel hooks. */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitily from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) +#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* System halt code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F1xx/RTC/halconf.h b/testhal/STM32F1xx/RTC/halconf.h new file mode 100644 index 000000000..219bfd99e --- /dev/null +++ b/testhal/STM32F1xx/RTC/halconf.h @@ -0,0 +1,356 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL FALSE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC TRUE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION FALSE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(I2C_USE_WAIT) || defined(__DOXYGEN__) +#define I2C_USE_WAIT TRUE +#endif + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/** + * @brief Switch to asynchronouse driver with callbacks. + */ +#if !defined(I2C_SUPPORTS_CALLBACKS) || defined(__DOXYGEN__) +#define I2C_SUPPORTS_CALLBACKS TRUE +#endif + +/*===========================================================================*/ +/* RTC driver related settings. */ +/*===========================================================================*/ +/** + * @brief Switch to TRUE if you need callbacks from RTC. + */ +#if !defined(RTC_SUPPORTS_CALLBACKS) || defined(__DOXYGEN__) +#define RTC_SUPPORTS_CALLBACKS FALSE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Block size for MMC transfers. + */ +#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) +#define MMC_SECTOR_SIZE 512 +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/** + * @brief Number of positive insertion queries before generating the + * insertion event. + */ +#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) +#define MMC_POLLING_INTERVAL 10 +#endif + +/** + * @brief Interval, in milliseconds, between insertion queries. + */ +#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) +#define MMC_POLLING_DELAY 10 +#endif + +/** + * @brief Uses the SPI polled API for small data transfers. + * @details Polled transfers usually improve performance because it + * saves two context switches and interrupt servicing. Note + * that this option has no effect on large transfers which + * are always performed using DMAs/IRQs. + */ +#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) +#define MMC_USE_SPI_POLLING TRUE +#endif + +/*===========================================================================*/ +/* PAL driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* PWM driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intevals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 9600 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION FALSE +#endif + +/*===========================================================================*/ +/* UART driver related settings. */ +/*===========================================================================*/ + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F1xx/RTC/main.c b/testhal/STM32F1xx/RTC/main.c new file mode 100644 index 000000000..b8c243810 --- /dev/null +++ b/testhal/STM32F1xx/RTC/main.c @@ -0,0 +1,62 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include "ch.h" +#include "hal.h" + + + +static void my_secondcb(RTCDriver *rtcp){ + (void)rtcp; + //palTogglePad(IOPORT3, GPIOC_LED); +} + +static void my_alarmcb(RTCDriver *rtcp){ + (void)rtcp; + palTogglePad(IOPORT3, GPIOC_LED); + rtcSetAlarm(rtcGetSec() + 10); +} + +static void my_overflowcb(RTCDriver *rtcp){ + (void)rtcp; + palTogglePad(IOPORT3, GPIOC_LED); + rtcSetAlarm(rtcGetSec() + 10); +} + +static const RTCConfig rtccfg={ + my_overflowcb, + my_secondcb, + my_alarmcb, +}; + + + +int main(void) { + halInit(); + chSysInit(); + + rtcSetAlarm(rtcGetSec() + 10); + rtcStart(&RTCD, &rtccfg); + + while (TRUE){ + chThdSleepMilliseconds(500); + } + return 0; +} diff --git a/testhal/STM32F1xx/RTC/main.h b/testhal/STM32F1xx/RTC/main.h new file mode 100644 index 000000000..31bd85a76 --- /dev/null +++ b/testhal/STM32F1xx/RTC/main.h @@ -0,0 +1,23 @@ +#ifndef MAIN_H_ +#define MAIN_H_ + +/****************************************************************** + * ãëîáàëüíûå ôëàãè + ******************************************************************/ +/* íàäî ëè ôèëüòðîâàòü äàííûå ñ äàò÷èêîâ */ +#define GET_FILTERED_DATA TRUE + +/* âêëþ÷èòü ñòðåññîâîå òåñòèðîâàíèå */ +#define ENABLE_IRQ_STORM FALSE + +// usefull macros +#define WATCHDOG_INIT {\ + DBGMCU->CR |= DBGMCU_CR_DBG_IWDG_STOP; /* stop watchdog timer in debugging mode */\ + IWDG->KR = 0x5555;/*unlock PR register*/\ + IWDG->PR = 16;/*set 1.6384s timeout*/\ + IWDG->KR = 0xCCCC;/*start watchdog*/} + +#define WATCHDOG_RELOAD {IWDG->KR = 0xAAAA;} + + +#endif /* MAIN_H_ */ diff --git a/testhal/STM32F1xx/RTC/mcuconf.h b/testhal/STM32F1xx/RTC/mcuconf.h new file mode 100644 index 000000000..fc7ce0053 --- /dev/null +++ b/testhal/STM32F1xx/RTC/mcuconf.h @@ -0,0 +1,198 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32 drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ +#include "main.h" +/* + * HAL driver system settings. + */ +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSE +#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 +#define STM32_PLLMUL_VALUE 9 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV2 +#define STM32_PPRE2 STM32_PPRE2_DIV2 +#define STM32_ADCPRE STM32_ADCPRE_DIV4 +#define STM32_MCO STM32_MCO_NOCLOCK + +/* + * ADC driver system settings. + */ +#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_ADC1_DMA_PRIORITY 3 +#define STM32_ADC_ADC1_IRQ_PRIORITY 5 +#define STM32_ADC_ADC1_DMA_ERROR_HOOK() chSysHalt() + +/* + * CAN driver system settings. + */ +#define STM32_CAN_USE_CAN1 FALSE +#define STM32_CAN_CAN1_IRQ_PRIORITY 11 + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 FALSE +#define STM32_GPT_USE_TIM2 FALSE +#define STM32_GPT_USE_TIM3 FALSE +#define STM32_GPT_USE_TIM4 FALSE +#define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_USE_TIM8 FALSE +#define STM32_GPT_TIM1_IRQ_PRIORITY 7 +#define STM32_GPT_TIM2_IRQ_PRIORITY 7 +#define STM32_GPT_TIM3_IRQ_PRIORITY 15 +#define STM32_GPT_TIM4_IRQ_PRIORITY 15 +#define STM32_GPT_TIM5_IRQ_PRIORITY 15 +#define STM32_GPT_TIM8_IRQ_PRIORITY 15 + +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 FALSE +#define STM32_ICU_USE_TIM4 FALSE +#define STM32_ICU_USE_TIM5 FALSE +#define STM32_ICU_USE_TIM8 FALSE +#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM5_IRQ_PRIORITY 7 +#define STM32_ICU_TIM8_IRQ_PRIORITY 7 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_ADVANCED FALSE +#define STM32_PWM_USE_TIM1 FALSE +#define STM32_PWM_USE_TIM2 FALSE +#define STM32_PWM_USE_TIM3 FALSE +#define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM5 FALSE +#define STM32_PWM_USE_TIM8 FALSE +#define STM32_PWM_TIM1_IRQ_PRIORITY 2 +#define STM32_PWM_TIM2_IRQ_PRIORITY 2 +#define STM32_PWM_TIM3_IRQ_PRIORITY 2 +#define STM32_PWM_TIM4_IRQ_PRIORITY 2 +#define STM32_PWM_TIM5_IRQ_PRIORITY 2 +#define STM32_PWM_TIM8_IRQ_PRIORITY 2 + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 FALSE +#define STM32_SERIAL_USE_USART2 FALSE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USART1_PRIORITY 9 +#define STM32_SERIAL_USART2_PRIORITY 10 +#define STM32_SERIAL_USART3_PRIORITY 2 +#define STM32_SERIAL_UART4_PRIORITY 2 +#define STM32_SERIAL_UART5_PRIORITY 2 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 FALSE +#define STM32_SPI_USE_SPI2 FALSE +#define STM32_SPI_USE_SPI3 FALSE +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 FALSE +#define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USART1_IRQ_PRIORITY 10 +#define STM32_UART_USART2_IRQ_PRIORITY 10 +#define STM32_UART_USART3_IRQ_PRIORITY 10 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() + +/* + * I2C driver system settings. + */ +#define STM32_I2C_USE_I2C1 FALSE +#define STM32_I2C_USE_I2C2 FALSE +#define STM32_I2C_I2C1_IRQ_PRIORITY 8 +#define STM32_I2C_I2C2_IRQ_PRIORITY 8 +#define STM32_I2C_I2C1_DMA_PRIORITY 1 +#define STM32_I2C_I2C2_DMA_PRIORITY 1 +#define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() +#define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() +/* I2C1 */ +#define STM32_I2C_I2C1_USE_GPT_TIM GPTD1 +#define STM32_I2C_I2C1_USE_POLLING_WAIT FALSE +/* I2C2 */ +#define STM32_I2C_I2C2_USE_GPT_TIM GPTD2 +#define STM32_I2C_I2C2_USE_POLLING_WAIT FALSE + +/* + * EXTI system settings. + */ +#define STM32_EXTI0_IRQ_PRIORITY 5 +#define STM32_EXTI1_IRQ_PRIORITY 5 +#define STM32_EXTI2_IRQ_PRIORITY 5 +#define STM32_EXTI3_IRQ_PRIORITY 5 +#define STM32_EXTI4_IRQ_PRIORITY 5 +#define STM32_EXTI9_5_IRQ_PRIORITY 5 +#define STM32_EXTI15_10_IRQ_PRIORITY 5 + +/* + * USB driver system settings. + */ +#define STM32_USB_USE_USB1 FALSE +#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE +#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 +#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 + +/* + * RTC driver system settings. + */ +#define STM32_RTC_IRQ_PRIORITY 15 + + + + + + From 6cc29ee5c81b3c6f745ae80ab242514b073d3d3f Mon Sep 17 00:00:00 2001 From: barthess Date: Wed, 31 Aug 2011 15:30:25 +0000 Subject: [PATCH 06/12] RTC. Doxy file added. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/rtc_dev@3273 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- os/hal/dox/rtc.dox | 32 ++++++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+) create mode 100644 os/hal/dox/rtc.dox diff --git a/os/hal/dox/rtc.dox b/os/hal/dox/rtc.dox new file mode 100644 index 000000000..3663374de --- /dev/null +++ b/os/hal/dox/rtc.dox @@ -0,0 +1,32 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @defgroup RTC RTC Driver + * @brief Real Time Clock Abstraction Layer + * @details This module defines an abstract interface for Real Time Clock cell. + * If you do not need callback functionality than disable + * @p RTC_SUPPORTS_CALLBACKS option in @p halconf.h. + * + * @pre In order to use the RTC driver the @p HAL_USE_RTC option + * must be enabled in @p halconf.h. + * + * @ingroup IO + */ From 3da3cc27891650180b1e725d1efb6f07005e9d3e Mon Sep 17 00:00:00 2001 From: barthess Date: Wed, 31 Aug 2011 15:31:32 +0000 Subject: [PATCH 07/12] RTC. Copyrights added. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/rtc_dev@3274 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- os/hal/include/rtc.h | 33 ++++++++++++++++++++++++++++---- os/hal/platforms/STM32/rtc_lld.c | 28 +++++++++++++++++++++++---- os/hal/platforms/STM32/rtc_lld.h | 30 +++++++++++++++++++++++++---- os/hal/src/rtc.c | 33 +++++++++++++++++++++++--------- 4 files changed, 103 insertions(+), 21 deletions(-) diff --git a/os/hal/include/rtc.h b/os/hal/include/rtc.h index 474862910..aa1a61f49 100644 --- a/os/hal/include/rtc.h +++ b/os/hal/include/rtc.h @@ -1,3 +1,23 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + /** * @file rtc.h * @brief RTC Driver macros and structures. @@ -58,10 +78,15 @@ typedef void (*rtccb_t)(RTCDriver *rtcp); extern "C" { #endif void rtcInit(void); -#if RTC_SUPPORTS_CALLBACKS - void rtcStart(RTCDriver *rtcp, const RTCConfig *rtccfgp); - void rtcStop(void); -#endif /* RTC_SUPPORTS_CALLBACKS */ + + #if RTC_SUPPORTS_CALLBACKS + void rtcStart(RTCDriver *rtcp, const RTCConfig *rtccfgp); + void rtcStop(void); + #else /* RTC_SUPPORTS_CALLBACKS */ + #define rtcStart(rtcp, rtccfgp){;} + #define rtcStop(){;} + #endif /* RTC_SUPPORTS_CALLBACKS */ + void rtcSetTime(uint32_t tv_sec); uint32_t rtcGetSec(void); uint16_t rtcGetMsec(void); diff --git a/os/hal/platforms/STM32/rtc_lld.c b/os/hal/platforms/STM32/rtc_lld.c index 59699028d..ed458190d 100644 --- a/os/hal/platforms/STM32/rtc_lld.c +++ b/os/hal/platforms/STM32/rtc_lld.c @@ -1,3 +1,23 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + /** * @file STM32/rtc_lld.c * @brief STM32 RTC subsystem low level driver header. @@ -139,6 +159,7 @@ void rtc_lld_init(void){ /** * @brief Configure and start interrupt servicing routines. + * This function do nothing if callbacks disabled. * * @param[in] rtcp pointer to a @p RTCDriver object * @param[in] rtccfgp pointer to a @p RTCDriver config object @@ -174,7 +195,6 @@ void rtc_lld_stop(void){ #endif /* RTC_SUPPORTS_CALLBACKS */ - /** * @brief Set current time. * @@ -200,14 +220,14 @@ void rtc_lld_set_time(uint32_t tv_sec){ /** * @brief Return current time in UNIX notation. */ -uint32_t rtc_lld_get_sec(void){ +inline uint32_t rtc_lld_get_sec(void){ return ((RTC->CNTH << 16) + RTC->CNTL); } /** * @brief Return fractional part of current time (milliseconds). */ -uint16_t rtc_lld_get_msec(void){ +inline uint16_t rtc_lld_get_msec(void){ uint32_t time_frac = 0; time_frac = (((uint32_t)RTC->DIVH) << 16) + (RTC->DIVL); return(((STM32_LSECLK - time_frac) * 1000) / STM32_LSECLK); @@ -234,7 +254,7 @@ void rtc_lld_set_alarm(uint32_t tv_alarm){ * @brief Get current alarm date in UNIX notation. * @note Default value after reset is 0xFFFFFFFF */ -uint32_t rtc_lld_get_alarm(void){ +inline uint32_t rtc_lld_get_alarm(void){ return ((RTC->ALRH << 16) + RTC->ALRL); } diff --git a/os/hal/platforms/STM32/rtc_lld.h b/os/hal/platforms/STM32/rtc_lld.h index f26315784..fe51df254 100644 --- a/os/hal/platforms/STM32/rtc_lld.h +++ b/os/hal/platforms/STM32/rtc_lld.h @@ -1,3 +1,22 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ /** * @file STM32/rtc_lld.h @@ -85,10 +104,13 @@ extern RTCDriver RTCD; extern "C" { #endif void rtc_lld_init(void); -#if RTC_SUPPORTS_CALLBACKS - void rtc_lld_start(RTCDriver *rtcp, const RTCConfig *rtccfgp); - void rtc_lld_stop(void); -#endif /* RTC_SUPPORTS_CALLBACKS */ + #if RTC_SUPPORTS_CALLBACKS + void rtc_lld_start(RTCDriver *rtcp, const RTCConfig *rtccfgp); + void rtc_lld_stop(void); + #else /* RTC_SUPPORTS_CALLBACKS */ + #define rtc_lld_start(rtcp, rtccfgp){;} + #define rtc_lld_stop(){;} + #endif /* RTC_SUPPORTS_CALLBACKS */ void rtc_lld_set_time(uint32_t tv_sec); uint32_t rtc_lld_get_sec(void); uint16_t rtc_lld_get_msec(void); diff --git a/os/hal/src/rtc.c b/os/hal/src/rtc.c index c6edca4a2..0db21d4d5 100644 --- a/os/hal/src/rtc.c +++ b/os/hal/src/rtc.c @@ -1,3 +1,23 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + /** * @file rtc.c * @brief Real Time Clock Abstraction Layer code. @@ -40,12 +60,14 @@ void rtcInit(void){ rtc_lld_init(); } -#if RTC_SUPPORTS_CALLBACKS /** - * @brief Configure and start interrupt servicing routines. + * @brief Configure and start interrupt servicing routines. + * This function do nothing if callbacks disabled. + * * @param[in] rtcp - pointer to RTC driver structure. * @param[in] rtccfgp - pointer to RTC config structure. */ +#if RTC_SUPPORTS_CALLBACKS void rtcStart(RTCDriver *rtcp, const RTCConfig *rtccfgp){ chDbgCheck(((rtcp != NULL) && (rtccfgp != NULL)), "rtcStart"); rtc_lld_start(rtcp, rtccfgp); @@ -95,15 +117,8 @@ uint32_t rtcGetAlarm(void){ return rtc_lld_get_alarm(); } - - - - - #endif /* HAL_USE_RTC */ - - /** @} */ From 5e62285d1745cd498f89b1a42ae4b28b3ece59a2 Mon Sep 17 00:00:00 2001 From: barthess Date: Wed, 31 Aug 2011 16:32:34 +0000 Subject: [PATCH 08/12] RTC. Final polishing. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/rtc_dev@3275 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- os/hal/dox/rtc.dox | 2 ++ os/hal/include/rtc.h | 10 ------ os/hal/platforms/STM32/rtc_lld.c | 57 +++++++++++++++----------------- os/hal/platforms/STM32/rtc_lld.h | 8 +++++ os/hal/src/rtc.c | 6 ++-- testhal/STM32F1xx/RTC/halconf.h | 7 ++++ 6 files changed, 47 insertions(+), 43 deletions(-) diff --git a/os/hal/dox/rtc.dox b/os/hal/dox/rtc.dox index 3663374de..3572aca18 100644 --- a/os/hal/dox/rtc.dox +++ b/os/hal/dox/rtc.dox @@ -24,6 +24,8 @@ * @details This module defines an abstract interface for Real Time Clock cell. * If you do not need callback functionality than disable * @p RTC_SUPPORTS_CALLBACKS option in @p halconf.h. + * In @p halconf.h you also can select clock source for RTC in + * @p RTC_CLOCK_SOURCE option. * * @pre In order to use the RTC driver the @p HAL_USE_RTC option * must be enabled in @p halconf.h. diff --git a/os/hal/include/rtc.h b/os/hal/include/rtc.h index aa1a61f49..ad66fcd8b 100644 --- a/os/hal/include/rtc.h +++ b/os/hal/include/rtc.h @@ -37,16 +37,6 @@ /*===========================================================================*/ /* Driver constants. */ /*===========================================================================*/ -/* TODO: move this to hal_lld_f103.h & mcuconf.h */ -#define STM32_LSECLK 32768 /**< Low speed external clock. */ - - -/* RCC_CFGR register bits definitions.*/ -#define STM32_RTC_NONE (0 << 8) /**< */ -#define STM32_RTC_LSE (1 << 8) /**< LSE oscillator clock used as RTC clock */ -#define STM32_RTC_LSI (2 << 8) /**< LSI oscillator clock used as RTC clock */ -#define STM32_RTC_HSE (3 << 8) /**< HSE oscillator clock divided by 128 used as RTC clock */ - /*===========================================================================*/ /* Driver pre-compile time settings. */ diff --git a/os/hal/platforms/STM32/rtc_lld.c b/os/hal/platforms/STM32/rtc_lld.c index ed458190d..ce483d3f9 100644 --- a/os/hal/platforms/STM32/rtc_lld.c +++ b/os/hal/platforms/STM32/rtc_lld.c @@ -30,31 +30,6 @@ #include "hal.h" -// TODO: defines look in 4492 stm32f10x.h - - -/** The RTCCLK clock source can be either the HSE/128, LSE or LSI clocks. This is selected -by programming the RTCSEL[1:0] bits in the Backup domain control register (RCC_BDCR). -This selection -CANNOT -be modified without resetting the Backup domain. - -The LSE clock is in the Backup domain, whereas the HSE and LSI clocks are not. -Consequently: -* If LSE is selected as RTC clock: -– The RTC continues to work even if the VDD supply is switched off, provided the -VBAT supply is maintained. -* If LSI is selected as Auto-Wakeup unit (AWU) clock: -– The AWU state is not guaranteed if the VDD supply is powered off. Refer to -Section 6.2.5: LSI clock on page 87 for more details on LSI calibration. -* If the HSE clock divided by 128 is used as the RTC clock: -– The RTC state is not guaranteed if the VDD supply is powered off or if the internal -voltage regulator is powered off (removing power from the 1.8 V domain). -– The DPB bit (Disable backup domain write protection) in the Power controller -register must be set to 1 (refer to Section 4.4.1: Power control register -(PWR_CR)). -*/ - #if HAL_USE_RTC || defined(__DOXYGEN__) /*===========================================================================*/ @@ -137,13 +112,37 @@ void rtc_lld_init(void){ PWR->CR |= PWR_CR_DBP; /* enable access */ if (!(RCC->BDCR & (RCC_BDCR_RTCEN | RCC_BDCR_LSEON))){ /* BKP domain was reseted */ - RCC->BDCR |= STM32_RTC_LSE; /* select clocking from LSE */ + RCC->BDCR |= RTC_CLOCK_SOURCE; /* select clocking from LSE */ RCC->BDCR |= RCC_BDCR_LSEON; /* switch LSE on */ while(!(RCC->BDCR & RCC_BDCR_LSEON)) /* wait for stabilization */ ; RCC->BDCR |= RCC_BDCR_RTCEN; /* run clock */ } + #if defined(RTC_CLOCK_SOURCE) == defined(RCC_BDCR_RTCSEL_LSE) + uint32_t preload = STM32_LSECLK - 1UL; + #elif defined(RTC_CLOCK_SOURCE) == defined(RCC_BDCR_RTCSEL_LSI) + uint32_t preload = STM32_LSICLK - 1UL; + #elif defined(RTC_CLOCK_SOURCE) == defined(RCC_BDCR_RTCSEL_HSE) + uint32_t preload = (STM32_HSICLK / 128UL) - 1UL; + #else + #error "RTC clock source not selected" + #endif /* RTC_CLOCK_SOURCE == RCC_BDCR_RTCSEL_LSE */ + + /* Write preload register only if value changed */ + if (preload != (((uint32_t)(RTC->PRLH)) << 16) + RTC->PRLH){ + while(!(RTC->CRL & RTC_CRL_RTOFF)) + ; + + RTC->CRL |= RTC_CRL_CNF; /* switch on configure mode */ + RTC->PRLH = (uint16_t)((preload >> 16) & 0b1111); /* write preloader */ + RTC->PRLL = (uint16_t)(preload & 0xFFFF); + RTC->CRL &= ~RTC_CRL_CNF; /* switch off configure mode */ + + while(!(RTC->CRL & RTC_CRL_RTOFF)) /* wait for completion */ + ; + } + /* Ensure that RTC_CNT and RTC_DIV contain actual values after enabling * clocking on APB1, because these values only update when APB1 functioning.*/ RTC->CRL &= ~(RTC_CRL_RSF); @@ -181,7 +180,8 @@ void rtc_lld_start(RTCDriver *rtcp, const RTCConfig *rtccfgp){ isr_flags |= RTC_CRH_SECIE; } - RTC->CRL &= ~(RTC_CRL_SECF | RTC_CRL_ALRF | RTC_CRL_OWF); /* clear all even flags*/ + /* clear all event flags just to be safe */ + RTC->CRL &= ~(RTC_CRL_SECF | RTC_CRL_ALRF | RTC_CRL_OWF); RTC->CRH |= isr_flags; } @@ -201,14 +201,11 @@ void rtc_lld_stop(void){ * @param[in] tv_sec time value in UNIX notation. */ void rtc_lld_set_time(uint32_t tv_sec){ - uint32_t preload = STM32_LSECLK - 1UL; while(!(RTC->CRL & RTC_CRL_RTOFF)) ; RTC->CRL |= RTC_CRL_CNF; /* switch on configure mode */ - RTC->PRLH = (uint16_t)((preload >> 16) & 0b1111); /* write preloader */ - RTC->PRLL = (uint16_t)(preload & 0xFFFF); RTC->CNTH = (uint16_t)((tv_sec >> 16) & 0xFFFF); /* write time */ RTC->CNTL = (uint16_t)(tv_sec & 0xFFFF); RTC->CRL &= ~RTC_CRL_CNF; /* switch off configure mode */ diff --git a/os/hal/platforms/STM32/rtc_lld.h b/os/hal/platforms/STM32/rtc_lld.h index fe51df254..a0490b29a 100644 --- a/os/hal/platforms/STM32/rtc_lld.h +++ b/os/hal/platforms/STM32/rtc_lld.h @@ -47,6 +47,14 @@ #define RTC_SUPPORTS_CALLBACKS TRUE #endif +/** + * @brief Clock source selecting. LSE by default. + */ +#if !defined(RTC_CLOCK_SOURCE) || defined(__DOXYGEN__) +#define RTC_CLOCK_SOURCE RCC_BDCR_RTCSEL_LSE +#endif + + /*===========================================================================*/ /* Derived constants and error checks. */ /*===========================================================================*/ diff --git a/os/hal/src/rtc.c b/os/hal/src/rtc.c index 0db21d4d5..f1aa03a34 100644 --- a/os/hal/src/rtc.c +++ b/os/hal/src/rtc.c @@ -92,14 +92,14 @@ void rtcSetTime(uint32_t tv_sec){ /** * @brief Return current time in UNIX notation. */ -uint32_t rtcGetSec(void){ +inline uint32_t rtcGetSec(void){ return rtc_lld_get_sec(); } /** * @brief Return fractional part of current time (milliseconds). */ -uint16_t rtcGetMsec(void){ +inline uint16_t rtcGetMsec(void){ return rtc_lld_get_msec(); } @@ -113,7 +113,7 @@ void rtcSetAlarm(uint32_t tv_alarm){ /** * @brief Get current alarm date in UNIX notation. */ -uint32_t rtcGetAlarm(void){ +inline uint32_t rtcGetAlarm(void){ return rtc_lld_get_alarm(); } diff --git a/testhal/STM32F1xx/RTC/halconf.h b/testhal/STM32F1xx/RTC/halconf.h index 219bfd99e..553decda8 100644 --- a/testhal/STM32F1xx/RTC/halconf.h +++ b/testhal/STM32F1xx/RTC/halconf.h @@ -212,6 +212,13 @@ #define RTC_SUPPORTS_CALLBACKS FALSE #endif +/** + * @brief Clock source selecting. LSE by default. + */ +#if !defined(RTC_CLOCK_SOURCE) || defined(__DOXYGEN__) +#define RTC_CLOCK_SOURCE RCC_BDCR_RTCSEL_LSE +#endif + /*===========================================================================*/ /* MAC driver related settings. */ /*===========================================================================*/ From 7194b7a7fe49bab8d9422dbc2e78d1ae2d39dc9e Mon Sep 17 00:00:00 2001 From: barthess Date: Wed, 31 Aug 2011 17:49:18 +0000 Subject: [PATCH 09/12] RTC. Small code improvements. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/rtc_dev@3276 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- os/hal/platforms/STM32/rtc_lld.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/os/hal/platforms/STM32/rtc_lld.c b/os/hal/platforms/STM32/rtc_lld.c index ce483d3f9..3f8468bae 100644 --- a/os/hal/platforms/STM32/rtc_lld.c +++ b/os/hal/platforms/STM32/rtc_lld.c @@ -245,6 +245,11 @@ void rtc_lld_set_alarm(uint32_t tv_alarm){ while(!(RTC->CRL & RTC_CRL_RTOFF)) /* wait for completion */ ; + +#if !(RTC_SUPPORTS_CALLBACKS) + RTC->CRL &= ~RTC_CRL_ALRF; + RTC->CRH |= RTC_CRH_ALRIE; +#endif /* !(RTC_SUPPORTS_CALLBACKS) */ } /** From 88f24294e2d23667667cf9c37bd6925550b1c714 Mon Sep 17 00:00:00 2001 From: barthess Date: Thu, 1 Sep 2011 17:31:10 +0000 Subject: [PATCH 10/12] RTC. Added deep sleep test git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/rtc_dev@3277 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F1xx/RTC/main.c | 42 ++++++++++++++++++++++++++++++++++-- 1 file changed, 40 insertions(+), 2 deletions(-) diff --git a/testhal/STM32F1xx/RTC/main.c b/testhal/STM32F1xx/RTC/main.c index b8c243810..497b7f0cf 100644 --- a/testhal/STM32F1xx/RTC/main.c +++ b/testhal/STM32F1xx/RTC/main.c @@ -21,7 +21,46 @@ #include "ch.h" #include "hal.h" +#define TEST_DEEPSLEEP_ENABLE +#ifdef TEST_DEEPSLEEP_ENABLE + +static WORKING_AREA(blinkWA, 128); +static msg_t blink_thd(void *arg){ + (void)arg; + while (TRUE) { + chThdSleepMilliseconds(500); + palTogglePad(IOPORT3, GPIOC_LED); + } + return 0; +} + + + + +int main(void) { + halInit(); + chSysInit(); + + chThdCreateStatic(blinkWA, sizeof(blinkWA), NORMALPRIO, blink_thd, NULL); + /* set alarm in near future */ + rtcSetAlarm(rtcGetSec() + 60); + + while (TRUE){ + chThdSleepSeconds(10); + chSysLock(); + + /* going to anabiosis*/ + PWR->CR |= (PWR_CR_PDDS | PWR_CR_LPDS | PWR_CR_CSBF | PWR_CR_CWUF); + SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk; + __WFI(); + } + return 0; +} + + + +#else /* TEST_DEEPSLEEP_ENABLE */ static void my_secondcb(RTCDriver *rtcp){ (void)rtcp; @@ -46,8 +85,6 @@ static const RTCConfig rtccfg={ my_alarmcb, }; - - int main(void) { halInit(); chSysInit(); @@ -60,3 +97,4 @@ int main(void) { } return 0; } +#endif /* TEST_DEEPSLEEP_ENABLE */ From ca3cc2d5554a99aad1c499fabb9ce3d72fd7aacb Mon Sep 17 00:00:00 2001 From: barthess Date: Thu, 1 Sep 2011 17:44:44 +0000 Subject: [PATCH 11/12] RTC. Readability improvements. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/rtc_dev@3278 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- os/hal/include/rtc.h | 4 ++-- os/hal/platforms/STM32/rtc_lld.c | 2 -- os/hal/platforms/STM32/rtc_lld.h | 9 ++------- 3 files changed, 4 insertions(+), 11 deletions(-) diff --git a/os/hal/include/rtc.h b/os/hal/include/rtc.h index ad66fcd8b..0c545c3a6 100644 --- a/os/hal/include/rtc.h +++ b/os/hal/include/rtc.h @@ -73,8 +73,8 @@ extern "C" { void rtcStart(RTCDriver *rtcp, const RTCConfig *rtccfgp); void rtcStop(void); #else /* RTC_SUPPORTS_CALLBACKS */ - #define rtcStart(rtcp, rtccfgp){;} - #define rtcStop(){;} + #define rtcStart(rtcp, rtccfgp) + #define rtcStop() #endif /* RTC_SUPPORTS_CALLBACKS */ void rtcSetTime(uint32_t tv_sec); diff --git a/os/hal/platforms/STM32/rtc_lld.c b/os/hal/platforms/STM32/rtc_lld.c index 3f8468bae..ba89a3c9e 100644 --- a/os/hal/platforms/STM32/rtc_lld.c +++ b/os/hal/platforms/STM32/rtc_lld.c @@ -163,7 +163,6 @@ void rtc_lld_init(void){ * @param[in] rtcp pointer to a @p RTCDriver object * @param[in] rtccfgp pointer to a @p RTCDriver config object */ -#if RTC_SUPPORTS_CALLBACKS void rtc_lld_start(RTCDriver *rtcp, const RTCConfig *rtccfgp){ uint16_t isr_flags = 0; @@ -192,7 +191,6 @@ void rtc_lld_stop(void){ NVICDisableVector(RTC_IRQn); RTC->CRH = 0; } -#endif /* RTC_SUPPORTS_CALLBACKS */ /** diff --git a/os/hal/platforms/STM32/rtc_lld.h b/os/hal/platforms/STM32/rtc_lld.h index a0490b29a..3b4f69665 100644 --- a/os/hal/platforms/STM32/rtc_lld.h +++ b/os/hal/platforms/STM32/rtc_lld.h @@ -112,13 +112,8 @@ extern RTCDriver RTCD; extern "C" { #endif void rtc_lld_init(void); - #if RTC_SUPPORTS_CALLBACKS - void rtc_lld_start(RTCDriver *rtcp, const RTCConfig *rtccfgp); - void rtc_lld_stop(void); - #else /* RTC_SUPPORTS_CALLBACKS */ - #define rtc_lld_start(rtcp, rtccfgp){;} - #define rtc_lld_stop(){;} - #endif /* RTC_SUPPORTS_CALLBACKS */ + void rtc_lld_start(RTCDriver *rtcp, const RTCConfig *rtccfgp); + void rtc_lld_stop(void); void rtc_lld_set_time(uint32_t tv_sec); uint32_t rtc_lld_get_sec(void); uint16_t rtc_lld_get_msec(void); From ac429a2a76727c72d6a7b8273c9643560fcd6222 Mon Sep 17 00:00:00 2001 From: barthess Date: Thu, 1 Sep 2011 18:09:40 +0000 Subject: [PATCH 12/12] RTC. Added state checks. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/rtc_dev@3279 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- os/hal/platforms/STM32/rtc_lld.c | 6 +++--- os/hal/src/rtc.c | 6 ++++-- 2 files changed, 7 insertions(+), 5 deletions(-) diff --git a/os/hal/platforms/STM32/rtc_lld.c b/os/hal/platforms/STM32/rtc_lld.c index ba89a3c9e..1ddbc0903 100644 --- a/os/hal/platforms/STM32/rtc_lld.c +++ b/os/hal/platforms/STM32/rtc_lld.c @@ -241,13 +241,13 @@ void rtc_lld_set_alarm(uint32_t tv_alarm){ RTC->ALRL = (uint16_t)(tv_alarm & 0xFFFF); RTC->CRL &= ~RTC_CRL_CNF; /* switch off configure mode */ - while(!(RTC->CRL & RTC_CRL_RTOFF)) /* wait for completion */ - ; - #if !(RTC_SUPPORTS_CALLBACKS) RTC->CRL &= ~RTC_CRL_ALRF; RTC->CRH |= RTC_CRH_ALRIE; #endif /* !(RTC_SUPPORTS_CALLBACKS) */ + + while(!(RTC->CRL & RTC_CRL_RTOFF)) /* wait for completion */ + ; } /** diff --git a/os/hal/src/rtc.c b/os/hal/src/rtc.c index f1aa03a34..1341bb2dd 100644 --- a/os/hal/src/rtc.c +++ b/os/hal/src/rtc.c @@ -68,7 +68,8 @@ void rtcInit(void){ * @param[in] rtccfgp - pointer to RTC config structure. */ #if RTC_SUPPORTS_CALLBACKS -void rtcStart(RTCDriver *rtcp, const RTCConfig *rtccfgp){ +void rtcStartI(RTCDriver *rtcp, const RTCConfig *rtccfgp){ + chDbgCheckClassI(); chDbgCheck(((rtcp != NULL) && (rtccfgp != NULL)), "rtcStart"); rtc_lld_start(rtcp, rtccfgp); } @@ -76,7 +77,8 @@ void rtcStart(RTCDriver *rtcp, const RTCConfig *rtccfgp){ /** * @brief Stop interrupt servicing routines. */ -void rtcStop(void){ +void rtcStopI(void){ + chDbgCheckClassI(); rtc_lld_stop(); } #endif /* RTC_SUPPORTS_CALLBACKS */