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AVR and simulator still missing. 

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@1740 35acf78f-673a-0410-8e92-d51de3d6d3f4
This commit is contained in:
gdisirio 2010-03-14 09:54:23 +00:00
parent 075b89133e
commit c7837bab2e
11 changed files with 214 additions and 144 deletions
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5
demos/MSP430-MSP430x1611-GCC/mcuconf.h
View File

@ -25,6 +25,11 @@
* is enabled in halconf.h.
*/
/*
* HAL driver system settings.
*/
#define MSP430_USE_CLOCK MSP430_CLOCK_SOURCE_XT2CLK
/*
* ADC driver system settings.
*/

33
docs/reports/MSP430F1611-0.75.txt
View File

@ -5,9 +5,12 @@ Settings: MCLK=DCOCLK 750KHz
*** ChibiOS/RT test suite
***
*** Kernel: 1.3.3unstable
*** Architecture: MSP430
*** Kernel: 1.5.4unstable
*** GCC Version: 3.2.3
*** Architecture: MSP430
*** Core Variant: MSP430
*** Platform: MSP430x16x
*** Test Board: Olimex MSP430-P1611
----------------------------------------------------------------------------
--- Test Case 1.1 (Threads, enqueuing test #1)
@ -89,35 +92,35 @@ Settings: MCLK=DCOCLK 750KHz
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.1 (Benchmark, messages #1)
--- Score : 1934 msgs/S, 3868 ctxswc/S
--- Score : 1970 msgs/S, 3940 ctxswc/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.2 (Benchmark, messages #2)
--- Score : 1603 msgs/S, 3206 ctxswc/S
--- Test Case 11. (Benchmark, messages #2)
--- Score : 1624 msgs/S, 3248 ctxswc/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.3 (Benchmark, messages #3)
--- Score : 1603 msgs/S, 3206 ctxswc/S
--- Score : 1624 msgs/S, 3248 ctxswc/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.4 (Benchmark, context switch)
--- Score : 5936 ctxswc/S
--- Score : 5912 ctxswc/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.5 (Benchmark, threads, full cycle)
--- Score : 1319 threads/S
--- Score : 1125 threads/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.6 (Benchmark, threads, create only)
--- Score : 1698 threads/S
--- Score : 1511 threads/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.7 (Benchmark, mass reschedulation, 5 threads)
--- Score : 494 reschedulations/S, 2964 ctxswc/S
--- Score : 492 reschedulations/S, 2952 ctxswc/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.8 (Benchmark, round robin context switching)
--- Score : 4280 reschedulations/S, 4280 ctxswc/S
--- Score : 4256 reschedulations/S, 4256 ctxswc/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.9 (Benchmark, I/O Queues throughput)
@ -125,7 +128,7 @@ Settings: MCLK=DCOCLK 750KHz
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.10 (Benchmark, virtual timers set/reset)
--- Score : 5628 timers/S
--- Score : 5626 timers/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.11 (Benchmark, semaphores wait/signal)
@ -133,12 +136,12 @@ Settings: MCLK=DCOCLK 750KHz
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.12 (Benchmark, mutexes lock/unlock)
--- Score : 7760 lock+unlock/S
--- Score : 7524 lock+unlock/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.13 (Benchmark, RAM footprint)
--- System: 202 bytes
--- Thread: 30 bytes
--- System: 220 bytes
--- Thread: 36 bytes
--- Timer : 10 bytes
--- Semaph: 6 bytes
--- EventS: 2 bytes

29
docs/reports/MSP430F1611-8.txt
View File

@ -5,9 +5,12 @@ Settings: MCLK=XT2CLK 8MHz
*** ChibiOS/RT test suite
***
*** Kernel: 1.3.8unstable
*** Architecture: MSP430
*** Kernel: 1.5.4unstable
*** GCC Version: 3.2.3
*** Architecture: MSP430
*** Core Variant: MSP430
*** Platform: MSP430x16x
*** Test Board: Olimex MSP430-P1611
----------------------------------------------------------------------------
--- Test Case 1.1 (Threads, enqueuing test #1)
@ -89,35 +92,35 @@ Settings: MCLK=XT2CLK 8MHz
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.1 (Benchmark, messages #1)
--- Score : 20963 msgs/S, 41926 ctxswc/S
--- Score : 21356 msgs/S, 42712 ctxswc/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.2 (Benchmark, messages #2)
--- Score : 17363 msgs/S, 34726 ctxswc/S
--- Score : 17593 msgs/S, 35186 ctxswc/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.3 (Benchmark, messages #3)
--- Score : 17363 msgs/S, 34726 ctxswc/S
--- Score : 17593 msgs/S, 35186 ctxswc/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.4 (Benchmark, context switch)
--- Score : 64288 ctxswc/S
--- Score : 64024 ctxswc/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.5 (Benchmark, threads, full cycle)
--- Score : 14288 threads/S
--- Score : 12194 threads/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.6 (Benchmark, threads, create only)
--- Score : 18404 threads/S
--- Score : 16367 threads/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.7 (Benchmark, mass reschedulation, 5 threads)
--- Score : 5350 reschedulations/S, 32100 ctxswc/S
--- Score : 5329 reschedulations/S, 31974 ctxswc/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.8 (Benchmark, round robin context switching)
--- Score : 46372 reschedulations/S, 46372 ctxswc/S
--- Score : 46100 reschedulations/S, 46100 ctxswc/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.9 (Benchmark, I/O Queues throughput)
@ -133,12 +136,12 @@ Settings: MCLK=XT2CLK 8MHz
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.12 (Benchmark, mutexes lock/unlock)
--- Score : 84076 lock+unlock/S
--- Score : 81504 lock+unlock/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.13 (Benchmark, RAM footprint)
--- System: 202 bytes
--- Thread: 30 bytes
--- System: 220 bytes
--- Thread: 36 bytes
--- Timer : 10 bytes
--- Semaph: 6 bytes
--- EventS: 2 bytes

84
docs/reports/kernel.txt
View File

@ -2,85 +2,85 @@ Platform : PowerPC
OS Setup : Full kernel
Compiler : powerpc-eabi-gcc (Sourcery G++ Lite 4.4-79) 4.4.1
Options : -O2 -DCH_OPTIMIZE_SPEED=TRUE
Kernel Size = 11040
Kernel Size = 11024
Platform : PowerPC
OS Setup : Full kernel
Compiler : powerpc-eabi-gcc (Sourcery G++ Lite 4.4-79) 4.4.1
Options : -O2 -DCH_OPTIMIZE_SPEED=FALSE
Kernel Size = 10584
Kernel Size = 10564
Platform : PowerPC
OS Setup : Minimal kernel
Compiler : powerpc-eabi-gcc (Sourcery G++ Lite 4.4-79) 4.4.1
Options : -O2
Kernel Size = 2304
Kernel Size = 2288
Platform : PowerPC
OS Setup : Full kernel
Compiler : powerpc-eabi-gcc (Sourcery G++ Lite 4.4-79) 4.4.1
Options : -Os -DCH_OPTIMIZE_SPEED=TRUE
Kernel Size = 9700
Kernel Size = 9684
Platform : PowerPC
OS Setup : Full kernel
Compiler : powerpc-eabi-gcc (Sourcery G++ Lite 4.4-79) 4.4.1
Options : -Os -DCH_OPTIMIZE_SPEED=FALSE
Kernel Size = 9216
Kernel Size = 9196
Platform : PowerPC
OS Setup : Minimal kernel
Compiler : powerpc-eabi-gcc (Sourcery G++ Lite 4.4-79) 4.4.1
Options : -Os
Kernel Size = 2328
Kernel Size = 2312
Platform : ARM Cortex-M3
OS Setup : Full kernel
Compiler : arm-elf-gcc (GCC) 4.4.2
Options : -O2 -mthumb -DCH_OPTIMIZE_SPEED=TRUE
Kernel Size = 5436
Kernel Size = 5432
Platform : ARM Cortex-M3
OS Setup : Full kernel
Compiler : arm-elf-gcc (GCC) 4.4.2
Options : -O2 -mthumb -DCH_OPTIMIZE_SPEED=FALSE
Kernel Size = 4960
Kernel Size = 4952
Platform : ARM Cortex-M3
OS Setup : Minimal kernel
Compiler : arm-elf-gcc (GCC) 4.4.2
Options : -O2 -mthumb
Kernel Size = 1412
Kernel Size = 1408
Platform : ARM Cortex-M3
OS Setup : Full kernel
Compiler : arm-elf-gcc (GCC) 4.4.2
Options : -Os -mthumb -DCH_OPTIMIZE_SPEED=TRUE
Kernel Size = 5224
Kernel Size = 5216
Platform : ARM Cortex-M3
OS Setup : Full kernel
Compiler : arm-elf-gcc (GCC) 4.4.2
Options : -Os -mthumb -DCH_OPTIMIZE_SPEED=FALSE
Kernel Size = 4792
Kernel Size = 4788
Platform : ARM Cortex-M3
OS Setup : Minimal kernel
Compiler : arm-elf-gcc (GCC) 4.4.2
Options : -Os -mthumb
Kernel Size = 1372
Kernel Size = 1364
Platform : ARM Cortex-M3
OS Setup : Full kernel
Compiler : arm-elf-gcc (GCC) 4.4.2
Options : -Os -mthumb -ffixed-r7 -DCH_CURRP_REGISTER_CACHE=\"r7\" -DCH_OPTIMIZE_SPEED=TRUE
Kernel Size = 5036
Kernel Size = 5032
Platform : ARM Cortex-M3
OS Setup : Full kernel
Compiler : arm-elf-gcc (GCC) 4.4.2
Options : -Os -mthumb -ffixed-r7 -DCH_CURRP_REGISTER_CACHE=\"r7\" -DCH_OPTIMIZE_SPEED=FALSE
Kernel Size = 4620
Kernel Size = 4616
Platform : ARM Cortex-M3
OS Setup : Minimal kernel
@ -92,157 +92,157 @@ Platform : ARM7TDMI (ARM mode)
OS Setup : Full kernel
Compiler : arm-elf-gcc (GCC) 4.4.2
Options : -O2 -DCH_OPTIMIZE_SPEED=TRUE
Kernel Size = 7976
Kernel Size = 7968
Platform : ARM7TDMI (ARM mode)
OS Setup : Full kernel
Compiler : arm-elf-gcc (GCC) 4.4.2
Options : -O2 -DCH_OPTIMIZE_SPEED=FALSE
Kernel Size = 7556
Kernel Size = 7536
Platform : ARM7TDMI (ARM mode)
OS Setup : Minimal kernel
Compiler : arm-elf-gcc (GCC) 4.4.2
Options : -O2
Kernel Size = 1980
Kernel Size = 1972
Platform : ARM7TDMI (ARM mode)
OS Setup : Full kernel
Compiler : arm-elf-gcc (GCC) 4.4.2
Options : -Os -DCH_OPTIMIZE_SPEED=TRUE
Kernel Size = 7716
Kernel Size = 7708
Platform : ARM7TDMI (ARM mode)
OS Setup : Full kernel
Compiler : arm-elf-gcc (GCC) 4.4.2
Options : -Os -DCH_OPTIMIZE_SPEED=FALSE
Kernel Size = 7340
Kernel Size = 7316
Platform : ARM7TDMI (ARM mode)
OS Setup : Minimal kernel
Compiler : arm-elf-gcc (GCC) 4.4.2
Options : -Os
Kernel Size = 1928
Kernel Size = 1916
Platform : ARM7TDMI (ARM mode)
OS Setup : Full kernel
Compiler : arm-elf-gcc (GCC) 4.4.2
Options : -O2 -ffixed-r7 -DCH_CURRP_REGISTER_CACHE=\"r7\" -DCH_OPTIMIZE_SPEED=TRUE
Kernel Size = 7696
Kernel Size = 7692
Platform : ARM7TDMI (ARM mode)
OS Setup : Full kernel
Compiler : arm-elf-gcc (GCC) 4.4.2
Options : -O2 -ffixed-r7 -DCH_CURRP_REGISTER_CACHE=\"r7\" -DCH_OPTIMIZE_SPEED=FALSE
Kernel Size = 7284
Kernel Size = 7272
Platform : ARM7TDMI (ARM mode)
OS Setup : Minimal kernel
Compiler : arm-elf-gcc (GCC) 4.4.2
Options : -O2 -ffixed-r7 -DCH_CURRP_REGISTER_CACHE=\"r7\"
Kernel Size = 1912
Kernel Size = 1904
Platform : ARM7TDMI (ARM mode)
OS Setup : Full kernel
Compiler : arm-elf-gcc (GCC) 4.4.2
Options : -Os -ffixed-r7 -DCH_CURRP_REGISTER_CACHE=\"r7\" -DCH_OPTIMIZE_SPEED=TRUE
Kernel Size = 7420
Kernel Size = 7416
Platform : ARM7TDMI (ARM mode)
OS Setup : Full kernel
Compiler : arm-elf-gcc (GCC) 4.4.2
Options : -Os -ffixed-r7 -DCH_CURRP_REGISTER_CACHE=\"r7\" -DCH_OPTIMIZE_SPEED=FALSE
Kernel Size = 7056
Kernel Size = 7044
Platform : ARM7TDMI (ARM mode)
OS Setup : Minimal kernel
Compiler : arm-elf-gcc (GCC) 4.4.2
Options : -Os -ffixed-r7 -DCH_CURRP_REGISTER_CACHE=\"r7\"
Kernel Size = 1880
Kernel Size = 1872
Platform : ARM7TDMI (THUMB mode)
OS Setup : Full kernel
Compiler : arm-elf-gcc (GCC) 4.4.2
Options : -O2 -mthumb -DCH_OPTIMIZE_SPEED=TRUE -DTHUMB -DTHUMB_PRESENT -DTHUMB_NO_INTERWORKING
Kernel Size = 5224
Kernel Size = 5216
Platform : ARM7TDMI (THUMB mode)
OS Setup : Full kernel
Compiler : arm-elf-gcc (GCC) 4.4.2
Options : -O2 -mthumb -DCH_OPTIMIZE_SPEED=FALSE -DTHUMB -DTHUMB_PRESENT -DTHUMB_NO_INTERWORKING
Kernel Size = 5024
Kernel Size = 5008
Platform : ARM7TDMI (THUMB mode)
OS Setup : Minimal kernel
Compiler : arm-elf-gcc (GCC) 4.4.2
Options : -O2 -mthumb -DTHUMB -DTHUMB_PRESENT -DTHUMB_NO_INTERWORKING
Kernel Size = 1364
Kernel Size = 1356
Platform : ARM7TDMI (THUMB mode)
OS Setup : Full kernel
Compiler : arm-elf-gcc (GCC) 4.4.2
Options : -Os -mthumb -DCH_OPTIMIZE_SPEED=TRUE -DTHUMB -DTHUMB_PRESENT -DTHUMB_NO_INTERWORKING
Kernel Size = 5044
Kernel Size = 5036
Platform : ARM7TDMI (THUMB mode)
OS Setup : Full kernel
Compiler : arm-elf-gcc (GCC) 4.4.2
Options : -Os -mthumb -DCH_OPTIMIZE_SPEED=FALSE -DTHUMB -DTHUMB_PRESENT -DTHUMB_NO_INTERWORKING
Kernel Size = 4860
Kernel Size = 4844
Platform : ARM7TDMI (THUMB mode)
OS Setup : Minimal kernel
Compiler : arm-elf-gcc (GCC) 4.4.2
Options : -Os -mthumb -DTHUMB -DTHUMB_PRESENT -DTHUMB_NO_INTERWORKING
Kernel Size = 1344
Kernel Size = 1336
Platform : ARM7TDMI (THUMB mode)
OS Setup : Full kernel
Compiler : arm-elf-gcc (GCC) 4.4.2
Options : -O2 -mthumb -ffixed-r7 -DCH_CURRP_REGISTER_CACHE=\"r7\" -DCH_OPTIMIZE_SPEED=TRUE -DTHUMB -DTHUMB_PRESENT -DTHUMB_NO_INTERWORKING
Kernel Size = 5072
Kernel Size = 5064
Platform : ARM7TDMI (THUMB mode)
OS Setup : Full kernel
Compiler : arm-elf-gcc (GCC) 4.4.2
Options : -O2 -mthumb -ffixed-r7 -DCH_CURRP_REGISTER_CACHE=\"r7\" -DCH_OPTIMIZE_SPEED=FALSE -DTHUMB -DTHUMB_PRESENT -DTHUMB_NO_INTERWORKING
Kernel Size = 4888
Kernel Size = 4872
Platform : ARM7TDMI (THUMB mode)
OS Setup : Minimal kernel
Compiler : arm-elf-gcc (GCC) 4.4.2
Options : -O2 -mthumb -ffixed-r7 -DCH_CURRP_REGISTER_CACHE=\"r7\" -DTHUMB -DTHUMB_PRESENT -DTHUMB_NO_INTERWORKING
Kernel Size = 1324
Kernel Size = 1316
Platform : ARM7TDMI (THUMB mode)
OS Setup : Full kernel
Compiler : arm-elf-gcc (GCC) 4.4.2
Options : -Os -mthumb -ffixed-r7 -DCH_CURRP_REGISTER_CACHE=\"r7\" -DCH_OPTIMIZE_SPEED=TRUE -DTHUMB -DTHUMB_PRESENT -DTHUMB_NO_INTERWORKING
Kernel Size = 4852
Kernel Size = 4844
Platform : ARM7TDMI (THUMB mode)
OS Setup : Full kernel
Compiler : arm-elf-gcc (GCC) 4.4.2
Options : -Os -mthumb -ffixed-r7 -DCH_CURRP_REGISTER_CACHE=\"r7\" -DCH_OPTIMIZE_SPEED=FALSE -DTHUMB -DTHUMB_PRESENT -DTHUMB_NO_INTERWORKING
Kernel Size = 4704
Kernel Size = 4688
Platform : ARM7TDMI (THUMB mode)
OS Setup : Minimal kernel
Compiler : arm-elf-gcc (GCC) 4.4.2
Options : -Os -mthumb -ffixed-r7 -DCH_CURRP_REGISTER_CACHE=\"r7\" -DTHUMB -DTHUMB_PRESENT -DTHUMB_NO_INTERWORKING
Kernel Size = 1308
Kernel Size = 1300
Platform : MSP430
OS Setup : Full kernel
Compiler : msp430-gcc (GCC) 3.2.3
Options : -O2 -DCH_OPTIMIZE_SPEED=TRUE
Kernel Size = 5636
Kernel Size = 5640
Platform : MSP430
OS Setup : Full kernel
Compiler : msp430-gcc (GCC) 3.2.3
Options : -O2 -DCH_OPTIMIZE_SPEED=FALSE
Kernel Size = 5120
Kernel Size = 5124
Platform : MSP430
OS Setup : Minimal kernel
@ -254,13 +254,13 @@ Platform : MSP430
OS Setup : Full kernel
Compiler : msp430-gcc (GCC) 3.2.3
Options : -Os -DCH_OPTIMIZE_SPEED=TRUE
Kernel Size = 5572
Kernel Size = 5576
Platform : MSP430
OS Setup : Full kernel
Compiler : msp430-gcc (GCC) 3.2.3
Options : -Os -DCH_OPTIMIZE_SPEED=FALSE
Kernel Size = 5076
Kernel Size = 5080
Platform : MSP430
OS Setup : Minimal kernel

2
os/ports/GCC/ARM7/chcore.h
View File

@ -52,7 +52,7 @@
#define CH_CORE_VARIANT_NAME "ARM7TDMI"
/**
* @brief 32 bit stack and memory alignment enforcement.
* @brief 32 bits stack and memory alignment enforcement.
*/
typedef uint32_t stkalign_t;

2
os/ports/GCC/ARMCM3/chcore.h
View File

@ -102,7 +102,7 @@
#define CH_CORE_VARIANT_NAME "Cortex-M3"
/**
* @brief 32 bit stack and memory alignment enforcement.
* @brief 32 bits stack and memory alignment enforcement.
*/
typedef uint32_t stkalign_t;

43
os/ports/GCC/MSP430/chcore.c
View File

@ -20,6 +20,7 @@
/**
* @file MSP430/chcore.c
* @brief MSP430 architecture port code.
*
* @addtogroup MSP430_CORE
* @{
*/
@ -27,16 +28,21 @@
#include "ch.h"
/**
* Performs a context switch between two threads.
* @param otp the thread to be switched out
* @param ntp the thread to be switched in
* @note The function is declared as a weak symbol, it is possible to redefine
* it in your application code.
* @brief Performs a context switch between two threads.
* @details This is the most critical code in any port, this function
* is responsible for the context switch between 2 threads.
* @note The implementation of this code affects <b>directly</b> the context
* switch performance so optimize here as much as you can.
* @note The function is declared as a weak symbol, it is possible to
* redefine it in your application code.
*
* @param[in] ntp the thread to be switched in
* @param[in] otp the thread to be switched out
*/
/** @cond never */
#if !defined(__DOXYGEN__)
__attribute__((naked, weak))
/** @endcond */
void port_switch(Thread *otp, Thread *ntp) {
#endif
void port_switch(Thread *ntp, Thread *otp) {
register struct intctx *sp asm("r1");
asm volatile ("push r11 \n\t" \
@ -61,13 +67,17 @@ void port_switch(Thread *otp, Thread *ntp) {
}
/**
* Disables the interrupts and halts the system.
* @note The function is declared as a weak symbol, it is possible to redefine
* it in your application code.
* @brief Halts the system.
* @details This function is invoked by the operating system when an
* unrecoverable error is detected (as example because a programming
* error in the application code that triggers an assertion while in
* debug mode).
* @note The function is declared as a weak symbol, it is possible to
* redefine it in your application code.
*/
/** @cond never */
#if !defined(__DOXYGEN__)
__attribute__((weak))
/** @endcond */
#endif
void port_halt(void) {
port_disable();
@ -76,10 +86,11 @@ void port_halt(void) {
}
/**
* Start a thread by invoking its work function.
* If the work function returns @p chThdExit() is automatically invoked.
* @brief Start a thread by invoking its work function.
* @details If the work function returns @p chThdExit() is automatically
* invoked.
*/
void threadstart(void) {
void _port_thread_start(void) {
asm volatile ("eint \n\t" \
"mov r11, r15 \n\t" \

137
os/ports/GCC/MSP430/chcore.h
View File

@ -20,6 +20,7 @@
/**
* @file MSP430/chcore.h
* @brief MSP430 architecture port macros and structures.
*
* @addtogroup MSP430_CORE
* @{
*/
@ -31,19 +32,19 @@
#include <msp430/common.h>
/**
* If enabled allows the idle thread to enter a low power mode.
* @brief Enables the use of a wait state in the idle thread loop.
*/
#ifndef ENABLE_WFI_IDLE
#define ENABLE_WFI_IDLE 0
#endif
/**
* Macro defining the MSP430 architecture.
* @brief Macro defining the MSP430 architecture.
*/
#define CH_ARCHITECTURE_MSP430
/**
* Name of the implemented architecture.
* @brief Name of the implemented architecture.
*/
#define CH_ARCHITECTURE_NAME "MSP430"
@ -53,18 +54,20 @@
#define CH_CORE_VARIANT_NAME "MSP430"
/**
* 16 bit stack alignment.
* @brief 16 bits stack and memory alignment enforcement.
*/
typedef uint16_t stkalign_t;
/**
* Generic MSP430 register.
* @brief Generic MSP430 register.
*/
typedef void *regmsp_t;
/** @cond never */
#if !defined(__DOXYGEN__)
/**
* Interrupt saved context.
* @brief Interrupt saved context.
* @details This structure represents the stack frame saved during a
* preemption-capable interrupt handler.
*/
struct extctx {
regmsp_t r12;
@ -74,11 +77,13 @@ struct extctx {
regmsp_t sr;
regmsp_t pc;
};
/** @endcond */
#endif
/** @cond never */
#if !defined(__DOXYGEN__)
/**
* This structure represents the inner stack frame during a context switching.
* @brief System saved context.
* @details This structure represents the inner stack frame during a context
* switching.
*/
struct intctx {
regmsp_t r4;
@ -91,20 +96,23 @@ struct intctx {
regmsp_t r11;
regmsp_t pc;
};
/** @endcond */
#endif
/** @cond never */
#if !defined(__DOXYGEN__)
/**
* In the MSP430 port this structure just holds a pointer to the @p intctx
* structure representing the stack pointer at the time of the context switch.
* @brief Platform dependent part of the @p Thread structure.
* @details This structure usually contains just the saved stack pointer
* defined as a pointer to a @p intctx structure.
*/
struct context {
struct intctx *sp;
};
/** @endcond */
#endif
/**
* Platform dependent part of the @p chThdInit() API.
* @brief Platform dependent part of the @p chThdInit() API.
* @details This code usually setup the context switching frame represented
* by an @p intctx structure.
*/
#define SETUP_CONTEXT(workspace, wsize, pf, arg) { \
tp->p_ctx.sp = (struct intctx *)((uint8_t *)workspace + \
@ -112,33 +120,39 @@ struct context {
sizeof(struct intctx)); \
tp->p_ctx.sp->r10 = pf; \
tp->p_ctx.sp->r11 = arg; \
tp->p_ctx.sp->pc = threadstart; \
tp->p_ctx.sp->pc = _port_thread_start; \
}
/**
* The default idle thread implementation requires no extra stack space in
* this port.
* @brief Stack size for the system idle thread.
* @details This size depends on the idle thread implementation, usually
* the idle thread should take no more space than those reserved
* by @p INT_REQUIRED_STACK.
*/
#ifndef IDLE_THREAD_STACK_SIZE
#define IDLE_THREAD_STACK_SIZE 0
#endif
/**
* Per-thread stack overhead for interrupts servicing, it is used in the
* calculation of the correct working area size. In this port the default is
* 32 bytes per thread.
* @brief Per-thread stack overhead for interrupts servicing.
* @details This constant is used in the calculation of the correct working
* area size.
* This value can be zero on those architecture where there is a
* separate interrupt stack and the stack space between @p intctx and
* @p extctx is known to be zero.
* @note In this port the default is 32 bytes per thread.
*/
#ifndef INT_REQUIRED_STACK
#define INT_REQUIRED_STACK 32
#endif
/**
* Enforces a correct alignment for a stack area size value.
* @brief Enforces a correct alignment for a stack area size value.
*/
#define STACK_ALIGN(n) ((((n) - 1) | (sizeof(stkalign_t) - 1)) + 1)
/**
* Computes the thread working area global size.
* @brief Computes the thread working area global size.
*/
#define THD_WA_SIZE(n) STACK_ALIGN(sizeof(Thread) + \
sizeof(struct intctx) + \
@ -146,20 +160,23 @@ struct context {
(n) + (INT_REQUIRED_STACK))
/**
* Macro used to allocate a thread working area aligned as both position and
* size.
* @brief Static working area allocation.
* @details This macro is used to allocate a static thread working area
* aligned as both position and size.
*/
#define WORKING_AREA(s, n) stkalign_t s[THD_WA_SIZE(n) / sizeof(stkalign_t)];
/**
* IRQ prologue code, inserted at the start of all IRQ handlers enabled to
* invoke system APIs.
* @brief IRQ prologue code.
* @details This macro must be inserted at the start of all IRQ handlers
* enabled to invoke system APIs.
*/
#define PORT_IRQ_PROLOGUE()
/**
* IRQ epilogue code, inserted at the end of all IRQ handlers enabled to
* invoke system APIs.
* @brief IRQ epilogue code.
* @details This macro must be inserted at the end of all IRQ handlers
* enabled to invoke system APIs.
*/
#define PORT_IRQ_EPILOGUE() { \
if (chSchIsRescRequiredExI()) \
@ -167,56 +184,84 @@ struct context {
}
/**
* IRQ handler function modifier.
* @brief IRQ handler function declaration.
* @note @p id can be a function name or a vector number depending on the
* port implementation.
*/
#define PORT_IRQ_HANDLER(id) interrupt(id) _vect_##id(void)
/**
* This function is empty in this port.
* @brief Port-related initialization code.
* @note This function is empty in this port.
*/
#define port_init()
/**
* Implemented as global interrupt disable.
* @brief Kernel-lock action.
* @details Usually this function just disables interrupts but may perform more
* actions.
* @note Implemented as global interrupt disable.
*/
#define port_lock() asm volatile ("dint")
/**
* Implemented as global interrupt enable.
* @brief Kernel-unlock action.
* @details Usually this function just disables interrupts but may perform more
* actions.
* @note Implemented as global interrupt enable.
*/
#define port_unlock() asm volatile ("eint")
/**
* This function is empty in this port.
* @brief Kernel-lock action from an interrupt handler.
* @details This function is invoked before invoking I-class APIs from
* interrupt handlers. The implementation is architecture dependent,
* in its simplest form it is void.
* @note This function is empty in this port.
*/
#define port_lock_from_isr()
/**
* This function is empty in this port.
* @brief Kernel-unlock action from an interrupt handler.
* @details This function is invoked after invoking I-class APIs from interrupt
* handlers. The implementation is architecture dependent, in its
* simplest form it is void.
* @note This function is empty in this port.
*/
#define port_unlock_from_isr()
/**
* Implemented as global interrupt disable.
* @brief Disables all the interrupt sources.
* @note Of course non maskable interrupt sources are not included.
* @note Implemented as global interrupt disable.
*/
#define port_disable() asm volatile ("dint")
/**
* Same as @p port_disable() in this port, there is no difference between the
* two states.
* @brief Disables the interrupt sources below kernel-level priority.
* @note Interrupt sources above kernel level remains enabled.
* @note Same as @p port_disable() in this port, there is no difference
* between the two states.
*/
#define port_suspend() asm volatile ("dint")
/**
* Implemented as global interrupt enable.
* @brief Enables all the interrupt sources.
* @note Implemented as global interrupt enable.
*/
#define port_enable() asm volatile ("eint")
/**
* This port function is implemented as inlined code for performance reasons.
* @note The port code does not define a low power mode, this macro has to be
* defined externally. The default implementation is a "nop", not a
* real low power mode.
* @brief Enters an architecture-dependent IRQ-waiting mode.
* @details The function is meant to return when an interrupt becomes pending.
* The simplest implementation is an empty function or macro but this
* would not take advantage of architecture-specific power saving
* modes.
* @note This port function is implemented as inlined code for performance
* reasons.
* @note The port code does not define a low power mode, this macro has to
* be defined externally. The default implementation is a "nop", not
* a real low power mode.
*/
#if ENABLE_WFI_IDLE != 0
#ifndef port_wait_for_interrupt
@ -231,9 +276,9 @@ struct context {
#ifdef __cplusplus
extern "C" {
#endif
void port_switch(Thread *otp, Thread *ntp);
void port_switch(Thread *ntp, Thread *otp);
void port_halt(void);
void threadstart(void);
void _port_thread_start(void);
#ifdef __cplusplus
}
#endif

2
os/ports/GCC/PPC/chcore.h
View File

@ -33,7 +33,7 @@
*/
/**
* @brief Enables the use of the WFI ins.
* @brief Enables the use of the @p WFI instruction.
*/
#ifndef ENABLE_WFI_IDLE
#define ENABLE_WFI_IDLE 0

3
readme.txt
View File

@ -65,6 +65,9 @@
subdirectory, this should make things easier for RIDE7 users. The normal
makefile is still available of course.
- NEW: New article in the documentation. Fixed an orphaned page (STM8 port).
- OPT: Optimization on the interface between scheduler and port layer, now
the kernel is even smaller and the context switch performance improved
quite a bit on all the supported architectures.
*** 1.5.3 ***
- FIX: Removed C99-style variables declarations (bug 2964418)(backported