diff --git a/demos/ARMCM3-STM32F103-FATFS-GCC/Makefile b/demos/ARMCM3-STM32F103-FATFS-GCC/Makefile
index 8926ccbfc..7cdfe1e96 100644
--- a/demos/ARMCM3-STM32F103-FATFS-GCC/Makefile
+++ b/demos/ARMCM3-STM32F103-FATFS-GCC/Makefile
@@ -104,7 +104,7 @@ TCPPSRC =
# List ASM source files here
ASMSRC = $(PORTASM) \
- $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F10x/vectors.s
+ $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F10x/vectors_md.s
INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \
$(HALINC) $(PLATFORMINC) $(BOARDINC) \
diff --git a/demos/ARMCM3-STM32F103-GCC/Makefile b/demos/ARMCM3-STM32F103-GCC/Makefile
index bf9247aba..33e4c838b 100644
--- a/demos/ARMCM3-STM32F103-GCC/Makefile
+++ b/demos/ARMCM3-STM32F103-GCC/Makefile
@@ -102,7 +102,7 @@ TCPPSRC =
# List ASM source files here
ASMSRC = $(PORTASM) \
- $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F10x/vectors.s
+ $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F10x/vectors_md.s
INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \
$(HALINC) $(PLATFORMINC) $(BOARDINC) \
@@ -128,7 +128,7 @@ CPPC = $(TRGT)g++
LD = $(TRGT)gcc
#LD = $(TRGT)g++
CP = $(TRGT)objcopy
-AS = $(TRGT)gcc -x assembler-with-cpp
+AS = $(TRGT)gcc
OD = $(TRGT)objdump
HEX = $(CP) -O ihex
BIN = $(CP) -O binary
diff --git a/demos/ARMCM3-STM32F107-GCC/Makefile b/demos/ARMCM3-STM32F107-GCC/Makefile
index c199576c6..9ad48509b 100644
--- a/demos/ARMCM3-STM32F107-GCC/Makefile
+++ b/demos/ARMCM3-STM32F107-GCC/Makefile
@@ -102,7 +102,7 @@ TCPPSRC =
# List ASM source files here
ASMSRC = $(PORTASM) \
- $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F10x/vectors.s
+ $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F10x/vectors_cl.s
INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \
$(HALINC) $(PLATFORMINC) $(BOARDINC) \
diff --git a/os/ports/GCC/ARMCMx/LPC11xx/port.mk b/os/ports/GCC/ARMCMx/LPC11xx/port.mk
index dba1defc8..f8411ddf8 100644
--- a/os/ports/GCC/ARMCMx/LPC11xx/port.mk
+++ b/os/ports/GCC/ARMCMx/LPC11xx/port.mk
@@ -4,7 +4,7 @@ PORTSRC = ${CHIBIOS}/os/ports/GCC/ARMCMx/chcore.c \
${CHIBIOS}/os/ports/GCC/ARMCMx/nvic.c \
${CHIBIOS}/os/ports/GCC/ARMCMx/cmsis/core_cm0.c
-PORTASM = ${CHIBIOS}/os/ports/GCC/ARMCMx/crt0.s
+PORTASM = ${CHIBIOS}/os/ports/GCC/ARMCMx/crt0_v6m.s
PORTINC = ${CHIBIOS}/os/ports/GCC/ARMCMx \
${CHIBIOS}/os/ports/GCC/ARMCMx/LPC11xx \
diff --git a/os/ports/GCC/ARMCMx/LPC11xx/vectors.s b/os/ports/GCC/ARMCMx/LPC11xx/vectors.s
index 44ea654ce..3f44c900f 100644
--- a/os/ports/GCC/ARMCMx/LPC11xx/vectors.s
+++ b/os/ports/GCC/ARMCMx/LPC11xx/vectors.s
@@ -17,6 +17,16 @@
along with this program. If not, see .
*/
+/**
+ * @file LPC11xx/vectors.s
+ * @brief Interrupt vectors for the LPC11xx family.
+ *
+ * @addtogroup ARMCMx_CORE
+ * @{
+ */
+
+#if !defined(__DOXYGEN__)
+
.syntax unified
.thumb
@@ -209,4 +219,10 @@ VectorB8:
.weak VectorBC
VectorBC:
-here: b here
+ .global _unhandled_exception
+_unhandled_exception:
+ b _unhandled_exception
+
+#endif
+
+/** @} */
diff --git a/os/ports/GCC/ARMCMx/LPC13xx/port.mk b/os/ports/GCC/ARMCMx/LPC13xx/port.mk
index 6fb9ca494..7448e1f93 100644
--- a/os/ports/GCC/ARMCMx/LPC13xx/port.mk
+++ b/os/ports/GCC/ARMCMx/LPC13xx/port.mk
@@ -4,7 +4,7 @@ PORTSRC = ${CHIBIOS}/os/ports/GCC/ARMCMx/chcore.c \
${CHIBIOS}/os/ports/GCC/ARMCMx/nvic.c \
${CHIBIOS}/os/ports/GCC/ARMCMx/cmsis/core_cm3.c
-PORTASM = ${CHIBIOS}/os/ports/GCC/ARMCMx/crt0.s
+PORTASM = ${CHIBIOS}/os/ports/GCC/ARMCMx/crt0_v7m.s
PORTINC = ${CHIBIOS}/os/ports/GCC/ARMCMx \
${CHIBIOS}/os/ports/GCC/ARMCMx/LPC13xx \
diff --git a/os/ports/GCC/ARMCMx/LPC13xx/vectors.s b/os/ports/GCC/ARMCMx/LPC13xx/vectors.s
index 50506cd19..2716ff378 100644
--- a/os/ports/GCC/ARMCMx/LPC13xx/vectors.s
+++ b/os/ports/GCC/ARMCMx/LPC13xx/vectors.s
@@ -17,6 +17,16 @@
along with this program. If not, see .
*/
+/**
+ * @file LPC13xx/vectors.s
+ * @brief Interrupt vectors for the LPC13xx family.
+ *
+ * @addtogroup ARMCMx_CORE
+ * @{
+ */
+
+#if !defined(__DOXYGEN__)
+
.syntax unified
.thumb
@@ -305,4 +315,10 @@ Vector118:
.weak Vector11C
Vector11C:
-here: b here
+ .global _unhandled_exception
+_unhandled_exception:
+ b _unhandled_exception
+
+#endif
+
+/** @} */
diff --git a/os/ports/GCC/ARMCMx/STM32F10x/port.mk b/os/ports/GCC/ARMCMx/STM32F10x/port.mk
index 02cbe871a..52d3b912e 100644
--- a/os/ports/GCC/ARMCMx/STM32F10x/port.mk
+++ b/os/ports/GCC/ARMCMx/STM32F10x/port.mk
@@ -4,7 +4,7 @@ PORTSRC = ${CHIBIOS}/os/ports/GCC/ARMCMx/chcore.c \
${CHIBIOS}/os/ports/GCC/ARMCMx/nvic.c \
${CHIBIOS}/os/ports/GCC/ARMCMx/cmsis/core_cm3.c
-PORTASM = ${CHIBIOS}/os/ports/GCC/ARMCMx/crt0.s
+PORTASM = ${CHIBIOS}/os/ports/GCC/ARMCMx/crt0_v7m.s
PORTINC = ${CHIBIOS}/os/ports/GCC/ARMCMx \
${CHIBIOS}/os/ports/GCC/ARMCMx/STM32F10x \
diff --git a/os/ports/GCC/ARMCMx/STM32F10x/vectors.s b/os/ports/GCC/ARMCMx/STM32F10x/vectors_cl.s
similarity index 85%
rename from os/ports/GCC/ARMCMx/STM32F10x/vectors.s
rename to os/ports/GCC/ARMCMx/STM32F10x/vectors_cl.s
index 0d516fb04..fbd76ee21 100644
--- a/os/ports/GCC/ARMCMx/STM32F10x/vectors.s
+++ b/os/ports/GCC/ARMCMx/STM32F10x/vectors_cl.s
@@ -17,16 +17,19 @@
along with this program. If not, see .
*/
+/**
+ * @file STM32/vectors_cl.s
+ * @brief Interrupt vectors for the STM32 Connection Line sub-family.
+ *
+ * @addtogroup ARMCMx_CORE
+ * @{
+ */
+
+#if !defined(__DOXYGEN__)
+
.syntax unified
.thumb
-/* If the macro is not defined in the Makefile then a board.h file must be
- provided containing the definition of the STM32 family member.*/
-#if !defined(STM32F10X_LD) && !defined(STM32F10X_MD) && \
- !defined(STM32F10X_HD) && !defined(STM32F10X_CL)
-#include "board.h"
-#endif
-
.section vectors
_vectors:
.word __ram_end__
@@ -88,7 +91,6 @@ _vectors:
.word VectorE0
.word VectorE4
.word VectorE8
-#if defined(STM32F10X_HD) || defined(STM32F10X_CL)
.word VectorEC
.word VectorF0
.word VectorF4
@@ -106,8 +108,6 @@ _vectors:
.word Vector124
.word Vector128
.word Vector12C
-#endif
-#if defined(STM32F10X_CL)
.word Vector130
.word Vector134
.word Vector138
@@ -116,7 +116,6 @@ _vectors:
.word Vector144
.word Vector148
.word Vector14C
-#endif
.weak NMIVector
NMIVector:
@@ -289,7 +288,6 @@ VectorE4:
.weak VectorE8
VectorE8:
-#if defined(STM32F10X_HD) || defined(STM32F10X_CL)
.weak VectorEC
VectorEC:
@@ -340,8 +338,7 @@ Vector128:
.weak Vector12C
Vector12C:
-#endif
-#if defined(STM32F10X_CL)
+
.weak Vector130
Vector130:
@@ -365,6 +362,11 @@ Vector148:
.weak Vector14C
Vector14C:
+
+ .global _unhandled_exception
+_unhandled_exception:
+ b _unhandled_exception
+
#endif
-here: b here
+/** @} */
diff --git a/os/ports/GCC/ARMCMx/STM32F10x/vectors_hd.s b/os/ports/GCC/ARMCMx/STM32F10x/vectors_hd.s
new file mode 100644
index 000000000..83456a659
--- /dev/null
+++ b/os/ports/GCC/ARMCMx/STM32F10x/vectors_hd.s
@@ -0,0 +1,340 @@
+/*
+ ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio.
+
+ This file is part of ChibiOS/RT.
+
+ ChibiOS/RT is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS/RT is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see .
+*/
+
+/**
+ * @file STM32/vectors_hd.s
+ * @brief Interrupt vectors for the STM32 High Density sub-family.
+ *
+ * @addtogroup ARMCMx_CORE
+ * @{
+ */
+
+#if !defined(__DOXYGEN__)
+
+.syntax unified
+.thumb
+
+.section vectors
+_vectors:
+ .word __ram_end__
+ .word ResetHandler
+ .word NMIVector
+ .word HardFaultVector
+ .word MemManageVector
+ .word BusFaultVector
+ .word UsageFaultVector
+ .word Vector1C
+ .word Vector20
+ .word Vector24
+ .word Vector28
+ .word SVCallVector
+ .word DebugMonitorVector
+ .word Vector34
+ .word PendSVVector
+ .word SysTickVector
+ .word Vector40
+ .word Vector44
+ .word Vector48
+ .word Vector4C
+ .word Vector50
+ .word Vector54
+ .word Vector58
+ .word Vector5C
+ .word Vector60
+ .word Vector64
+ .word Vector68
+ .word Vector6C
+ .word Vector70
+ .word Vector74
+ .word Vector78
+ .word Vector7C
+ .word Vector80
+ .word Vector84
+ .word Vector88
+ .word Vector8C
+ .word Vector90
+ .word Vector94
+ .word Vector98
+ .word Vector9C
+ .word VectorA0
+ .word VectorA4
+ .word VectorA8
+ .word VectorAC
+ .word VectorB0
+ .word VectorB4
+ .word VectorB8
+ .word VectorBC
+ .word VectorC0
+ .word VectorC4
+ .word VectorC8
+ .word VectorCC
+ .word VectorD0
+ .word VectorD4
+ .word VectorD8
+ .word VectorDC
+ .word VectorE0
+ .word VectorE4
+ .word VectorE8
+ .word VectorEC
+ .word VectorF0
+ .word VectorF4
+ .word VectorF8
+ .word VectorFC
+ .word Vector100
+ .word Vector104
+ .word Vector108
+ .word Vector10C
+ .word Vector110
+ .word Vector114
+ .word Vector118
+ .word Vector11C
+ .word Vector120
+ .word Vector124
+ .word Vector128
+ .word Vector12C
+
+.weak NMIVector
+NMIVector:
+
+.weak HardFaultVector
+HardFaultVector:
+
+.weak MemManageVector
+MemManageVector:
+
+.weak BusFaultVector
+BusFaultVector:
+
+.weak UsageFaultVector
+UsageFaultVector:
+
+.weak Vector1C
+Vector1C:
+
+.weak Vector20
+Vector20:
+
+.weak Vector24
+Vector24:
+
+.weak Vector28
+Vector28:
+
+.weak SVCallVector
+SVCallVector:
+
+.weak DebugMonitorVector
+DebugMonitorVector:
+
+.weak Vector34
+Vector34:
+
+.weak PendSVVector
+PendSVVector:
+
+.weak SysTickVector
+SysTickVector:
+
+.weak Vector40
+Vector40:
+
+.weak Vector44
+Vector44:
+
+.weak Vector48
+Vector48:
+
+.weak Vector4C
+Vector4C:
+
+.weak Vector50
+Vector50:
+
+.weak Vector54
+Vector54:
+
+.weak Vector58
+Vector58:
+
+.weak Vector5C
+Vector5C:
+
+.weak Vector60
+Vector60:
+
+.weak Vector64
+Vector64:
+
+.weak Vector68
+Vector68:
+
+.weak Vector6C
+Vector6C:
+
+.weak Vector70
+Vector70:
+
+.weak Vector74
+Vector74:
+
+.weak Vector78
+Vector78:
+
+.weak Vector7C
+Vector7C:
+
+.weak Vector80
+Vector80:
+
+.weak Vector84
+Vector84:
+
+.weak Vector88
+Vector88:
+
+.weak Vector8C
+Vector8C:
+
+.weak Vector90
+Vector90:
+
+.weak Vector94
+Vector94:
+
+.weak Vector98
+Vector98:
+
+.weak Vector9C
+Vector9C:
+
+.weak VectorA0
+VectorA0:
+
+.weak VectorA4
+VectorA4:
+
+.weak VectorA8
+VectorA8:
+
+.weak VectorAC
+VectorAC:
+
+.weak VectorB0
+VectorB0:
+
+.weak VectorB4
+VectorB4:
+
+.weak VectorB8
+VectorB8:
+
+.weak VectorBC
+VectorBC:
+
+.weak VectorC0
+VectorC0:
+
+.weak VectorC4
+VectorC4:
+
+.weak VectorC8
+VectorC8:
+
+.weak VectorCC
+VectorCC:
+
+.weak VectorD0
+VectorD0:
+
+.weak VectorD4
+VectorD4:
+
+.weak VectorD8
+VectorD8:
+
+.weak VectorDC
+VectorDC:
+
+.weak VectorE0
+VectorE0:
+
+.weak VectorE4
+VectorE4:
+
+.weak VectorE8
+VectorE8:
+
+.weak VectorEC
+VectorEC:
+
+.weak VectorF0
+VectorF0:
+
+.weak VectorF4
+VectorF4:
+
+.weak VectorF8
+VectorF8:
+
+.weak VectorFC
+VectorFC:
+
+.weak Vector100
+Vector100:
+
+.weak Vector104
+Vector104:
+
+.weak Vector108
+Vector108:
+
+.weak Vector10C
+Vector10C:
+
+.weak Vector110
+Vector110:
+
+.weak Vector114
+Vector114:
+
+.weak Vector118
+Vector118:
+
+.weak Vector11C
+Vector11C:
+
+.weak Vector120
+Vector120:
+
+.weak Vector124
+Vector124:
+
+.weak Vector128
+Vector128:
+
+.weak Vector12C
+Vector12C:
+
+ .global _unhandled_exception
+_unhandled_exception:
+ b _unhandled_exception
+
+#endif
+
+/** @} */
diff --git a/os/ports/GCC/ARMCMx/STM32F10x/vectors_ld.s b/os/ports/GCC/ARMCMx/STM32F10x/vectors_ld.s
new file mode 100644
index 000000000..4753f2427
--- /dev/null
+++ b/os/ports/GCC/ARMCMx/STM32F10x/vectors_ld.s
@@ -0,0 +1,272 @@
+/*
+ ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio.
+
+ This file is part of ChibiOS/RT.
+
+ ChibiOS/RT is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS/RT is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see .
+*/
+
+/**
+ * @file STM32/vectors_cl.s
+ * @brief Interrupt vectors for the STM32 Low Density sub-family.
+ *
+ * @addtogroup ARMCMx_CORE
+ * @{
+ */
+
+#if !defined(__DOXYGEN__)
+
+.syntax unified
+.thumb
+
+.section vectors
+_vectors:
+ .word __ram_end__
+ .word ResetHandler
+ .word NMIVector
+ .word HardFaultVector
+ .word MemManageVector
+ .word BusFaultVector
+ .word UsageFaultVector
+ .word Vector1C
+ .word Vector20
+ .word Vector24
+ .word Vector28
+ .word SVCallVector
+ .word DebugMonitorVector
+ .word Vector34
+ .word PendSVVector
+ .word SysTickVector
+ .word Vector40
+ .word Vector44
+ .word Vector48
+ .word Vector4C
+ .word Vector50
+ .word Vector54
+ .word Vector58
+ .word Vector5C
+ .word Vector60
+ .word Vector64
+ .word Vector68
+ .word Vector6C
+ .word Vector70
+ .word Vector74
+ .word Vector78
+ .word Vector7C
+ .word Vector80
+ .word Vector84
+ .word Vector88
+ .word Vector8C
+ .word Vector90
+ .word Vector94
+ .word Vector98
+ .word Vector9C
+ .word VectorA0
+ .word VectorA4
+ .word VectorA8
+ .word VectorAC
+ .word VectorB0
+ .word VectorB4
+ .word VectorB8
+ .word VectorBC
+ .word VectorC0
+ .word VectorC4
+ .word VectorC8
+ .word VectorCC
+ .word VectorD0
+ .word VectorD4
+ .word VectorD8
+ .word VectorDC
+ .word VectorE0
+ .word VectorE4
+ .word VectorE8
+
+.weak NMIVector
+NMIVector:
+
+.weak HardFaultVector
+HardFaultVector:
+
+.weak MemManageVector
+MemManageVector:
+
+.weak BusFaultVector
+BusFaultVector:
+
+.weak UsageFaultVector
+UsageFaultVector:
+
+.weak Vector1C
+Vector1C:
+
+.weak Vector20
+Vector20:
+
+.weak Vector24
+Vector24:
+
+.weak Vector28
+Vector28:
+
+.weak SVCallVector
+SVCallVector:
+
+.weak DebugMonitorVector
+DebugMonitorVector:
+
+.weak Vector34
+Vector34:
+
+.weak PendSVVector
+PendSVVector:
+
+.weak SysTickVector
+SysTickVector:
+
+.weak Vector40
+Vector40:
+
+.weak Vector44
+Vector44:
+
+.weak Vector48
+Vector48:
+
+.weak Vector4C
+Vector4C:
+
+.weak Vector50
+Vector50:
+
+.weak Vector54
+Vector54:
+
+.weak Vector58
+Vector58:
+
+.weak Vector5C
+Vector5C:
+
+.weak Vector60
+Vector60:
+
+.weak Vector64
+Vector64:
+
+.weak Vector68
+Vector68:
+
+.weak Vector6C
+Vector6C:
+
+.weak Vector70
+Vector70:
+
+.weak Vector74
+Vector74:
+
+.weak Vector78
+Vector78:
+
+.weak Vector7C
+Vector7C:
+
+.weak Vector80
+Vector80:
+
+.weak Vector84
+Vector84:
+
+.weak Vector88
+Vector88:
+
+.weak Vector8C
+Vector8C:
+
+.weak Vector90
+Vector90:
+
+.weak Vector94
+Vector94:
+
+.weak Vector98
+Vector98:
+
+.weak Vector9C
+Vector9C:
+
+.weak VectorA0
+VectorA0:
+
+.weak VectorA4
+VectorA4:
+
+.weak VectorA8
+VectorA8:
+
+.weak VectorAC
+VectorAC:
+
+.weak VectorB0
+VectorB0:
+
+.weak VectorB4
+VectorB4:
+
+.weak VectorB8
+VectorB8:
+
+.weak VectorBC
+VectorBC:
+
+.weak VectorC0
+VectorC0:
+
+.weak VectorC4
+VectorC4:
+
+.weak VectorC8
+VectorC8:
+
+.weak VectorCC
+VectorCC:
+
+.weak VectorD0
+VectorD0:
+
+.weak VectorD4
+VectorD4:
+
+.weak VectorD8
+VectorD8:
+
+.weak VectorDC
+VectorDC:
+
+.weak VectorE0
+VectorE0:
+
+.weak VectorE4
+VectorE4:
+
+.weak VectorE8
+VectorE8:
+
+ .global _unhandled_exception
+_unhandled_exception:
+ b _unhandled_exception
+
+#endif
+
+/** @} */
diff --git a/os/ports/GCC/ARMCMx/STM32F10x/vectors_lp.s b/os/ports/GCC/ARMCMx/STM32F10x/vectors_lp.s
new file mode 100644
index 000000000..f4497eaa7
--- /dev/null
+++ b/os/ports/GCC/ARMCMx/STM32F10x/vectors_lp.s
@@ -0,0 +1,279 @@
+/*
+ ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio.
+
+ This file is part of ChibiOS/RT.
+
+ ChibiOS/RT is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS/RT is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see .
+*/
+
+/**
+ * @file STM32/vectors_lp.s
+ * @brief Interrupt vectors for the STM32 Low Power sub-family.
+ *
+ * @addtogroup ARMCMx_CORE
+ * @{
+ */
+
+#if !defined(__DOXYGEN__)
+
+.syntax unified
+.thumb
+
+.section vectors
+_vectors:
+ .word __ram_end__
+ .word ResetHandler
+ .word NMIVector
+ .word HardFaultVector
+ .word MemManageVector
+ .word BusFaultVector
+ .word UsageFaultVector
+ .word Vector1C
+ .word Vector20
+ .word Vector24
+ .word Vector28
+ .word SVCallVector
+ .word DebugMonitorVector
+ .word Vector34
+ .word PendSVVector
+ .word SysTickVector
+ .word Vector40
+ .word Vector44
+ .word Vector48
+ .word Vector4C
+ .word Vector50
+ .word Vector54
+ .word Vector58
+ .word Vector5C
+ .word Vector60
+ .word Vector64
+ .word Vector68
+ .word Vector6C
+ .word Vector70
+ .word Vector74
+ .word Vector78
+ .word Vector7C
+ .word Vector80
+ .word Vector84
+ .word Vector88
+ .word Vector8C
+ .word Vector90
+ .word Vector94
+ .word Vector98
+ .word Vector9C
+ .word VectorA0
+ .word VectorA4
+ .word VectorA8
+ .word VectorAC
+ .word VectorB0
+ .word VectorB4
+ .word VectorB8
+ .word VectorBC
+ .word VectorC0
+ .word VectorC4
+ .word VectorC8
+ .word VectorCC
+ .word VectorD0
+ .word VectorD4
+ .word VectorD8
+ .word VectorDC
+ .word VectorE0
+ .word VectorE4
+ .word VectorE8
+ .word VectorEC
+ .word VectorF0
+
+.weak NMIVector
+NMIVector:
+
+.weak HardFaultVector
+HardFaultVector:
+
+.weak MemManageVector
+MemManageVector:
+
+.weak BusFaultVector
+BusFaultVector:
+
+.weak UsageFaultVector
+UsageFaultVector:
+
+.weak Vector1C
+Vector1C:
+
+.weak Vector20
+Vector20:
+
+.weak Vector24
+Vector24:
+
+.weak Vector28
+Vector28:
+
+.weak SVCallVector
+SVCallVector:
+
+.weak DebugMonitorVector
+DebugMonitorVector:
+
+.weak Vector34
+Vector34:
+
+.weak PendSVVector
+PendSVVector:
+
+.weak SysTickVector
+SysTickVector:
+
+.weak Vector40
+Vector40:
+
+.weak Vector44
+Vector44:
+
+.weak Vector48
+Vector48:
+
+.weak Vector4C
+Vector4C:
+
+.weak Vector50
+Vector50:
+
+.weak Vector54
+Vector54:
+
+.weak Vector58
+Vector58:
+
+.weak Vector5C
+Vector5C:
+
+.weak Vector60
+Vector60:
+
+.weak Vector64
+Vector64:
+
+.weak Vector68
+Vector68:
+
+.weak Vector6C
+Vector6C:
+
+.weak Vector70
+Vector70:
+
+.weak Vector74
+Vector74:
+
+.weak Vector78
+Vector78:
+
+.weak Vector7C
+Vector7C:
+
+.weak Vector80
+Vector80:
+
+.weak Vector84
+Vector84:
+
+.weak Vector88
+Vector88:
+
+.weak Vector8C
+Vector8C:
+
+.weak Vector90
+Vector90:
+
+.weak Vector94
+Vector94:
+
+.weak Vector98
+Vector98:
+
+.weak Vector9C
+Vector9C:
+
+.weak VectorA0
+VectorA0:
+
+.weak VectorA4
+VectorA4:
+
+.weak VectorA8
+VectorA8:
+
+.weak VectorAC
+VectorAC:
+
+.weak VectorB0
+VectorB0:
+
+.weak VectorB4
+VectorB4:
+
+.weak VectorB8
+VectorB8:
+
+.weak VectorBC
+VectorBC:
+
+.weak VectorC0
+VectorC0:
+
+.weak VectorC4
+VectorC4:
+
+.weak VectorC8
+VectorC8:
+
+.weak VectorCC
+VectorCC:
+
+.weak VectorD0
+VectorD0:
+
+.weak VectorD4
+VectorD4:
+
+.weak VectorD8
+VectorD8:
+
+.weak VectorDC
+VectorDC:
+
+.weak VectorE0
+VectorE0:
+
+.weak VectorE4
+VectorE4:
+
+.weak VectorE8
+VectorE8:
+
+VectorEC:
+
+.weak VectorF0
+VectorF0:
+
+ .global _unhandled_exception
+_unhandled_exception:
+ b _unhandled_exception
+
+#endif
+
+/** @} */
diff --git a/os/ports/GCC/ARMCMx/STM32F10x/vectors_md.s b/os/ports/GCC/ARMCMx/STM32F10x/vectors_md.s
new file mode 100644
index 000000000..25e264eea
--- /dev/null
+++ b/os/ports/GCC/ARMCMx/STM32F10x/vectors_md.s
@@ -0,0 +1,272 @@
+/*
+ ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio.
+
+ This file is part of ChibiOS/RT.
+
+ ChibiOS/RT is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS/RT is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see .
+*/
+
+/**
+ * @file STM32/vectors_md.s
+ * @brief Interrupt vectors for the STM32 Medium Density sub-family.
+ *
+ * @addtogroup ARMCMx_CORE
+ * @{
+ */
+
+#if !defined(__DOXYGEN__)
+
+.syntax unified
+.thumb
+
+.section vectors
+_vectors:
+ .word __ram_end__
+ .word ResetHandler
+ .word NMIVector
+ .word HardFaultVector
+ .word MemManageVector
+ .word BusFaultVector
+ .word UsageFaultVector
+ .word Vector1C
+ .word Vector20
+ .word Vector24
+ .word Vector28
+ .word SVCallVector
+ .word DebugMonitorVector
+ .word Vector34
+ .word PendSVVector
+ .word SysTickVector
+ .word Vector40
+ .word Vector44
+ .word Vector48
+ .word Vector4C
+ .word Vector50
+ .word Vector54
+ .word Vector58
+ .word Vector5C
+ .word Vector60
+ .word Vector64
+ .word Vector68
+ .word Vector6C
+ .word Vector70
+ .word Vector74
+ .word Vector78
+ .word Vector7C
+ .word Vector80
+ .word Vector84
+ .word Vector88
+ .word Vector8C
+ .word Vector90
+ .word Vector94
+ .word Vector98
+ .word Vector9C
+ .word VectorA0
+ .word VectorA4
+ .word VectorA8
+ .word VectorAC
+ .word VectorB0
+ .word VectorB4
+ .word VectorB8
+ .word VectorBC
+ .word VectorC0
+ .word VectorC4
+ .word VectorC8
+ .word VectorCC
+ .word VectorD0
+ .word VectorD4
+ .word VectorD8
+ .word VectorDC
+ .word VectorE0
+ .word VectorE4
+ .word VectorE8
+
+.weak NMIVector
+NMIVector:
+
+.weak HardFaultVector
+HardFaultVector:
+
+.weak MemManageVector
+MemManageVector:
+
+.weak BusFaultVector
+BusFaultVector:
+
+.weak UsageFaultVector
+UsageFaultVector:
+
+.weak Vector1C
+Vector1C:
+
+.weak Vector20
+Vector20:
+
+.weak Vector24
+Vector24:
+
+.weak Vector28
+Vector28:
+
+.weak SVCallVector
+SVCallVector:
+
+.weak DebugMonitorVector
+DebugMonitorVector:
+
+.weak Vector34
+Vector34:
+
+.weak PendSVVector
+PendSVVector:
+
+.weak SysTickVector
+SysTickVector:
+
+.weak Vector40
+Vector40:
+
+.weak Vector44
+Vector44:
+
+.weak Vector48
+Vector48:
+
+.weak Vector4C
+Vector4C:
+
+.weak Vector50
+Vector50:
+
+.weak Vector54
+Vector54:
+
+.weak Vector58
+Vector58:
+
+.weak Vector5C
+Vector5C:
+
+.weak Vector60
+Vector60:
+
+.weak Vector64
+Vector64:
+
+.weak Vector68
+Vector68:
+
+.weak Vector6C
+Vector6C:
+
+.weak Vector70
+Vector70:
+
+.weak Vector74
+Vector74:
+
+.weak Vector78
+Vector78:
+
+.weak Vector7C
+Vector7C:
+
+.weak Vector80
+Vector80:
+
+.weak Vector84
+Vector84:
+
+.weak Vector88
+Vector88:
+
+.weak Vector8C
+Vector8C:
+
+.weak Vector90
+Vector90:
+
+.weak Vector94
+Vector94:
+
+.weak Vector98
+Vector98:
+
+.weak Vector9C
+Vector9C:
+
+.weak VectorA0
+VectorA0:
+
+.weak VectorA4
+VectorA4:
+
+.weak VectorA8
+VectorA8:
+
+.weak VectorAC
+VectorAC:
+
+.weak VectorB0
+VectorB0:
+
+.weak VectorB4
+VectorB4:
+
+.weak VectorB8
+VectorB8:
+
+.weak VectorBC
+VectorBC:
+
+.weak VectorC0
+VectorC0:
+
+.weak VectorC4
+VectorC4:
+
+.weak VectorC8
+VectorC8:
+
+.weak VectorCC
+VectorCC:
+
+.weak VectorD0
+VectorD0:
+
+.weak VectorD4
+VectorD4:
+
+.weak VectorD8
+VectorD8:
+
+.weak VectorDC
+VectorDC:
+
+.weak VectorE0
+VectorE0:
+
+.weak VectorE4
+VectorE4:
+
+.weak VectorE8
+VectorE8:
+
+ .global _unhandled_exception
+_unhandled_exception:
+ b _unhandled_exception
+
+#endif
+
+/** @} */
diff --git a/os/ports/GCC/ARMCMx/crt0.s b/os/ports/GCC/ARMCMx/crt0_v6m.s
similarity index 85%
rename from os/ports/GCC/ARMCMx/crt0.s
rename to os/ports/GCC/ARMCMx/crt0_v6m.s
index 579292415..b597f6b34 100644
--- a/os/ports/GCC/ARMCMx/crt0.s
+++ b/os/ports/GCC/ARMCMx/crt0_v6m.s
@@ -18,15 +18,13 @@
*/
/**
- * @file ARMCMx/crt0.s
- * @brief Generic ARM Cortex-Mx startup file for ChibiOS/RT.
+ * @file ARMCMx/crt0_v6m.s
+ * @brief Generic ARMv6-M (Cortex-M0/M1) startup file for ChibiOS/RT.
*
* @addtogroup ARMCMx_CORE
* @{
*/
-#include "cmparams.h"
-
#if !defined(__DOXYGEN__)
.set CONTROL_MODE_PRIVILEGED, 0
@@ -74,7 +72,6 @@ ResetHandler:
ldr r3, =_edata
dloop:
cmp r2, r3
-#if (CORTEX_MODEL == CORTEX_M0) || (CORTEX_MODEL == CORTEX_M1)
bge enddloop
ldr r0, [r1]
str r0, [r2]
@@ -82,12 +79,6 @@ dloop:
adds r2, r2, #4
b dloop
enddloop:
-#else
- ittt lo
- ldrlo r0, [r1], #4
- strlo r0, [r2], #4
- blo dloop
-#endif
/*
* BSS initialization.
* NOTE: It assumes that the BSS size is a multiple of 4.
@@ -97,17 +88,11 @@ enddloop:
ldr r2, =_bss_end
bloop:
cmp r1, r2
-#if (CORTEX_MODEL == CORTEX_M0) || (CORTEX_MODEL == CORTEX_M1)
bge endbloop
str r0, [r1]
adds r1, r1, #4
b bloop
endbloop:
-#else
- itt lo
- strlo r0, [r1], #4
- blo bloop
-#endif
/*
* Switches to the Process Stack and uses a barrier just to be safe.
*/
diff --git a/os/ports/GCC/ARMCMx/crt0_v7m.s b/os/ports/GCC/ARMCMx/crt0_v7m.s
new file mode 100644
index 000000000..0750c619f
--- /dev/null
+++ b/os/ports/GCC/ARMCMx/crt0_v7m.s
@@ -0,0 +1,142 @@
+/*
+ ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio.
+
+ This file is part of ChibiOS/RT.
+
+ ChibiOS/RT is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS/RT is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see .
+*/
+
+/**
+ * @file ARMCMx/crt0_v7m.s
+ * @brief Generic ARMv7-M (Cortex-M3/M4) startup file for ChibiOS/RT.
+ *
+ * @addtogroup ARMCMx_CORE
+ * @{
+ */
+
+#if !defined(__DOXYGEN__)
+
+.set CONTROL_MODE_PRIVILEGED, 0
+.set CONTROL_MODE_UNPRIVILEGED, 1
+.set CONTROL_USE_MSP, 0
+.set CONTROL_USE_PSP, 2
+
+.text
+.balign 2
+.syntax unified
+.thumb
+
+/*
+ * Reset handler.
+ */
+.thumb_func
+.global ResetHandler
+.weak ResetHandler
+ResetHandler:
+ /*
+ * Interrupts are globally masked initially.
+ */
+ cpsid i
+ /*
+ * Stack pointers initialization.
+ */
+ ldr r0, =__ram_end__
+ ldr r1, =__main_stack_size__
+ subs r0, r0, r1
+ /*
+ * Note that r0 is the main stack low boundary address and process
+ * stack initial top address.
+ */
+ msr PSP, r0
+ /*
+ * Early initialization phase, it is empty by default.
+ */
+ bl hwinit0
+ /*
+ * Data initialization.
+ * NOTE: It assumes that the DATA size is a multiple of 4.
+ */
+ ldr r1, =_textdata
+ ldr r2, =_data
+ ldr r3, =_edata
+dloop:
+ cmp r2, r3
+ ittt lo
+ ldrlo r0, [r1], #4
+ strlo r0, [r2], #4
+ blo dloop
+ /*
+ * BSS initialization.
+ * NOTE: It assumes that the BSS size is a multiple of 4.
+ */
+ movs r0, #0
+ ldr r1, =_bss_start
+ ldr r2, =_bss_end
+bloop:
+ cmp r1, r2
+ itt lo
+ strlo r0, [r1], #4
+ blo bloop
+ /*
+ * Switches to the Process Stack and uses a barrier just to be safe.
+ */
+ movs r0, #CONTROL_MODE_PRIVILEGED | CONTROL_USE_PSP
+ msr CONTROL, r0
+ isb
+ /*
+ * Late initialization phase, it is empty by default.
+ */
+ bl hwinit1
+ movs r0, #0
+ mov r1, r0
+ bl main
+ b MainExitHandler
+
+/*
+ * Default main exit code, just a loop.
+ * It is a weak symbol, the application code can redefine the behavior.
+ */
+.thumb_func
+.global MainExitHandler
+.weak MainExitHandler
+MainExitHandler:
+.loop: b .loop
+
+/*
+ * Default early initialization code. It is declared weak in order to be
+ * replaced by the real initialization code.
+ * Early initialization is performed just after reset before BSS and DATA
+ * segments initialization.
+ */
+.thumb_func
+.global hwinit0
+.weak hwinit0
+hwinit0:
+ bx lr
+
+/*
+ * Default late initialization code. It is declared weak in order to be
+ * replaced by the real initialization code.
+ * Late initialization is performed after BSS and DATA segments initialization
+ * and before invoking the main() function.
+ */
+.thumb_func
+.global hwinit1
+.weak hwinit1
+hwinit1:
+ bx lr
+
+#endif
+
+/** @} */
diff --git a/readme.txt b/readme.txt
index 5e37cb088..6578167f4 100644
--- a/readme.txt
+++ b/readme.txt
@@ -71,11 +71,16 @@
- FIX: DMA not initialized under some conditions (bug 3099701).
- NEW: Added an SPI driver to the STM8 platform support.
- NEW: Added a simple STM8 SPI demo under ./testhal/STM8/SPI.
+- CHANGE: Diviced the file ARMCMx/crt0.s in crt0_v6m.s and crt0_v7m.s in
+ order to remove the preprocessor directives from assembler files.
+- CHANGE: Divided the file STM32/vectors.s in several files, one for each
+ STM32 sub-family. This has been done in order to remove the preprocessor
+ directives from assembler files.
- CHANGE: Renamed the HAL settings macro names, removed the CH_ prefix
because it is reserved for the kernel namespace.
NOTE: ****** Make sure to use a mcuconf.h file taken from ******
****** this version in your project. ******
-
+
*** 2.1.2 ***
- FIX: Fixed typo in memstreams.h (bug 3089567)(backported to 2.0.6).
- FIX: Fixed wrong macro check in LPC214x and AT91SAM7 serial drivers (bug
diff --git a/testhal/STM32/ADC/Makefile b/testhal/STM32/ADC/Makefile
index e430a7678..0eddf28a2 100644
--- a/testhal/STM32/ADC/Makefile
+++ b/testhal/STM32/ADC/Makefile
@@ -102,7 +102,7 @@ TCPPSRC =
# List ASM source files here
ASMSRC = $(PORTASM) \
- $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F10x/vectors.s
+ $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F10x/vectors_md.s
INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \
$(HALINC) $(PLATFORMINC) $(BOARDINC) \
diff --git a/testhal/STM32/CAN/Makefile b/testhal/STM32/CAN/Makefile
index e430a7678..0eddf28a2 100644
--- a/testhal/STM32/CAN/Makefile
+++ b/testhal/STM32/CAN/Makefile
@@ -102,7 +102,7 @@ TCPPSRC =
# List ASM source files here
ASMSRC = $(PORTASM) \
- $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F10x/vectors.s
+ $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F10x/vectors_md.s
INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \
$(HALINC) $(PLATFORMINC) $(BOARDINC) \
diff --git a/testhal/STM32/PWM/Makefile b/testhal/STM32/PWM/Makefile
index e430a7678..0eddf28a2 100644
--- a/testhal/STM32/PWM/Makefile
+++ b/testhal/STM32/PWM/Makefile
@@ -102,7 +102,7 @@ TCPPSRC =
# List ASM source files here
ASMSRC = $(PORTASM) \
- $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F10x/vectors.s
+ $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F10x/vectors_md.s
INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \
$(HALINC) $(PLATFORMINC) $(BOARDINC) \
diff --git a/testhal/STM32/SPI/Makefile b/testhal/STM32/SPI/Makefile
index e430a7678..0eddf28a2 100644
--- a/testhal/STM32/SPI/Makefile
+++ b/testhal/STM32/SPI/Makefile
@@ -102,7 +102,7 @@ TCPPSRC =
# List ASM source files here
ASMSRC = $(PORTASM) \
- $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F10x/vectors.s
+ $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F10x/vectors_md.s
INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \
$(HALINC) $(PLATFORMINC) $(BOARDINC) \
diff --git a/testhal/STM32/UART/Makefile b/testhal/STM32/UART/Makefile
index e430a7678..0eddf28a2 100644
--- a/testhal/STM32/UART/Makefile
+++ b/testhal/STM32/UART/Makefile
@@ -102,7 +102,7 @@ TCPPSRC =
# List ASM source files here
ASMSRC = $(PORTASM) \
- $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F10x/vectors.s
+ $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F10x/vectors_md.s
INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \
$(HALINC) $(PLATFORMINC) $(BOARDINC) \