I2C. Added safety timeouts and resets.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3717 35acf78f-673a-0410-8e92-d51de3d6d3f4
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@ -478,6 +478,7 @@ void i2c_lld_start(I2CDriver *i2cp) {
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i2cp->dmamode = STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE;
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i2cp->dmamode = STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE;
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if (i2cp->state == I2C_STOP) { /* If in stopped state then enables the I2C clock.*/
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if (i2cp->state == I2C_STOP) { /* If in stopped state then enables the I2C clock.*/
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i2c_lld_reset(i2cp);
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#if STM32_I2C_USE_I2C1
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#if STM32_I2C_USE_I2C1
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if (&I2CD1 == i2cp) {
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if (&I2CD1 == i2cp) {
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@ -695,12 +696,18 @@ msg_t i2c_lld_master_transmit_timeout(I2CDriver *i2cp, uint8_t slave_addr,
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dmaStreamSetMode(i2cp->dmatx, ((i2cp->dmamode) | STM32_DMA_CR_DIR_M2P));
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dmaStreamSetMode(i2cp->dmatx, ((i2cp->dmamode) | STM32_DMA_CR_DIR_M2P));
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/* Wait until BUSY flag is reset. */
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/* Wait until BUSY flag is reset. */
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while(i2cp->i2c->SR2 & I2C_SR2_BUSY)
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volatile uint32_t tmo = 1 + (STM32_SYSCLK / 1000000) * 20;
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;
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while((i2cp->i2c->SR2 & I2C_SR2_BUSY) && tmo)
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tmo--;
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if (tmo == 0)
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return RDY_RESET;
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/* wait stop bit from previous transaction*/
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/* wait stop bit from previous transaction*/
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while(i2cp->i2c->CR1 & I2C_CR1_STOP)
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tmo = 1 + (STM32_SYSCLK / 1000000) * 20;
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;
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while((i2cp->i2c->CR1 & I2C_CR1_STOP) && tmo)
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tmo--;
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if (tmo == 0)
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return RDY_RESET;
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i2cp->i2c->CR2 |= I2C_CR2_ITERREN | I2C_CR2_ITEVTEN;
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i2cp->i2c->CR2 |= I2C_CR2_ITERREN | I2C_CR2_ITEVTEN;
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i2cp->i2c->CR1 |= I2C_CR1_START;
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i2cp->i2c->CR1 |= I2C_CR1_START;
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@ -721,6 +728,8 @@ void i2c_lld_stop(I2CDriver *i2cp) {
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if (i2cp->state != I2C_STOP) { /* If in ready state then disables the I2C clock.*/
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if (i2cp->state != I2C_STOP) { /* If in ready state then disables the I2C clock.*/
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i2c_lld_reset(i2cp);
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dmaStreamDisable(i2cp->dmatx);
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dmaStreamDisable(i2cp->dmatx);
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dmaStreamDisable(i2cp->dmarx);
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dmaStreamDisable(i2cp->dmarx);
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dmaStreamClearInterrupt(i2cp->dmatx);
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dmaStreamClearInterrupt(i2cp->dmatx);
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