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git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5372 35acf78f-673a-0410-8e92-d51de3d6d3f4

This commit is contained in:
gdisirio 2013-03-07 09:49:28 +00:00
parent 3b195011ab
commit cc99778cf5
4 changed files with 208 additions and 184 deletions
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28
os/hal/platforms/SPC5xx/FlexPWM_v1/pwm_lld.c
View File

@ -13,8 +13,8 @@
*/ */
/** /**
* @file SPC560Pxx/pwm_lld.c * @file FlexPWM_v1/pwm_lld.c
* @brief SPC560Pxx low level FlexPWM driver code. * @brief SPC5xx low level PWM driver code.
* *
* @addtogroup PWM * @addtogroup PWM
* @{ * @{
@ -78,7 +78,6 @@ PWMDriver PWMD4;
* @notapi * @notapi
*/ */
void pwm_lld_start_submodule(PWMDriver *pwmp, uint8_t sid) { void pwm_lld_start_submodule(PWMDriver *pwmp, uint8_t sid) {
pwmcnt_t pwmperiod; pwmcnt_t pwmperiod;
uint32_t psc; uint32_t psc;
@ -91,14 +90,16 @@ void pwm_lld_start_submodule(PWMDriver *pwmp, uint8_t sid) {
pwmp->flexpwmp->SUB[sid].INTEN.R = 0x0000; pwmp->flexpwmp->SUB[sid].INTEN.R = 0x0000;
/* Setting PWM clock frequency and submodule prescaler.*/ /* Setting PWM clock frequency and submodule prescaler.*/
psc = (SPC5_FLEXPWM0_CLK / pwmp->config->frequency); psc = SPC5_FLEXPWM0_CLK / pwmp->config->frequency;
chDbgAssert((psc <= 0xFFFF) && chDbgAssert((psc <= 0xFFFF) &&
(((psc) * pwmp->config->frequency) == SPC5_FLEXPWM0_CLK) && (((psc) * pwmp->config->frequency) == SPC5_FLEXPWM0_CLK) &&
((psc == 1) || (psc == 2) || (psc == 4) || (psc == 8) || ((psc == 1) || (psc == 2) || (psc == 4) || (psc == 8) ||
(psc == 16) || (psc == 32) || (psc == 16) || (psc == 32) ||
(psc == 64) || (psc == 128)), (psc == 64) || (psc == 128)),
"icu_lld_start(), #1", "invalid frequency"); "icu_lld_start(), #1", "invalid frequency");
switch(psc) {
switch (psc) {
case 1: case 1:
pwmp->flexpwmp->SUB[sid].CTRL.B.PRSC = 0b000; pwmp->flexpwmp->SUB[sid].CTRL.B.PRSC = 0b000;
break; break;
@ -203,7 +204,7 @@ void pwm_lld_start_submodule(PWMDriver *pwmp, uint8_t sid) {
} }
/* Complementary output setup.*/ /* Complementary output setup.*/
/* switch (pwmp->config->channels[0].mode & PWM_COMPLEMENTARY_OUTPUT_MASK) { /* switch (pwmp->config->channels[0].mode & PWM_COMPLEMENTARY_OUTPUT_MASK) {
case PWM_COMPLEMENTARY_OUTPUT_ACTIVE_LOW: case PWM_COMPLEMENTARY_OUTPUT_ACTIVE_LOW:
chDbgAssert(pwmp->config->channels[1].mode == PWM_OUTPUT_ACTIVE_LOW, chDbgAssert(pwmp->config->channels[1].mode == PWM_OUTPUT_ACTIVE_LOW,
"pwm_lld_start(), #1", "pwm_lld_start(), #1",
@ -257,7 +258,7 @@ void pwm_lld_start_submodule(PWMDriver *pwmp, uint8_t sid) {
default: default:
; ;
} }
*/ */
/* Sets the INIT and MASK registers.*/ /* Sets the INIT and MASK registers.*/
pwmp->flexpwmp->SUB[sid].CTRL2.B.FRCEN = 1U; pwmp->flexpwmp->SUB[sid].CTRL2.B.FRCEN = 1U;
@ -282,7 +283,6 @@ void pwm_lld_start_submodule(PWMDriver *pwmp, uint8_t sid) {
void pwm_lld_enable_submodule_channel(PWMDriver *pwmp, void pwm_lld_enable_submodule_channel(PWMDriver *pwmp,
pwmchannel_t channel, pwmchannel_t channel,
pwmcnt_t width, uint8_t sid) { pwmcnt_t width, uint8_t sid) {
pwmcnt_t pwmperiod; pwmcnt_t pwmperiod;
int16_t nwidth; int16_t nwidth;
pwmperiod = pwmp->period; pwmperiod = pwmp->period;
@ -302,7 +302,7 @@ void pwm_lld_enable_submodule_channel(PWMDriver *pwmp,
/* Sets the channel width.*/ /* Sets the channel width.*/
switch (pwmp->config->mode & PWM_OUTPUT_MASK) { switch (pwmp->config->mode & PWM_OUTPUT_MASK) {
case EDGE_ALIGNED_PWM: case EDGE_ALIGNED_PWM:
if(nwidth >= 0) if (nwidth >= 0)
pwmp->flexpwmp->SUB[sid].VAL[3].R = nwidth; pwmp->flexpwmp->SUB[sid].VAL[3].R = nwidth;
else else
pwmp->flexpwmp->SUB[sid].VAL[3].R = ~((pwmperiod / 2) - width) + 1U; pwmp->flexpwmp->SUB[sid].VAL[3].R = ~((pwmperiod / 2) - width) + 1U;
@ -329,7 +329,7 @@ void pwm_lld_enable_submodule_channel(PWMDriver *pwmp,
/* Sets the channel width.*/ /* Sets the channel width.*/
switch (pwmp->config->mode & PWM_OUTPUT_MASK) { switch (pwmp->config->mode & PWM_OUTPUT_MASK) {
case EDGE_ALIGNED_PWM: case EDGE_ALIGNED_PWM:
if(nwidth >= 0) if (nwidth >= 0)
pwmp->flexpwmp->SUB[sid].VAL[5].R = nwidth; pwmp->flexpwmp->SUB[sid].VAL[5].R = nwidth;
else else
pwmp->flexpwmp->SUB[sid].VAL[5].R = ~((pwmperiod / 2) - width) + 1U; pwmp->flexpwmp->SUB[sid].VAL[5].R = ~((pwmperiod / 2) - width) + 1U;
@ -407,7 +407,7 @@ void pwm_lld_disable_submodule_channel(PWMDriver *pwmp,
pwmp->flexpwmp->SUB[sid].CTRL2.B.FORCE = 1U; pwmp->flexpwmp->SUB[sid].CTRL2.B.FORCE = 1U;
/* Disable RIE interrupt to prevent reload interrupt.*/ /* Disable RIE interrupt to prevent reload interrupt.*/
if((pwmp->flexpwmp->MASK.B.MASKA & (0b0000 | (1U << sid))) && if ((pwmp->flexpwmp->MASK.B.MASKA & (0b0000 | (1U << sid))) &&
(pwmp->flexpwmp->MASK.B.MASKB & (0b0000 | (1U << sid))) == 1) { (pwmp->flexpwmp->MASK.B.MASKB & (0b0000 | (1U << sid))) == 1) {
pwmp->flexpwmp->SUB[sid].INTEN.B.RIE = 0; pwmp->flexpwmp->SUB[sid].INTEN.B.RIE = 0;
/* Clear the reload flag.*/ /* Clear the reload flag.*/
@ -428,8 +428,8 @@ void pwm_lld_disable_submodule_channel(PWMDriver *pwmp,
* @param[in] pwmp pointer to a @p PWMDriver object * @param[in] pwmp pointer to a @p PWMDriver object
*/ */
static void pwm_lld_serve_interrupt(PWMDriver *pwmp) { static void pwm_lld_serve_interrupt(PWMDriver *pwmp) {
uint16_t sr; uint16_t sr;
#if SPC5_PWM_USE_SMOD0 #if SPC5_PWM_USE_SMOD0
if (&PWMD1 == pwmp) { if (&PWMD1 == pwmp) {
sr = pwmp->flexpwmp->SUB[0].STS.R & pwmp->flexpwmp->SUB[0].INTEN.R; sr = pwmp->flexpwmp->SUB[0].STS.R & pwmp->flexpwmp->SUB[0].INTEN.R;
@ -740,7 +740,7 @@ void pwm_lld_start(PWMDriver *pwmp) {
#endif #endif
/* Set Peripheral Clock.*/ /* Set Peripheral Clock.*/
if(!(SMOD0 || SMOD1 || SMOD2 || SMOD3)) { if (!(SMOD0 || SMOD1 || SMOD2 || SMOD3)) {
halSPCSetPeripheralClockMode(SPC5_FLEXPWM0_PCTL, halSPCSetPeripheralClockMode(SPC5_FLEXPWM0_PCTL,
SPC5_PWM_FLEXPWM0_START_PCTL); SPC5_PWM_FLEXPWM0_START_PCTL);
} }
@ -1010,7 +1010,6 @@ void pwm_lld_disable_channel(PWMDriver *pwmp, pwmchannel_t channel) {
*/ */
void pwm_lld_change_period(PWMDriver *pwmp, pwmcnt_t period) { void pwm_lld_change_period(PWMDriver *pwmp, pwmcnt_t period) {
(void)period;
pwmcnt_t pwmperiod; pwmcnt_t pwmperiod;
pwmperiod = period; pwmperiod = period;
#if SPC5_PWM_USE_SMOD0 #if SPC5_PWM_USE_SMOD0
@ -1090,7 +1089,6 @@ void pwm_lld_change_period(PWMDriver *pwmp, pwmcnt_t period) {
switch (pwmp->config->mode & PWM_OUTPUT_MASK) { switch (pwmp->config->mode & PWM_OUTPUT_MASK) {
case EDGE_ALIGNED_PWM: case EDGE_ALIGNED_PWM:
/* Setting active front of PWM channels.*/ /* Setting active front of PWM channels.*/
pwmp->flexpwmp->SUB[3].VAL[2].R = ~(pwmperiod / 2) + 1U; pwmp->flexpwmp->SUB[3].VAL[2].R = ~(pwmperiod / 2) + 1U;
pwmp->flexpwmp->SUB[3].VAL[4].R = ~(pwmperiod / 2) + 1U; pwmp->flexpwmp->SUB[3].VAL[4].R = ~(pwmperiod / 2) + 1U;

4
os/hal/platforms/SPC5xx/FlexPWM_v1/pwm_lld.h
View File

@ -13,8 +13,8 @@
*/ */
/** /**
* @file SPC560Pxx/pwm_lld.h * @file FlexPWM_v1/pwm_lld.h
* @brief SPC560Pxx low level FlexPWM driver header. * @brief SPC5xx low level PWM driver header.
* *
* @addtogroup PWM * @addtogroup PWM
* @{ * @{

46
os/hal/platforms/SPC5xx/eTimer_v1/icu_lld.c
View File

@ -13,8 +13,8 @@
*/ */
/** /**
* @file * @file eTimer_v1/icu_lld.c
* @brief SPC5xx low level icu driver header. * @brief SPC5xx low level ICU driver header.
* *
* @addtogroup ICU * @addtogroup ICU
* @{ * @{
@ -144,11 +144,14 @@ ICUDriver ICUD12;
* @param[in] index ICU channel index * @param[in] index ICU channel index
*/ */
static void spc5_icu_channel_enable(ICUDriver *icup, uint8_t index) { static void spc5_icu_channel_enable(ICUDriver *icup, uint8_t index) {
/* Clear pending IRQs (if any).*/ /* Clear pending IRQs (if any).*/
icup->etimerp->CHANNEL[index].STS.R = 0xFFFF; icup->etimerp->CHANNEL[index].STS.R = 0xFFFF;
/* Set Capture 1 and Capture 2 Mode.*/ /* Set Capture 1 and Capture 2 Mode.*/
icup->etimerp->CHANNEL[index].CCCTRL.B.CPT1MODE = 0b10; icup->etimerp->CHANNEL[index].CCCTRL.B.CPT1MODE = 0b10;
icup->etimerp->CHANNEL[index].CCCTRL.B.CPT2MODE = 0b01; icup->etimerp->CHANNEL[index].CCCTRL.B.CPT2MODE = 0b01;
/* Active interrupts.*/ /* Active interrupts.*/
if (icup->config->period_cb != NULL || icup->config->width_cb != NULL) { if (icup->config->period_cb != NULL || icup->config->width_cb != NULL) {
icup->etimerp->CHANNEL[index].INTDMA.B.ICF1IE = 1U; icup->etimerp->CHANNEL[index].INTDMA.B.ICF1IE = 1U;
@ -157,8 +160,10 @@ static void spc5_icu_channel_enable(ICUDriver *icup, uint8_t index) {
if (icup->config->overflow_cb != NULL) { if (icup->config->overflow_cb != NULL) {
icup->etimerp->CHANNEL[index].INTDMA.B.TOFIE = 1U; icup->etimerp->CHANNEL[index].INTDMA.B.TOFIE = 1U;
} }
/* Set Capture FIFO Water Mark.*/ /* Set Capture FIFO Water Mark.*/
icup->etimerp->CHANNEL[index].CCCTRL.B.CFWM = 0b00; icup->etimerp->CHANNEL[index].CCCTRL.B.CFWM = 0b00;
/* Enable Counter.*/ /* Enable Counter.*/
if (ICU_SKIP_FIRST_CAPTURE) { if (ICU_SKIP_FIRST_CAPTURE) {
icup->etimerp->CHANNEL[index].CTRL.B.CNTMODE = 0b011; icup->etimerp->CHANNEL[index].CTRL.B.CNTMODE = 0b011;
@ -166,6 +171,7 @@ static void spc5_icu_channel_enable(ICUDriver *icup, uint8_t index) {
else { else {
icup->etimerp->CHANNEL[index].CTRL.B.CNTMODE = 0b001; icup->etimerp->CHANNEL[index].CTRL.B.CNTMODE = 0b001;
} }
/* Enable Capture process.*/ /* Enable Capture process.*/
icup->etimerp->CHANNEL[index].CCCTRL.B.ARM = 1U; icup->etimerp->CHANNEL[index].CCCTRL.B.ARM = 1U;
} }
@ -177,13 +183,17 @@ static void spc5_icu_channel_enable(ICUDriver *icup, uint8_t index) {
* @param[in] index ICU channel index * @param[in] index ICU channel index
*/ */
static void spc5_icu_channel_disable(ICUDriver *icup, uint8_t index) { static void spc5_icu_channel_disable(ICUDriver *icup, uint8_t index) {
/* Disable Capture process.*/ /* Disable Capture process.*/
icup->etimerp->CHANNEL[index].CCCTRL.B.ARM = 0; icup->etimerp->CHANNEL[index].CCCTRL.B.ARM = 0;
/* Clear pending IRQs (if any).*/ /* Clear pending IRQs (if any).*/
icup->etimerp->CHANNEL[index].STS.R = 0xFFFF; icup->etimerp->CHANNEL[index].STS.R = 0xFFFF;
/* Set Capture 1 and Capture 2 Mode to Disabled.*/ /* Set Capture 1 and Capture 2 Mode to Disabled.*/
icup->etimerp->CHANNEL[index].CCCTRL.B.CPT1MODE = 0b00; icup->etimerp->CHANNEL[index].CCCTRL.B.CPT1MODE = 0b00;
icup->etimerp->CHANNEL[index].CCCTRL.B.CPT2MODE = 0b00; icup->etimerp->CHANNEL[index].CCCTRL.B.CPT2MODE = 0b00;
/* Disable interrupts.*/ /* Disable interrupts.*/
if (icup->config->period_cb != NULL || icup->config->width_cb != NULL) { if (icup->config->period_cb != NULL || icup->config->width_cb != NULL) {
icup->etimerp->CHANNEL[index].INTDMA.B.ICF1IE = 0; icup->etimerp->CHANNEL[index].INTDMA.B.ICF1IE = 0;
@ -200,20 +210,28 @@ static void spc5_icu_channel_disable(ICUDriver *icup, uint8_t index) {
* @param[in] index ICU channel index * @param[in] index ICU channel index
*/ */
static void spc5_icu_channel_start(ICUDriver *icup, uint8_t index) { static void spc5_icu_channel_start(ICUDriver *icup, uint8_t index) {
/* Timer disabled.*/ /* Timer disabled.*/
icup->etimerp->CHANNEL[index].CTRL.B.CNTMODE = 0b000; icup->etimerp->CHANNEL[index].CTRL.B.CNTMODE = 0b000;
/* Clear pending IRQs (if any).*/ /* Clear pending IRQs (if any).*/
icup->etimerp->CHANNEL[index].STS.R = 0xFFFF; icup->etimerp->CHANNEL[index].STS.R = 0xFFFF;
/* All IRQs and DMA requests disabled.*/ /* All IRQs and DMA requests disabled.*/
icup->etimerp->CHANNEL[index].INTDMA.R = 0x0000; icup->etimerp->CHANNEL[index].INTDMA.R = 0x0000;
/* Compare Load 1 disabled.*/ /* Compare Load 1 disabled.*/
icup->etimerp->CHANNEL[index].CCCTRL.B.CLC1 = 0b000; icup->etimerp->CHANNEL[index].CCCTRL.B.CLC1 = 0b000;
/* Compare Load 2 disabled.*/ /* Compare Load 2 disabled.*/
icup->etimerp->CHANNEL[index].CCCTRL.B.CLC2 = 0b000; icup->etimerp->CHANNEL[index].CCCTRL.B.CLC2 = 0b000;
/* Capture 1 disabled.*/ /* Capture 1 disabled.*/
icup->etimerp->CHANNEL[index].CCCTRL.B.CPT1MODE = 0b00; icup->etimerp->CHANNEL[index].CCCTRL.B.CPT1MODE = 0b00;
/* Capture 2 disabled.*/ /* Capture 2 disabled.*/
icup->etimerp->CHANNEL[index].CCCTRL.B.CPT2MODE = 0b00; icup->etimerp->CHANNEL[index].CCCTRL.B.CPT2MODE = 0b00;
/* Counter reset to zero.*/ /* Counter reset to zero.*/
icup->etimerp->CHANNEL[index].CNTR.R = 0x0000; icup->etimerp->CHANNEL[index].CNTR.R = 0x0000;
} }
@ -225,14 +243,16 @@ static void spc5_icu_channel_start(ICUDriver *icup, uint8_t index) {
* @param[in] index ICU channel index * @param[in] index ICU channel index
*/ */
static void spc5_icu_channel_init(ICUDriver *icup, uint8_t index) { static void spc5_icu_channel_init(ICUDriver *icup, uint8_t index) {
#if !defined(psc) #if !defined(psc)
uint32_t psc; uint32_t psc;
#endif #endif
psc = (icup->clock / icup->config->frequency); psc = (icup->clock / icup->config->frequency);
chDbgAssert( chDbgAssert((psc <= 0xFFFF) &&
(psc <= 0xFFFF) && (((psc) * icup->config->frequency) == icup->clock) && (((psc) * icup->config->frequency) == icup->clock) &&
((psc == 1) || (psc == 2) || (psc == 4) || (psc == 8) || (psc == 16) || ((psc == 1) || (psc == 2) || (psc == 4) ||
(psc == 32) || (psc == 64) || (psc == 128)), (psc == 8) || (psc == 16) || (psc == 32) ||
(psc == 64) || (psc == 128)),
"icu_lld_start(), #1", "invalid frequency"); "icu_lld_start(), #1", "invalid frequency");
/* Set primary source and clock prescaler.*/ /* Set primary source and clock prescaler.*/
@ -262,6 +282,7 @@ static void spc5_icu_channel_init(ICUDriver *icup, uint8_t index) {
icup->etimerp->CHANNEL[index].CTRL.B.PRISRC = 0b11111; icup->etimerp->CHANNEL[index].CTRL.B.PRISRC = 0b11111;
break; break;
} }
/* Set control registers.*/ /* Set control registers.*/
icup->etimerp->CHANNEL[index].CTRL.B.ONCE = 0; icup->etimerp->CHANNEL[index].CTRL.B.ONCE = 0;
icup->etimerp->CHANNEL[index].CTRL.B.LENGTH = 0; icup->etimerp->CHANNEL[index].CTRL.B.LENGTH = 0;
@ -314,6 +335,7 @@ static void spc5_icu_channel_init(ICUDriver *icup, uint8_t index) {
* @param[in] index ICU channel index * @param[in] index ICU channel index
*/ */
static void icu_lld_interrupt_management(ICUDriver *icup, uint8_t index) { static void icu_lld_interrupt_management(ICUDriver *icup, uint8_t index) {
#if !defined(sr) #if !defined(sr)
uint16_t sr; uint16_t sr;
#endif #endif
@ -345,7 +367,7 @@ static void icu_lld_interrupt_management(ICUDriver *icup, uint8_t index) {
_icu_isr_invoke_width_cb(icup); _icu_isr_invoke_width_cb(icup);
} }
} }
} else { /* End ICU_SKIP_FIRST_CAPTURE = TRUE*/ } else { /* ICU_SKIP_FIRST_CAPTURE = TRUE*/
if ((sr & 0x0008) != 0) { /* TOF */ if ((sr & 0x0008) != 0) { /* TOF */
icup->etimerp->CHANNEL[index].STS.B.TOF = 1U; icup->etimerp->CHANNEL[index].STS.B.TOF = 1U;
_icu_isr_invoke_overflow_cb(icup); _icu_isr_invoke_overflow_cb(icup);
@ -359,7 +381,7 @@ static void icu_lld_interrupt_management(ICUDriver *icup, uint8_t index) {
icup->etimerp->CHANNEL[index].STS.B.ICF2 = 1U; icup->etimerp->CHANNEL[index].STS.B.ICF2 = 1U;
_icu_isr_invoke_width_cb(icup); _icu_isr_invoke_width_cb(icup);
} }
} /* End ICU_SKIP_FIRST_CAPTURE = FALSE*/ } /* ICU_SKIP_FIRST_CAPTURE = FALSE */
} }
/** /**
@ -927,8 +949,8 @@ void icu_lld_init(void) {
* @notapi * @notapi
*/ */
void icu_lld_start(ICUDriver *icup) { void icu_lld_start(ICUDriver *icup) {
chDbgAssert(
(icup->config->channel == ICU_CHANNEL_1) || chDbgAssert((icup->config->channel == ICU_CHANNEL_1) ||
(icup->config->channel == ICU_CHANNEL_2) || (icup->config->channel == ICU_CHANNEL_2) ||
(icup->config->channel == ICU_CHANNEL_3) || (icup->config->channel == ICU_CHANNEL_3) ||
(icup->config->channel == ICU_CHANNEL_4) || (icup->config->channel == ICU_CHANNEL_4) ||
@ -1239,6 +1261,7 @@ void icu_lld_stop(ICUDriver *icup) {
* @notapi * @notapi
*/ */
void icu_lld_enable(ICUDriver *icup) { void icu_lld_enable(ICUDriver *icup) {
#if SPC5_ICU_USE_SMOD0 #if SPC5_ICU_USE_SMOD0
if (&ICUD1 == icup) { if (&ICUD1 == icup) {
spc5_icu_channel_enable(icup, 0); spc5_icu_channel_enable(icup, 0);
@ -1320,6 +1343,7 @@ void icu_lld_enable(ICUDriver *icup) {
* @notapi * @notapi
*/ */
void icu_lld_disable(ICUDriver *icup) { void icu_lld_disable(ICUDriver *icup) {
#if SPC5_ICU_USE_SMOD0 #if SPC5_ICU_USE_SMOD0
if (&ICUD1 == icup) { if (&ICUD1 == icup) {
spc5_icu_channel_disable(icup, 0); spc5_icu_channel_disable(icup, 0);
@ -1404,6 +1428,7 @@ void icu_lld_disable(ICUDriver *icup) {
* @notapi * @notapi
*/ */
icucnt_t icu_lld_get_width(ICUDriver *icup) { icucnt_t icu_lld_get_width(ICUDriver *icup) {
return (icucnt_t)*icup->wccrp + 1; return (icucnt_t)*icup->wccrp + 1;
} }
@ -1418,6 +1443,7 @@ icucnt_t icu_lld_get_width(ICUDriver *icup) {
* @notapi * @notapi
*/ */
icucnt_t icu_lld_get_period(ICUDriver *icup) { icucnt_t icu_lld_get_period(ICUDriver *icup) {
return (icucnt_t)*icup->pccrp + 1; return (icucnt_t)*icup->pccrp + 1;
} }

4
os/hal/platforms/SPC5xx/eTimer_v1/icu_lld.h
View File

@ -13,8 +13,8 @@
*/ */
/** /**
* @file * @file eTimer_v1/icu_lld.c
* @brief SPC5xx low level icu driver header. * @brief SPC5xx low level ICU driver header.
* *
* @addtogroup ICU * @addtogroup ICU
* @{ * @{