git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5372 35acf78f-673a-0410-8e92-d51de3d6d3f4
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@ -13,8 +13,8 @@
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*/
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/**
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* @file SPC560Pxx/pwm_lld.c
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* @brief SPC560Pxx low level FlexPWM driver code.
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* @file FlexPWM_v1/pwm_lld.c
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* @brief SPC5xx low level PWM driver code.
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*
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* @addtogroup PWM
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* @{
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@ -78,7 +78,6 @@ PWMDriver PWMD4;
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* @notapi
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*/
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void pwm_lld_start_submodule(PWMDriver *pwmp, uint8_t sid) {
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pwmcnt_t pwmperiod;
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uint32_t psc;
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@ -91,13 +90,15 @@ void pwm_lld_start_submodule(PWMDriver *pwmp, uint8_t sid) {
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pwmp->flexpwmp->SUB[sid].INTEN.R = 0x0000;
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/* Setting PWM clock frequency and submodule prescaler.*/
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psc = (SPC5_FLEXPWM0_CLK / pwmp->config->frequency);
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psc = SPC5_FLEXPWM0_CLK / pwmp->config->frequency;
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chDbgAssert((psc <= 0xFFFF) &&
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(((psc) * pwmp->config->frequency) == SPC5_FLEXPWM0_CLK) &&
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((psc == 1) || (psc == 2) || (psc == 4) || (psc == 8) ||
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(psc == 16) || (psc == 32) ||
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(psc == 64) || (psc == 128)),
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"icu_lld_start(), #1", "invalid frequency");
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switch (psc) {
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case 1:
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pwmp->flexpwmp->SUB[sid].CTRL.B.PRSC = 0b000;
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@ -282,7 +283,6 @@ void pwm_lld_start_submodule(PWMDriver *pwmp, uint8_t sid) {
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void pwm_lld_enable_submodule_channel(PWMDriver *pwmp,
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pwmchannel_t channel,
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pwmcnt_t width, uint8_t sid) {
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pwmcnt_t pwmperiod;
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int16_t nwidth;
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pwmperiod = pwmp->period;
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@ -428,8 +428,8 @@ void pwm_lld_disable_submodule_channel(PWMDriver *pwmp,
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* @param[in] pwmp pointer to a @p PWMDriver object
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*/
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static void pwm_lld_serve_interrupt(PWMDriver *pwmp) {
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uint16_t sr;
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#if SPC5_PWM_USE_SMOD0
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if (&PWMD1 == pwmp) {
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sr = pwmp->flexpwmp->SUB[0].STS.R & pwmp->flexpwmp->SUB[0].INTEN.R;
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@ -1010,7 +1010,6 @@ void pwm_lld_disable_channel(PWMDriver *pwmp, pwmchannel_t channel) {
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*/
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void pwm_lld_change_period(PWMDriver *pwmp, pwmcnt_t period) {
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(void)period;
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pwmcnt_t pwmperiod;
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pwmperiod = period;
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#if SPC5_PWM_USE_SMOD0
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@ -1090,7 +1089,6 @@ void pwm_lld_change_period(PWMDriver *pwmp, pwmcnt_t period) {
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switch (pwmp->config->mode & PWM_OUTPUT_MASK) {
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case EDGE_ALIGNED_PWM:
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/* Setting active front of PWM channels.*/
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pwmp->flexpwmp->SUB[3].VAL[2].R = ~(pwmperiod / 2) + 1U;
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pwmp->flexpwmp->SUB[3].VAL[4].R = ~(pwmperiod / 2) + 1U;
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@ -13,8 +13,8 @@
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*/
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/**
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* @file SPC560Pxx/pwm_lld.h
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* @brief SPC560Pxx low level FlexPWM driver header.
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* @file FlexPWM_v1/pwm_lld.h
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* @brief SPC5xx low level PWM driver header.
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*
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* @addtogroup PWM
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* @{
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@ -13,8 +13,8 @@
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*/
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/**
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* @file
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* @brief SPC5xx low level icu driver header.
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* @file eTimer_v1/icu_lld.c
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* @brief SPC5xx low level ICU driver header.
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*
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* @addtogroup ICU
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* @{
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@ -144,11 +144,14 @@ ICUDriver ICUD12;
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* @param[in] index ICU channel index
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*/
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static void spc5_icu_channel_enable(ICUDriver *icup, uint8_t index) {
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/* Clear pending IRQs (if any).*/
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icup->etimerp->CHANNEL[index].STS.R = 0xFFFF;
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/* Set Capture 1 and Capture 2 Mode.*/
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icup->etimerp->CHANNEL[index].CCCTRL.B.CPT1MODE = 0b10;
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icup->etimerp->CHANNEL[index].CCCTRL.B.CPT2MODE = 0b01;
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/* Active interrupts.*/
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if (icup->config->period_cb != NULL || icup->config->width_cb != NULL) {
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icup->etimerp->CHANNEL[index].INTDMA.B.ICF1IE = 1U;
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@ -157,8 +160,10 @@ static void spc5_icu_channel_enable(ICUDriver *icup, uint8_t index) {
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if (icup->config->overflow_cb != NULL) {
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icup->etimerp->CHANNEL[index].INTDMA.B.TOFIE = 1U;
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}
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/* Set Capture FIFO Water Mark.*/
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icup->etimerp->CHANNEL[index].CCCTRL.B.CFWM = 0b00;
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/* Enable Counter.*/
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if (ICU_SKIP_FIRST_CAPTURE) {
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icup->etimerp->CHANNEL[index].CTRL.B.CNTMODE = 0b011;
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@ -166,6 +171,7 @@ static void spc5_icu_channel_enable(ICUDriver *icup, uint8_t index) {
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else {
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icup->etimerp->CHANNEL[index].CTRL.B.CNTMODE = 0b001;
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}
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/* Enable Capture process.*/
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icup->etimerp->CHANNEL[index].CCCTRL.B.ARM = 1U;
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}
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@ -177,13 +183,17 @@ static void spc5_icu_channel_enable(ICUDriver *icup, uint8_t index) {
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* @param[in] index ICU channel index
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*/
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static void spc5_icu_channel_disable(ICUDriver *icup, uint8_t index) {
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/* Disable Capture process.*/
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icup->etimerp->CHANNEL[index].CCCTRL.B.ARM = 0;
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/* Clear pending IRQs (if any).*/
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icup->etimerp->CHANNEL[index].STS.R = 0xFFFF;
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/* Set Capture 1 and Capture 2 Mode to Disabled.*/
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icup->etimerp->CHANNEL[index].CCCTRL.B.CPT1MODE = 0b00;
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icup->etimerp->CHANNEL[index].CCCTRL.B.CPT2MODE = 0b00;
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/* Disable interrupts.*/
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if (icup->config->period_cb != NULL || icup->config->width_cb != NULL) {
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icup->etimerp->CHANNEL[index].INTDMA.B.ICF1IE = 0;
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@ -200,20 +210,28 @@ static void spc5_icu_channel_disable(ICUDriver *icup, uint8_t index) {
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* @param[in] index ICU channel index
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*/
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static void spc5_icu_channel_start(ICUDriver *icup, uint8_t index) {
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/* Timer disabled.*/
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icup->etimerp->CHANNEL[index].CTRL.B.CNTMODE = 0b000;
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/* Clear pending IRQs (if any).*/
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icup->etimerp->CHANNEL[index].STS.R = 0xFFFF;
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/* All IRQs and DMA requests disabled.*/
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icup->etimerp->CHANNEL[index].INTDMA.R = 0x0000;
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/* Compare Load 1 disabled.*/
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icup->etimerp->CHANNEL[index].CCCTRL.B.CLC1 = 0b000;
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/* Compare Load 2 disabled.*/
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icup->etimerp->CHANNEL[index].CCCTRL.B.CLC2 = 0b000;
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/* Capture 1 disabled.*/
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icup->etimerp->CHANNEL[index].CCCTRL.B.CPT1MODE = 0b00;
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/* Capture 2 disabled.*/
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icup->etimerp->CHANNEL[index].CCCTRL.B.CPT2MODE = 0b00;
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/* Counter reset to zero.*/
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icup->etimerp->CHANNEL[index].CNTR.R = 0x0000;
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}
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@ -225,14 +243,16 @@ static void spc5_icu_channel_start(ICUDriver *icup, uint8_t index) {
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* @param[in] index ICU channel index
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*/
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static void spc5_icu_channel_init(ICUDriver *icup, uint8_t index) {
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#if !defined(psc)
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uint32_t psc;
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#endif
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psc = (icup->clock / icup->config->frequency);
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chDbgAssert(
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(psc <= 0xFFFF) && (((psc) * icup->config->frequency) == icup->clock) &&
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((psc == 1) || (psc == 2) || (psc == 4) || (psc == 8) || (psc == 16) ||
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(psc == 32) || (psc == 64) || (psc == 128)),
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chDbgAssert((psc <= 0xFFFF) &&
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(((psc) * icup->config->frequency) == icup->clock) &&
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((psc == 1) || (psc == 2) || (psc == 4) ||
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(psc == 8) || (psc == 16) || (psc == 32) ||
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(psc == 64) || (psc == 128)),
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"icu_lld_start(), #1", "invalid frequency");
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/* Set primary source and clock prescaler.*/
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icup->etimerp->CHANNEL[index].CTRL.B.PRISRC = 0b11111;
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break;
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}
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/* Set control registers.*/
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icup->etimerp->CHANNEL[index].CTRL.B.ONCE = 0;
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icup->etimerp->CHANNEL[index].CTRL.B.LENGTH = 0;
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* @param[in] index ICU channel index
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*/
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static void icu_lld_interrupt_management(ICUDriver *icup, uint8_t index) {
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#if !defined(sr)
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uint16_t sr;
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#endif
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@ -345,7 +367,7 @@ static void icu_lld_interrupt_management(ICUDriver *icup, uint8_t index) {
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_icu_isr_invoke_width_cb(icup);
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}
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}
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} else { /* End ICU_SKIP_FIRST_CAPTURE = TRUE*/
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} else { /* ICU_SKIP_FIRST_CAPTURE = TRUE*/
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if ((sr & 0x0008) != 0) { /* TOF */
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icup->etimerp->CHANNEL[index].STS.B.TOF = 1U;
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_icu_isr_invoke_overflow_cb(icup);
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icup->etimerp->CHANNEL[index].STS.B.ICF2 = 1U;
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_icu_isr_invoke_width_cb(icup);
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}
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} /* End ICU_SKIP_FIRST_CAPTURE = FALSE*/
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} /* ICU_SKIP_FIRST_CAPTURE = FALSE */
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}
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/**
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@ -927,8 +949,8 @@ void icu_lld_init(void) {
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* @notapi
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*/
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void icu_lld_start(ICUDriver *icup) {
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chDbgAssert(
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(icup->config->channel == ICU_CHANNEL_1) ||
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chDbgAssert((icup->config->channel == ICU_CHANNEL_1) ||
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(icup->config->channel == ICU_CHANNEL_2) ||
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(icup->config->channel == ICU_CHANNEL_3) ||
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(icup->config->channel == ICU_CHANNEL_4) ||
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* @notapi
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*/
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void icu_lld_enable(ICUDriver *icup) {
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#if SPC5_ICU_USE_SMOD0
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if (&ICUD1 == icup) {
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spc5_icu_channel_enable(icup, 0);
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* @notapi
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*/
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void icu_lld_disable(ICUDriver *icup) {
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#if SPC5_ICU_USE_SMOD0
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if (&ICUD1 == icup) {
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spc5_icu_channel_disable(icup, 0);
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* @notapi
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*/
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icucnt_t icu_lld_get_width(ICUDriver *icup) {
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return (icucnt_t)*icup->wccrp + 1;
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}
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@ -1418,6 +1443,7 @@ icucnt_t icu_lld_get_width(ICUDriver *icup) {
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* @notapi
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*/
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icucnt_t icu_lld_get_period(ICUDriver *icup) {
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return (icucnt_t)*icup->pccrp + 1;
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}
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*/
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/**
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* @file
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* @brief SPC5xx low level icu driver header.
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* @file eTimer_v1/icu_lld.c
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* @brief SPC5xx low level ICU driver header.
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*
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* @addtogroup ICU
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* @{
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