git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/kernel_3_dev@6728 35acf78f-673a-0410-8e92-d51de3d6d3f4
This commit is contained in:
gdisirio
parent
b0610b61ec
commit
ce46beee69
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@ -0,0 +1,31 @@
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/*
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ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
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||||
2011,2012,2013 Giovanni Di Sirio.
|
||||
|
||||
This file is part of ChibiOS/RT.
|
||||
|
||||
ChibiOS/RT is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation; either version 3 of the License, or
|
||||
(at your option) any later version.
|
||||
|
||||
ChibiOS/RT is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*/
|
||||
|
||||
/*
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||||
* SPC560P50 memory setup.
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||||
*/
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||||
MEMORY
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{
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flash : org = 0x00000000, len = 512k
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dataflash : org = 0x00800000, len = 64k
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ram : org = 0x40000000, len = 40k
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||||
}
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||||
|
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INCLUDE rules_z0.ld
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|
@ -0,0 +1,163 @@
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/*
|
||||
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
|
||||
2011,2012,2013 Giovanni Di Sirio.
|
||||
|
||||
This file is part of ChibiOS/RT.
|
||||
|
||||
ChibiOS/RT is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation; either version 3 of the License, or
|
||||
(at your option) any later version.
|
||||
|
||||
ChibiOS/RT is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*/
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||||
|
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__ram_size__ = LENGTH(ram);
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__ram_start__ = ORIGIN(ram);
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__ram_end__ = ORIGIN(ram) + LENGTH(ram);
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ENTRY(_reset_address)
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|
||||
SECTIONS
|
||||
{
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||||
. = ORIGIN(flash);
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.boot0 : ALIGN(16) SUBALIGN(16)
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||||
{
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KEEP(*(.boot))
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} > flash
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||||
|
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.boot1 : ALIGN(16) SUBALIGN(16)
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||||
{
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KEEP(*(.handlers))
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KEEP(*(.crt0))
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/* The vectors table requires a 2kB alignment.*/
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. = ALIGN(0x800);
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KEEP(*(.vectors))
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/* The IVPR register requires a 4kB alignment.*/
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. = ALIGN(0x1000);
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__ivpr_base__ = .;
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KEEP(*(.ivors))
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} > flash
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|
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constructors : ALIGN(4) SUBALIGN(4)
|
||||
{
|
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PROVIDE(__init_array_start = .);
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KEEP(*(SORT(.init_array.*)))
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KEEP(*(.init_array))
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PROVIDE(__init_array_end = .);
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} > flash
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|
||||
destructors : ALIGN(4) SUBALIGN(4)
|
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{
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||||
PROVIDE(__fini_array_start = .);
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KEEP(*(.fini_array))
|
||||
KEEP(*(SORT(.fini_array.*)))
|
||||
PROVIDE(__fini_array_end = .);
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||||
} > flash
|
||||
|
||||
.text_vle : ALIGN(16) SUBALIGN(16)
|
||||
{
|
||||
*(.text_vle)
|
||||
*(.text_vle.*)
|
||||
*(.gnu.linkonce.t_vle.*)
|
||||
} > flash
|
||||
|
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.text : ALIGN(16) SUBALIGN(16)
|
||||
{
|
||||
*(.text)
|
||||
*(.text.*)
|
||||
*(.gnu.linkonce.t.*)
|
||||
} > flash
|
||||
|
||||
.rodata : ALIGN(16) SUBALIGN(16)
|
||||
{
|
||||
*(.glue_7t)
|
||||
*(.glue_7)
|
||||
*(.gcc*)
|
||||
*(.rodata)
|
||||
*(.rodata.*)
|
||||
*(.rodata1)
|
||||
} > flash
|
||||
|
||||
.sdata2 : ALIGN(16) SUBALIGN(16)
|
||||
{
|
||||
__sdata2_start__ = . + 0x8000;
|
||||
*(.sdata2)
|
||||
*(.sdata2.*)
|
||||
*(.gnu.linkonce.s2.*)
|
||||
*(.sbss2)
|
||||
*(.sbss2.*)
|
||||
*(.gnu.linkonce.sb2.*)
|
||||
} > flash
|
||||
|
||||
.eh_frame_hdr :
|
||||
{
|
||||
*(.eh_frame_hdr)
|
||||
} > flash
|
||||
|
||||
.eh_frame : ONLY_IF_RO
|
||||
{
|
||||
*(.eh_frame)
|
||||
} > flash
|
||||
|
||||
.romdata : ALIGN(16) SUBALIGN(16)
|
||||
{
|
||||
__romdata_start__ = .;
|
||||
} > flash
|
||||
|
||||
.stacks : ALIGN(16) SUBALIGN(16)
|
||||
{
|
||||
. = ALIGN(8);
|
||||
__irq_stack_base__ = .;
|
||||
. += __irq_stack_size__;
|
||||
. = ALIGN(8);
|
||||
__irq_stack_end__ = .;
|
||||
__process_stack_base__ = .;
|
||||
__main_thread_stack_base__ = .;
|
||||
. += __process_stack_size__;
|
||||
. = ALIGN(8);
|
||||
__process_stack_end__ = .;
|
||||
__main_thread_stack_end__ = .;
|
||||
} > ram
|
||||
|
||||
.data : AT(__romdata_start__)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
__data_start__ = .;
|
||||
*(.data)
|
||||
*(.data.*)
|
||||
*(.gnu.linkonce.d.*)
|
||||
__sdata_start__ = . + 0x8000;
|
||||
*(.sdata)
|
||||
*(.sdata.*)
|
||||
*(.gnu.linkonce.s.*)
|
||||
__data_end__ = .;
|
||||
} > ram
|
||||
|
||||
.sbss :
|
||||
{
|
||||
__bss_start__ = .;
|
||||
*(.sbss)
|
||||
*(.sbss.*)
|
||||
*(.gnu.linkonce.sb.*)
|
||||
*(.scommon)
|
||||
} > ram
|
||||
|
||||
.bss :
|
||||
{
|
||||
*(.bss)
|
||||
*(.bss.*)
|
||||
*(.gnu.linkonce.b.*)
|
||||
*(COMMON)
|
||||
__bss_end__ = .;
|
||||
} > ram
|
||||
|
||||
__heap_base__ = __bss_end__;
|
||||
__heap_end__ = __ram_end__;
|
||||
}
|
||||
|
|
@ -37,6 +37,7 @@ SECTIONS
|
|||
{
|
||||
KEEP(*(.handlers))
|
||||
KEEP(*(.crt0))
|
||||
/* The vectors table requires a 2kB alignment.*/
|
||||
. = ALIGN(0x800);
|
||||
KEEP(*(.vectors))
|
||||
} > flash
|
||||
|
|
|
|||
|
|
@ -0,0 +1,118 @@
|
|||
/*
|
||||
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
|
||||
2011,2012,2013 Giovanni Di Sirio.
|
||||
|
||||
This file is part of ChibiOS/RT.
|
||||
|
||||
ChibiOS/RT is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation; either version 3 of the License, or
|
||||
(at your option) any later version.
|
||||
|
||||
ChibiOS/RT is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file boot.h
|
||||
* @brief Boot parameters for the SPC560Pxx.
|
||||
* @{
|
||||
*/
|
||||
|
||||
#ifndef _BOOT_H_
|
||||
#define _BOOT_H_
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Module constants. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @name BUCSR registers definitions
|
||||
* @{
|
||||
*/
|
||||
#define BUCSR_BPEN 0x00000001
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#define BUCSR_BALLOC_BFI 0x00000200
|
||||
/** @} */
|
||||
|
||||
/**
|
||||
* @name MSR register definitions
|
||||
* @{
|
||||
*/
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||||
#define MSR_WE 0x00040000
|
||||
#define MSR_CE 0x00020000
|
||||
#define MSR_EE 0x00008000
|
||||
#define MSR_PR 0x00004000
|
||||
#define MSR_ME 0x00001000
|
||||
#define MSR_DE 0x00000200
|
||||
#define MSR_IS 0x00000020
|
||||
#define MSR_DS 0x00000010
|
||||
#define MSR_RI 0x00000002
|
||||
/** @} */
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Module pre-compile time settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*
|
||||
* BUCSR default settings.
|
||||
*/
|
||||
#if !defined(BOOT_BUCSR_DEFAULT) || defined(__DOXYGEN__)
|
||||
#define BOOT_BUCSR_DEFAULT (BUCSR_BPEN | BUCSR_BALLOC_BFI)
|
||||
#endif
|
||||
|
||||
/*
|
||||
* MSR default settings.
|
||||
*/
|
||||
#if !defined(BOOT_MSR_DEFAULT) || defined(__DOXYGEN__)
|
||||
#define BOOT_MSR_DEFAULT (MSR_WE | MSR_CE | MSR_ME)
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Boot default settings.
|
||||
*/
|
||||
#if !defined(BOOT_PERFORM_CORE_INIT) || defined(__DOXYGEN__)
|
||||
#define BOOT_PERFORM_CORE_INIT 1
|
||||
#endif
|
||||
|
||||
/*
|
||||
* VLE mode default settings.
|
||||
*/
|
||||
#if !defined(BOOT_USE_VLE) || defined(__DOXYGEN__)
|
||||
#define BOOT_USE_VLE 1
|
||||
#endif
|
||||
|
||||
/*
|
||||
* RAM relocation flag.
|
||||
*/
|
||||
#if !defined(BOOT_RELOCATE_IN_RAM) || defined(__DOXYGEN__)
|
||||
#define BOOT_RELOCATE_IN_RAM 0
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Derived constants and error checks. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Module data structures and types. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Module macros. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* External declarations. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Module inline functions. */
|
||||
/*===========================================================================*/
|
||||
|
||||
#endif /* _BOOT_H_ */
|
||||
|
||||
/** @} */
|
||||
|
|
@ -0,0 +1,214 @@
|
|||
/*
|
||||
SPC5 HAL - Copyright (C) 2013 STMicroelectronics
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file SPC560Pxx/boot.s
|
||||
* @brief SPC560Pxx boot-related code.
|
||||
*
|
||||
* @addtogroup PPC_BOOT
|
||||
* @{
|
||||
*/
|
||||
|
||||
#include "boot.h"
|
||||
|
||||
#if !defined(__DOXYGEN__)
|
||||
|
||||
/* BAM record.*/
|
||||
.section .boot, "ax"
|
||||
|
||||
.long 0x015A0000
|
||||
.long _reset_address
|
||||
|
||||
.align 2
|
||||
.globl _reset_address
|
||||
.type _reset_address, @function
|
||||
_reset_address:
|
||||
#if BOOT_PERFORM_CORE_INIT
|
||||
bl _coreinit
|
||||
#endif
|
||||
bl _ivinit
|
||||
|
||||
#if BOOT_RELOCATE_IN_RAM
|
||||
/*
|
||||
* Image relocation in RAM.
|
||||
*/
|
||||
lis %r4, __ram_reloc_start__@h
|
||||
ori %r4, %r4, __ram_reloc_start__@l
|
||||
lis %r5, __ram_reloc_dest__@h
|
||||
ori %r5, %r5, __ram_reloc_dest__@l
|
||||
lis %r6, __ram_reloc_end__@h
|
||||
ori %r6, %r6, __ram_reloc_end__@l
|
||||
.relloop:
|
||||
cmpl cr0, %r4, %r6
|
||||
bge cr0, .relend
|
||||
lwz %r7, 0(%r4)
|
||||
addi %r4, %r4, 4
|
||||
stw %r7, 0(%r5)
|
||||
addi %r5, %r5, 4
|
||||
b .relloop
|
||||
.relend:
|
||||
lis %r3, _boot_address@h
|
||||
ori %r3, %r3, _boot_address@l
|
||||
mtctr %r3
|
||||
bctrl
|
||||
#else
|
||||
b _boot_address
|
||||
#endif
|
||||
|
||||
#if BOOT_PERFORM_CORE_INIT
|
||||
.align 2
|
||||
_coreinit:
|
||||
/*
|
||||
* RAM clearing, this device requires a write to all RAM location in
|
||||
* order to initialize the ECC detection hardware, this is going to
|
||||
* slow down the startup but there is no way around.
|
||||
*/
|
||||
xor %r0, %r0, %r0
|
||||
xor %r1, %r1, %r1
|
||||
xor %r2, %r2, %r2
|
||||
xor %r3, %r3, %r3
|
||||
xor %r4, %r4, %r4
|
||||
xor %r5, %r5, %r5
|
||||
xor %r6, %r6, %r6
|
||||
xor %r7, %r7, %r7
|
||||
xor %r8, %r8, %r8
|
||||
xor %r9, %r9, %r9
|
||||
xor %r10, %r10, %r10
|
||||
xor %r11, %r11, %r11
|
||||
xor %r12, %r12, %r12
|
||||
xor %r13, %r13, %r13
|
||||
xor %r14, %r14, %r14
|
||||
xor %r15, %r15, %r15
|
||||
xor %r16, %r16, %r16
|
||||
xor %r17, %r17, %r17
|
||||
xor %r18, %r18, %r18
|
||||
xor %r19, %r19, %r19
|
||||
xor %r20, %r20, %r20
|
||||
xor %r21, %r21, %r21
|
||||
xor %r22, %r22, %r22
|
||||
xor %r23, %r23, %r23
|
||||
xor %r24, %r24, %r24
|
||||
xor %r25, %r25, %r25
|
||||
xor %r26, %r26, %r26
|
||||
xor %r27, %r27, %r27
|
||||
xor %r28, %r28, %r28
|
||||
xor %r29, %r29, %r29
|
||||
xor %r30, %r30, %r30
|
||||
xor %r31, %r31, %r31
|
||||
lis %r4, __ram_start__@h
|
||||
ori %r4, %r4, __ram_start__@l
|
||||
lis %r5, __ram_end__@h
|
||||
ori %r5, %r5, __ram_end__@l
|
||||
.cleareccloop:
|
||||
cmpl %cr0, %r4, %r5
|
||||
bge %cr0, .cleareccend
|
||||
stmw %r16, 0(%r4)
|
||||
addi %r4, %r4, 64
|
||||
b .cleareccloop
|
||||
.cleareccend:
|
||||
|
||||
/*
|
||||
* Branch prediction enabled.
|
||||
*/
|
||||
li %r3, BOOT_BUCSR_DEFAULT
|
||||
mtspr 1013, %r3 /* BUCSR */
|
||||
|
||||
blr
|
||||
#endif /* BOOT_PERFORM_CORE_INIT */
|
||||
|
||||
/*
|
||||
* Exception vectors initialization.
|
||||
*/
|
||||
.align 2
|
||||
_ivinit:
|
||||
/* MSR initialization.*/
|
||||
lis %r3, BOOT_MSR_DEFAULT@h
|
||||
ori %r3, %r3, BOOT_MSR_DEFAULT@l
|
||||
mtMSR %r3
|
||||
|
||||
/* IVPR initialization.*/
|
||||
lis %r3, __ivpr_base__@h
|
||||
ori %r3, %r3, __ivpr_base__@l
|
||||
mtIVPR %r3
|
||||
|
||||
blr
|
||||
|
||||
.section .ivors, "ax"
|
||||
|
||||
.globl IVORS
|
||||
IVORS:
|
||||
IVOR0: b IVOR0
|
||||
.align 4
|
||||
IVOR1: b _IVOR1
|
||||
.align 4
|
||||
IVOR2: b _IVOR2
|
||||
.align 4
|
||||
IVOR3: b _IVOR3
|
||||
.align 4
|
||||
IVOR4: b _IVOR4
|
||||
.align 4
|
||||
IVOR5: b _IVOR5
|
||||
.align 4
|
||||
IVOR6: b _IVOR6
|
||||
.align 4
|
||||
IVOR7: b _IVOR7
|
||||
.align 4
|
||||
IVOR8: b _IVOR8
|
||||
.align 4
|
||||
IVOR9: b _IVOR9
|
||||
.align 4
|
||||
IVOR10: b _IVOR10
|
||||
.align 4
|
||||
IVOR11: b _IVOR11
|
||||
.align 4
|
||||
IVOR12: b _IVOR12
|
||||
.align 4
|
||||
IVOR13: b _IVOR13
|
||||
.align 4
|
||||
IVOR14: b _IVOR14
|
||||
.align 4
|
||||
IVOR15: b _IVOR15
|
||||
|
||||
.section .handlers, "ax"
|
||||
|
||||
/*
|
||||
* Default IVOR handlers.
|
||||
*/
|
||||
.align 2
|
||||
.weak _IVOR0, _IVOR1, _IVOR2, _IVOR3, _IVOR4, _IVOR5
|
||||
.weak _IVOR6, _IVOR7, _IVOR8, _IVOR9, _IVOR10, _IVOR11
|
||||
.weak _IVOR12, _IVOR13, _IVOR14, _IVOR15
|
||||
.weak _unhandled_exception
|
||||
_IVOR0:
|
||||
_IVOR1:
|
||||
_IVOR2:
|
||||
_IVOR3:
|
||||
_IVOR5:
|
||||
_IVOR6:
|
||||
_IVOR7:
|
||||
_IVOR8:
|
||||
_IVOR9:
|
||||
_IVOR11:
|
||||
_IVOR12:
|
||||
_IVOR13:
|
||||
_IVOR14:
|
||||
_IVOR15:
|
||||
_unhandled_exception:
|
||||
b _unhandled_exception
|
||||
|
||||
#endif /* !defined(__DOXYGEN__) */
|
||||
|
||||
/** @} */
|
||||
|
|
@ -0,0 +1,77 @@
|
|||
/*
|
||||
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
|
||||
2011,2012,2013 Giovanni Di Sirio.
|
||||
|
||||
This file is part of ChibiOS/RT.
|
||||
|
||||
ChibiOS/RT is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation; either version 3 of the License, or
|
||||
(at your option) any later version.
|
||||
|
||||
ChibiOS/RT is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file SPC560Pxx/ppcparams.h
|
||||
* @brief PowerPC parameters for the SPC560Pxx.
|
||||
*
|
||||
* @defgroup PPC_SPC560Pxx SPC560Pxx Specific Parameters
|
||||
* @ingroup PPC_SPECIFIC
|
||||
* @details This file contains the PowerPC specific parameters for the
|
||||
* SPC560Pxx platform.
|
||||
* @{
|
||||
*/
|
||||
|
||||
#ifndef _PPCPARAMS_H_
|
||||
#define _PPCPARAMS_H_
|
||||
|
||||
/**
|
||||
* @brief PPC core model.
|
||||
*/
|
||||
#define PPC_VARIANT PPC_VARIANT_e200z0
|
||||
|
||||
/**
|
||||
* @brief Number of writable bits in IVPR register.
|
||||
*/
|
||||
#define PPC_IVPR_BITS 20
|
||||
|
||||
/**
|
||||
* @brief IVORx registers support.
|
||||
*/
|
||||
#define PPC_SUPPORTS_IVORS FALSE
|
||||
|
||||
/**
|
||||
* @brief Book E instruction set support.
|
||||
*/
|
||||
#define PPC_SUPPORTS_BOOKE FALSE
|
||||
|
||||
/**
|
||||
* @brief VLE instruction set support.
|
||||
*/
|
||||
#define PPC_SUPPORTS_VLE TRUE
|
||||
|
||||
/**
|
||||
* @brief Supports VLS Load/Store Multiple Volatile instructions.
|
||||
*/
|
||||
#define PPC_SUPPORTS_VLE_MULTI TRUE
|
||||
|
||||
/**
|
||||
* @brief Supports the decrementer timer.
|
||||
*/
|
||||
#define PPC_SUPPORTS_DECREMENTER FALSE
|
||||
|
||||
/**
|
||||
* @brief Number of interrupt sources.
|
||||
*/
|
||||
#define PPC_NUM_VECTORS 261
|
||||
|
||||
#endif /* _PPCPARAMS_H_ */
|
||||
|
||||
/** @} */
|
||||
Loading…
Reference in New Issue