andreika-git
/
ChibiOS
mirror of https://github.com/andreika-git/ChibiOS.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@1927 35acf78f-673a-0410-8e92-d51de3d6d3f4

This commit is contained in:
gdisirio 2010-05-14 18:10:27 +00:00
parent d42f2e5da4
commit ce50d026fc
1 changed files with 3 additions and 3 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
os/hal/platforms/STM32/hal_lld.c
View File

@ -167,20 +167,20 @@ void stm32_clock_init(void) {
/* PLL2 setup, it is only performed if the PLL2 clock is selected as source /* PLL2 setup, it is only performed if the PLL2 clock is selected as source
for the PLL clock else it is left disabled.*/ for the PLL clock else it is left disabled.*/
#if STM32_SW == STM32_SW_PLL
#if STM32_PREDIV1SRC == STM32_PREDIV1SRC_PLL2 #if STM32_PREDIV1SRC == STM32_PREDIV1SRC_PLL2
RCC->CFGR2 |= STM32_PREDIV2 | STM32_PLL2MUL; RCC->CFGR2 |= STM32_PREDIV2 | STM32_PLL2MUL;
RCC->CR |= RCC_CR_PLL2ON; RCC->CR |= RCC_CR_PLL2ON;
while (!(RCC->CR & RCC_CR_PLLRDY)) while (!(RCC->CR & RCC_CR_PLL2RDY))
; /* Waits until PLL is stable. */ ; /* Waits until PLL is stable. */
#endif #endif
/* PLL setup, it is only performed if the PLL is the selected source of /* PLL setup, it is only performed if the PLL is the selected source of
the system clock else it is left disabled.*/ the system clock else it is left disabled.*/
#if STM32_SW == STM32_SW_PLL
RCC->CFGR2 |= STM32_PREDIV1 | STM32_PREDIV1SRC; RCC->CFGR2 |= STM32_PREDIV1 | STM32_PREDIV1SRC;
RCC->CFGR |= STM32_PLLMUL | STM32_PLLSRC; RCC->CFGR |= STM32_PLLMUL | STM32_PLLSRC;
RCC->CR |= RCC_CR_PLLON; RCC->CR |= RCC_CR_PLLON;
while (!(RCC->CR & RCC_CR_PLL2RDY)) while (!(RCC->CR & RCC_CR_PLLRDY))
; /* Waits until PLL2 is stable. */ ; /* Waits until PLL2 is stable. */
#endif #endif