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Fixed bug #1199. 

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@14931 27425a3e-05d8-49a3-a47f-9c15f0e5edd8
This commit is contained in:
Giovanni Di Sirio 2021-10-21 11:29:38 +00:00
parent bfebc16ac6
commit ce7b5bfd86
2 changed files with 6 additions and 2 deletions
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6
os/hal/ports/common/ARMCMx/nvic.c
View File

@ -126,7 +126,8 @@ void nvicDisableVector(uint32_t n) {
NVIC->__ICER[n >> 5U] = 1U << (n & 0x1FU);
NVIC->__ICPR[n >> 5U] = 1U << (n & 0x1FU);
#if defined(__CORE_CM0_H_GENERIC) || defined(__CORE_CM23_H_GENERIC)
#if defined(__CORE_CM0_H_GENERIC) || defined(__CORE_CM0PLUS_H_GENERIC) || \
defined(__CORE_CM23_H_GENERIC)
NVIC->__IPR[_IP_IDX(n)] = NVIC->__IPR[_IP_IDX(n)] & ~(0xFFU << _BIT_SHIFT(n));
#else
NVIC->__IPR[n] = 0U;
@ -147,7 +148,8 @@ void nvicSetSystemHandlerPriority(uint32_t handler, uint32_t prio) {
osalDbgCheck(handler < 12U);
#if defined(__CORE_CM0_H_GENERIC) || defined(__CORE_CM23_H_GENERIC)
#if defined(__CORE_CM0_H_GENERIC) || defined(__CORE_CM0PLUS_H_GENERIC) || \
defined(__CORE_CM23_H_GENERIC)
SCB->__SHPR[_SHP_IDX(handler)] = (SCB->__SHPR[_SHP_IDX(handler)] & ~(0xFFU << _BIT_SHIFT(handler))) |
(NVIC_PRIORITY_MASK(prio) << _BIT_SHIFT(handler));
#else

2
readme.txt
View File

@ -84,6 +84,8 @@
- NEW: EFL driver and demo for STM32F3xx.
- NEW: New unit test subsystem under /os/test. Now it is officially
ChibiOS/TEST.
- FIX: Fixed function nvicSetSystemHandlerPriority() failing with CM0+ cores
(bug #1199)(backported to 20.3.4)(TBP to 21.6.1).
- FIX: Fixed several problems in STM32L4xx PLL and GPIO settings (bug #1198)
(backported to 20.3.4)(TBP to 21.6.1).
- FIX: Fixed PLLSA1x input frequency calculated incorrectly (bug #1197)