From cf56b32cd902b92220323eb34dfb3345dc62d0fe Mon Sep 17 00:00:00 2001 From: Giovanni Di Sirio Date: Fri, 4 Jun 2021 18:19:53 +0000 Subject: [PATCH] Updated readme and release note. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@14473 27425a3e-05d8-49a3-a47f-9c15f0e5edd8 --- readme.txt | 2 ++ release_note_next.txt | 8 ++++++-- 2 files changed, 8 insertions(+), 2 deletions(-) diff --git a/readme.txt b/readme.txt index 29698401e..48b367a67 100644 --- a/readme.txt +++ b/readme.txt @@ -75,6 +75,8 @@ *** Next *** - NEW: Simplified interface between ports and RT/NIL. +- NEW: Removed duplicated files for ARM ports: chtypes.h. +- NEW: Removed duplicated files for all ports: chcore_timer.h. - NEW: STM32 ADCv3, USARTv2, USARTv3, USBv1 updated for dynamic clocking. - NEW: Improved PWR settings for STM32G0, STM32G4 and STM32L4+. - NEW: Dynamic support implemented for STM32G0, STM32G4, STM32L4+, STM32WL. diff --git a/release_note_next.txt b/release_note_next.txt index b1c6ed44d..6d8337d74 100644 --- a/release_note_next.txt +++ b/release_note_next.txt @@ -11,6 +11,7 @@ integrated in our structure: WolfSSL, FatFS and lwIP. - NEW RT 7.0. - Support for RP2040 and Raspberry Pico board. - Support for STM32L5xx, STM32WBxx and STM32WLxx. +- Support for more STM32 sub-families. - Dynamic clock support in HAL. - Improved STM32 HAL. - Added ARMv8-M port. @@ -23,6 +24,8 @@ integrated in our structure: WolfSSL, FatFS and lwIP. - Addes SMP port for Cortex-M0 required by RP2040. - The old generic ARMCMx port has been split in ARMv6-M, ARMv7-M and ARMv8-M-ML ports. +- Simplified interface between RT/NIL and port layer. +- Removed duplicated files in the port layers: chtypes.h, chcore_timer.h. *** What's new in OS Library 1.3.0 *** @@ -34,14 +37,15 @@ integrated in our structure: WolfSSL, FatFS and lwIP. *** What's new in RT 7.0.0 *** -- Support for SMP multi-core threading. +- Support for full-SMP multi-core threading. +- Support for decoupled multi-core threading. - 64 bits monotonic time stamps with the same resolution of Virtual Timers. - Much more efficient and accurate Virtual Timers in tick-less mode. - Automatic reload of Virtual Timers, now both one-shot and continuous timers are supported. - Internal reorganization to better fit the general architectural design. For example, lists/queus code has been centralized in a dedicated module. - +- New trace event for entering the "ready" state. *** What's new in NIL 4.1.0 ***