git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@13499 27425a3e-05d8-49a3-a47f-9c15f0e5edd8
This commit is contained in:
cinsights 2020-04-02 09:41:25 +00:00
parent fc9c65260b
commit d137f45301
4 changed files with 20 additions and 22 deletions

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@ -461,7 +461,7 @@ static void i2c_lld_serve_error_interrupt(I2CDriver *i2cp, uint32_t isr) {
if (isr & I2C_ISR_TIMEOUT) if (isr & I2C_ISR_TIMEOUT)
i2cp->errors |= I2C_TIMEOUT; i2cp->errors |= I2C_TIMEOUT;
/* If some error has been identified then sends wakes the waiting thread.*/ /* If some error has been identified then wake the waiting thread.*/
if (i2cp->errors != I2C_NO_ERROR) if (i2cp->errors != I2C_NO_ERROR)
_i2c_wakeup_error_isr(i2cp); _i2c_wakeup_error_isr(i2cp);
} }
@ -770,16 +770,17 @@ void i2c_lld_init(void) {
I2CD4.i2c = I2C4; I2CD4.i2c = I2C4;
#if STM32_I2C_USE_DMA == TRUE #if STM32_I2C_USE_DMA == TRUE
#if defined(STM32_I2C_DMA_REQUIRED) && defined(STM32_I2C_BDMA_REQUIRED) #if defined(STM32_I2C_DMA_REQUIRED) && defined(STM32_I2C_BDMA_REQUIRED)
I2CD4.is_bdma = true;
#endif
#if STM32_I2C4_USE_BDMA == TRUE #if STM32_I2C4_USE_BDMA == TRUE
I2CD4.is_bdma = true;
I2CD4.rx.bdma = NULL; I2CD4.rx.bdma = NULL;
I2CD4.tx.bdma = NULL; I2CD4.tx.bdma = NULL;
#else #else
I2CD4.is_bdma = false;
I2CD4.rx.dma = NULL; I2CD4.rx.dma = NULL;
I2CD4.tx.dma = NULL; I2CD4.tx.dma = NULL;
#endif #endif /* STM32_I2C4_USE_BDMA == TRUE */
#endif #endif /* defined(STM32_I2C_DMA_REQUIRED) && defined(STM32_I2C_BDMA_REQUIRED) */
#endif /* STM32_I2C_USE_DMA == TRUE */
#if defined(STM32_I2C4_GLOBAL_NUMBER) || defined(__DOXYGEN__) #if defined(STM32_I2C4_GLOBAL_NUMBER) || defined(__DOXYGEN__)
nvicEnableVector(STM32_I2C4_GLOBAL_NUMBER, STM32_I2C_I2C4_IRQ_PRIORITY); nvicEnableVector(STM32_I2C4_GLOBAL_NUMBER, STM32_I2C_I2C4_IRQ_PRIORITY);
#elif defined(STM32_I2C4_EVENT_NUMBER) && defined(STM32_I2C4_ERROR_NUMBER) #elif defined(STM32_I2C4_EVENT_NUMBER) && defined(STM32_I2C4_ERROR_NUMBER)

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@ -379,6 +379,11 @@
#endif #endif
#endif #endif
#if STM32_I2C_USE_I2C4
#if !defined(STM32_BDMA_REQUIRED)
#define STM32_BDMA_REQUIRED
#endif
#endif
#else /* STM32_I2C4_USE_BDMA != TRUE */ #else /* STM32_I2C4_USE_BDMA != TRUE */
#if STM32_I2C_USE_I2C1 || STM32_I2C_USE_I2C2 || STM32_I2C_USE_I2C3 || STM32_I2C_USE_I2C4 #if STM32_I2C_USE_I2C1 || STM32_I2C_USE_I2C2 || STM32_I2C_USE_I2C3 || STM32_I2C_USE_I2C4
@ -390,15 +395,6 @@
#endif /* STM32_I2C4_USE_BDMA != TRUE */ #endif /* STM32_I2C4_USE_BDMA != TRUE */
#if STM32_I2C4_USE_BDMA == TRUE
#if STM32_I2C_USE_I2C4
#define STM32_I2C_BDMA_REQUIRED
#if !defined(STM32_BDMA_REQUIRED)
#define STM32_BDMA_REQUIRED
#endif
#endif
#endif /* STM32_I2C4_USE_BDMA == TRUE */
#endif /* STM32_I2C_USE_DMA == TRUE */ #endif /* STM32_I2C_USE_DMA == TRUE */
/*===========================================================================*/ /*===========================================================================*/

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@ -1570,10 +1570,10 @@
#define STM32_UART9_TX_DMA_CHN 0x00000001 #define STM32_UART9_TX_DMA_CHN 0x00000001
#define STM32_HAS_UART10 TRUE #define STM32_HAS_UART10 TRUE
#define STM32_UART10_RX_DMA_MSK STM32_DMA_STREAM_ID_MSK(2, 3) #define STM32_UART10_RX_DMA_MSK STM32_DMA_STREAM_ID_MSK(2, 0)
#define STM32_UART10_RX_DMA_CHN 0x00009000 #define STM32_UART10_RX_DMA_CHN 0x00000005
#define STM32_UART10_TX_DMA_MSK STM32_DMA_STREAM_ID_MSK(2, 5) #define STM32_UART10_TX_DMA_MSK STM32_DMA_STREAM_ID_MSK(2, 7)
#define STM32_UART10_TX_DMA_CHN 0x00900000 #define STM32_UART10_TX_DMA_CHN 0x60000000
#define STM32_HAS_LPUART1 FALSE #define STM32_HAS_LPUART1 FALSE

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@ -148,8 +148,8 @@
#define STM32_I2C2_ERROR_HANDLER VectorC8 #define STM32_I2C2_ERROR_HANDLER VectorC8
#define STM32_I2C3_EVENT_HANDLER Vector160 #define STM32_I2C3_EVENT_HANDLER Vector160
#define STM32_I2C3_ERROR_HANDLER Vector164 #define STM32_I2C3_ERROR_HANDLER Vector164
#define STM32_I2C4_EVENT_HANDLER Vector18C #define STM32_I2C4_ERROR_HANDLER Vector18C
#define STM32_I2C4_ERROR_HANDLER Vector190 #define STM32_I2C4_EVENT_HANDLER Vector190
#define STM32_I2C1_EVENT_NUMBER 31 #define STM32_I2C1_EVENT_NUMBER 31
#define STM32_I2C1_ERROR_NUMBER 32 #define STM32_I2C1_ERROR_NUMBER 32
@ -157,8 +157,9 @@
#define STM32_I2C2_ERROR_NUMBER 34 #define STM32_I2C2_ERROR_NUMBER 34
#define STM32_I2C3_EVENT_NUMBER 72 #define STM32_I2C3_EVENT_NUMBER 72
#define STM32_I2C3_ERROR_NUMBER 73 #define STM32_I2C3_ERROR_NUMBER 73
#define STM32_I2C4_EVENT_NUMBER 83 #define STM32_I2C4_ERROR_NUMBER 83
#define STM32_I2C4_ERROR_NUMBER 84 #define STM32_I2C4_EVENT_NUMBER 84
/* /*
* OCTOSPI unit. * OCTOSPI unit.