git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@102 35acf78f-673a-0410-8e92-d51de3d6d3f4
This commit is contained in:
gdisirio
parent
b3d17c3740
commit
d1733a8bd3
|
|
@ -127,10 +127,19 @@ CPFLAGS = $(MCFLAGS) $(OPT) $(WARN) -Wa,-ahlms=$(<:.c=.lst) $(DEFS)
|
|||
LDFLAGS = $(MCFLAGS) -nostartfiles -T$(LDSCRIPT) -Wl,-Map=$(PROJECT).map,--cref,--no-warn-mismatch $(LIBDIR)
|
||||
ODFLAGS = -x --syms
|
||||
|
||||
# Thumb interwork enabled only if needed because it kills performance.
|
||||
ifneq ($(TSRC),)
|
||||
ASFLAGS += -mthumb-interwork -D THUMB_INTERWORK
|
||||
CPFLAGS += -mthumb-interwork -D THUMB_INTERWORK
|
||||
LDFLAGS += -mthumb-interwork
|
||||
ifneq ($(ASRC),)
|
||||
# Both ARM and THUMB case
|
||||
CPFLAGS += -mthumb-interwork -D THUMB
|
||||
LDFLAGS += -mthumb-interwork
|
||||
ASFLAGS += -mthumb-interwork -D THUMB
|
||||
else
|
||||
# Pure THUMB case, THUMB C code cannot be called by ARM asm code directly
|
||||
CPFLAGS += -D THUMB
|
||||
LDFLAGS += -mthumb
|
||||
ASFLAGS += -mthumb-interwork -D THUMB -D PURE_THUMB
|
||||
endif
|
||||
endif
|
||||
|
||||
# Generate dependency information
|
||||
|
|
@ -148,7 +157,7 @@ $(AOBJS) : %.o : %.c
|
|||
|
||||
$(TOBJS) : %.o : %.c
|
||||
@echo
|
||||
$(CC) -c $(CPFLAGS) $(TOPT) -I . $(INCDIR) $< -o $@
|
||||
$(CC) -c $(CPFLAGS) $(TOPT) -mthumb -I . $(INCDIR) $< -o $@
|
||||
|
||||
$(ASMOBJS) : %.o : %.s
|
||||
@echo
|
||||
|
|
|
|||
|
|
@ -62,12 +62,13 @@ UDEFS =
|
|||
UADEFS =
|
||||
|
||||
# List ARM-mode C source files here
|
||||
ASRC = chcore.c
|
||||
ASRC =
|
||||
|
||||
# List THUMB-mode C sources here
|
||||
# NOTE: If any module is compiled in thumb mode then -mthumb-interwork is
|
||||
# enabled for all modules and that lowers performance.
|
||||
TSRC = ../../src/chinit.c ../../src/chdebug.c ../../src/chlists.c ../../src/chdelta.c \
|
||||
TSRC = chcore.c \
|
||||
../../src/chinit.c ../../src/chdebug.c ../../src/chlists.c ../../src/chdelta.c \
|
||||
../../src/chschd.c ../../src/chthreads.c ../../src/chsem.c ../../src/chevents.c \
|
||||
../../src/chmsg.c ../../src/chsleep.c ../../src/chqueues.c ../../src/chserial.c \
|
||||
../../ports/ARM7-LPC214x/GCC/vic.c ../../ports/ARM7-LPC214x/GCC/lpc214x_serial.c \
|
||||
|
|
@ -91,14 +92,14 @@ ULIBS =
|
|||
AOPT =
|
||||
|
||||
# THUMB-specific options here
|
||||
TOPT = -mthumb -D THUMB
|
||||
TOPT = -mthumb
|
||||
|
||||
# Common options here
|
||||
# NOTE: -ffixed-r7 is only needed if you enabled CH_CURRP_REGISTER_CACHE in
|
||||
# chconf.h.
|
||||
# NOTE: -falign-functions=16 may improve the performance, not always, but
|
||||
# increases the code size.
|
||||
OPT = -O2 -ggdb -fomit-frame-pointer -fno-strict-aliasing
|
||||
OPT = -Os -ggdb -fomit-frame-pointer -fno-strict-aliasing
|
||||
#OPT += -ffixed-r7
|
||||
OPT += -falign-functions=16
|
||||
|
||||
|
|
@ -125,10 +126,19 @@ CPFLAGS = $(MCFLAGS) $(OPT) $(WARN) -Wa,-ahlms=$(<:.c=.lst) $(DEFS)
|
|||
LDFLAGS = $(MCFLAGS) -nostartfiles -T$(LDSCRIPT) -Wl,-Map=$(PROJECT).map,--cref,--no-warn-mismatch $(LIBDIR)
|
||||
ODFLAGS = -x --syms
|
||||
|
||||
# Thumb interwork enabled only if needed because it kills performance.
|
||||
ifneq ($(TSRC),)
|
||||
ASFLAGS += -mthumb-interwork -D THUMB_INTERWORK
|
||||
CPFLAGS += -mthumb-interwork -D THUMB_INTERWORK
|
||||
LDFLAGS += -mthumb-interwork
|
||||
ifneq ($(ASRC),)
|
||||
# Both ARM and THUMB case
|
||||
CPFLAGS += -mthumb-interwork -D THUMB
|
||||
LDFLAGS += -mthumb-interwork
|
||||
ASFLAGS += -mthumb-interwork -D THUMB
|
||||
else
|
||||
# Pure THUMB case, THUMB C code cannot be called by ARM asm code directly
|
||||
CPFLAGS += -D THUMB
|
||||
LDFLAGS += -mthumb
|
||||
ASFLAGS += -mthumb-interwork -D THUMB -D PURE_THUMB
|
||||
endif
|
||||
endif
|
||||
|
||||
# Generate dependency information
|
||||
|
|
|
|||
|
|
@ -159,48 +159,12 @@ void _IdleThread(void *p) {
|
|||
void chSysHalt(void) {
|
||||
|
||||
chSysLock();
|
||||
IO0SET = 0x80000C00;
|
||||
IO0SET = 0x00000C00;
|
||||
IO0CLR = 0x80000000;
|
||||
while (TRUE)
|
||||
;
|
||||
}
|
||||
|
||||
/*
|
||||
* Undefined Instruction exception handler.
|
||||
* Yellow LED + RED LED 2.
|
||||
*/
|
||||
void UndHandler(void) {
|
||||
|
||||
IO0SET = 0x80000C00;
|
||||
IO0CLR = 0x80000800;
|
||||
while(TRUE)
|
||||
;
|
||||
}
|
||||
|
||||
/*
|
||||
* Prefetch exception handler.
|
||||
* Yellow LED + RED LED 1.
|
||||
*/
|
||||
void PrefetchHandler(void) {
|
||||
|
||||
IO0SET = 0x80000C00;
|
||||
IO0CLR = 0x80000400;
|
||||
while(TRUE)
|
||||
;
|
||||
}
|
||||
|
||||
/*
|
||||
* Abort exception handler.
|
||||
* Yellow LED + both RED LEDs.
|
||||
*/
|
||||
void AbortHandler(void) {
|
||||
|
||||
IO0SET = 0x80000C00;
|
||||
IO0CLR = 0x80000C00;
|
||||
while(TRUE)
|
||||
;
|
||||
}
|
||||
|
||||
/*
|
||||
* Non-vectored IRQs handling here.
|
||||
*/
|
||||
|
|
|
|||
|
|
@ -38,52 +38,72 @@
|
|||
threadstart:
|
||||
msr CPSR_c, #MODE_SYS
|
||||
mov r0, r5
|
||||
/* blx r4*/
|
||||
#ifndef PURE_THUMB
|
||||
mov lr, pc
|
||||
bx r4
|
||||
bl chThdExit
|
||||
#else
|
||||
mov lr, pc
|
||||
bx r4
|
||||
.code 16
|
||||
ldr r4, =chThdExit
|
||||
bx r4
|
||||
#endif
|
||||
|
||||
.globl UndHandler
|
||||
UndHandler:
|
||||
|
||||
.globl SwiHandler
|
||||
SwiHandler:
|
||||
b SwiHandler
|
||||
|
||||
.globl PrefetchHandler
|
||||
PrefetchHandler:
|
||||
|
||||
.globl AbortHandler
|
||||
AbortHandler:
|
||||
|
||||
.globl FiqHandler
|
||||
FiqHandler:
|
||||
b FiqHandler
|
||||
#ifdef PURE_THUMB
|
||||
ldr r0, =chSysHalt
|
||||
bx r0
|
||||
#else
|
||||
bl chSysHalt
|
||||
#endif
|
||||
|
||||
#ifdef THUMB_INTERWORK
|
||||
#ifdef THUMB
|
||||
.globl chSysLock
|
||||
chSysLock:
|
||||
msr CPSR_c, #0x9F
|
||||
bx lr
|
||||
msr CPSR_c, #0x9F
|
||||
bx lr
|
||||
|
||||
.globl chSysUnlock
|
||||
chSysUnlock:
|
||||
msr CPSR_c, #0x1F
|
||||
bx lr
|
||||
msr CPSR_c, #0x1F
|
||||
bx lr
|
||||
#endif
|
||||
|
||||
.globl chSysSwitchI
|
||||
chSysSwitchI:
|
||||
#ifdef CH_CURRP_REGISTER_CACHE
|
||||
stmfd sp!, {r4, r5, r6, r8, r9, r10, r11, lr}
|
||||
str sp, [r0, #0]
|
||||
ldr sp, [r1, #0]
|
||||
#ifdef THUMB_INTERWORK
|
||||
ldmfd sp!, {r4, r5, r6, r8, r9, r10, r11, lr}
|
||||
bx lr
|
||||
stmfd sp!, {r4, r5, r6, r8, r9, r10, r11, lr}
|
||||
str sp, [r0, #0]
|
||||
ldr sp, [r1, #0]
|
||||
#ifdef THUMB
|
||||
ldmfd sp!, {r4, r5, r6, r8, r9, r10, r11, lr}
|
||||
bx lr
|
||||
#else
|
||||
ldmfd sp!, {r4, r5, r6, r8, r9, r10, r11, pc}
|
||||
ldmfd sp!, {r4, r5, r6, r8, r9, r10, r11, pc}
|
||||
#endif
|
||||
#else
|
||||
stmfd sp!, {r4, r5, r6, r7, r8, r9, r10, r11, lr}
|
||||
str sp, [r0, #0]
|
||||
ldr sp, [r1, #0]
|
||||
#ifdef THUMB_INTERWORK
|
||||
ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, r11, lr}
|
||||
bx lr
|
||||
stmfd sp!, {r4, r5, r6, r7, r8, r9, r10, r11, lr}
|
||||
str sp, [r0, #0]
|
||||
ldr sp, [r1, #0]
|
||||
#ifdef THUMB
|
||||
ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, r11, lr}
|
||||
bx lr
|
||||
#else
|
||||
ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, r11, pc}
|
||||
ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, r11, pc}
|
||||
#endif
|
||||
#endif /* CH_CURRP_REGISTER_CACHE */
|
||||
|
||||
|
|
@ -115,28 +135,68 @@ chSysSwitchI:
|
|||
IrqHandler:
|
||||
sub lr, lr, #4
|
||||
stmfd sp!, {r0-r3, r12, lr}
|
||||
#ifdef PURE_THUMB
|
||||
ldr r0, =NonVectoredIrq
|
||||
mov lr, pc
|
||||
bx r0
|
||||
.code 16
|
||||
mov lr, pc
|
||||
bx lr
|
||||
.code 32
|
||||
#else
|
||||
bl NonVectoredIrq
|
||||
#endif
|
||||
b IrqCommon
|
||||
|
||||
.globl T0IrqHandler
|
||||
T0IrqHandler:
|
||||
sub lr, lr, #4
|
||||
stmfd sp!, {r0-r3, r12, lr}
|
||||
#ifdef PURE_THUMB
|
||||
ldr r0, =Timer0Irq
|
||||
mov lr, pc
|
||||
bx r0
|
||||
.code 16
|
||||
mov lr, pc
|
||||
bx lr
|
||||
.code 32
|
||||
#else
|
||||
bl Timer0Irq
|
||||
#endif
|
||||
b IrqCommon
|
||||
|
||||
.globl UART0IrqHandler
|
||||
UART0IrqHandler:
|
||||
sub lr, lr, #4
|
||||
stmfd sp!, {r0-r3, r12, lr}
|
||||
#ifdef PURE_THUMB
|
||||
ldr r0, =UART0Irq
|
||||
mov lr, pc
|
||||
bx r0
|
||||
.code 16
|
||||
mov lr, pc
|
||||
bx lr
|
||||
.code 32
|
||||
#else
|
||||
bl UART0Irq
|
||||
#endif
|
||||
b IrqCommon
|
||||
|
||||
.globl UART1IrqHandler
|
||||
UART1IrqHandler:
|
||||
sub lr, lr, #4
|
||||
stmfd sp!, {r0-r3, r12, lr}
|
||||
#ifdef PURE_THUMB
|
||||
ldr r0, =UART1Irq
|
||||
mov lr, pc
|
||||
bx r0
|
||||
.code 16
|
||||
mov lr, pc
|
||||
bx lr
|
||||
.code 32
|
||||
#else
|
||||
bl UART1Irq
|
||||
#endif
|
||||
b IrqCommon
|
||||
|
||||
/*
|
||||
|
|
@ -144,7 +204,17 @@ UART1IrqHandler:
|
|||
* required.
|
||||
*/
|
||||
IrqCommon:
|
||||
#ifdef PURE_THUMB
|
||||
ldr r0, =chSchRescRequiredI
|
||||
mov lr, pc
|
||||
bx r0
|
||||
.code 16
|
||||
mov lr, pc
|
||||
bx lr
|
||||
.code 32
|
||||
#else
|
||||
bl chSchRescRequiredI
|
||||
#endif
|
||||
cmp r0, #0 // Simply returns if a
|
||||
ldmeqfd sp!, {r0-r3, r12, pc}^ // reschedule is not required.
|
||||
|
||||
|
|
@ -159,7 +229,17 @@ IrqCommon:
|
|||
stmfd sp!, {r0, r1} // Push R0=SPSR, R1=LR_IRQ.
|
||||
|
||||
// Context switch.
|
||||
#ifdef PURE_THUMB
|
||||
ldr r0, =chSchDoRescheduleI
|
||||
mov lr, pc
|
||||
bx r0
|
||||
.code 16
|
||||
mov lr, pc
|
||||
bx lr
|
||||
.code 32
|
||||
#else
|
||||
bl chSchDoRescheduleI
|
||||
#endif
|
||||
|
||||
// Re-establish the IRQ conditions again.
|
||||
ldmfd sp!, {r0, r1} // Pop R0=SPSR, R1=LR_IRQ.
|
||||
|
|
|
|||
|
|
@ -99,17 +99,8 @@ ResetHandler:
|
|||
/* System */
|
||||
msr CPSR_c, #MODE_SYS | I_BIT | F_BIT
|
||||
mov sp, r0
|
||||
ldr r1, =__sys_stack_size__
|
||||
sub r0, r0, r1
|
||||
/*
|
||||
* Check on allocated stacks size. This should never happen unless you
|
||||
* don't care to verify the map file after compiling your application.
|
||||
*/
|
||||
ldr r1, =_bss_end
|
||||
cmp r0, r1
|
||||
bge ramsizeok
|
||||
bl chSysHalt
|
||||
ramsizeok:
|
||||
// ldr r1, =__sys_stack_size__
|
||||
// sub r0, r0, r1
|
||||
/*
|
||||
* Data initialization.
|
||||
* NOTE: It assumes that the DATA size is a multiple of 4.
|
||||
|
|
@ -136,11 +127,33 @@ bssloop:
|
|||
/*
|
||||
* Application-provided HW initialization routine.
|
||||
*/
|
||||
#ifndef PURE_THUMB
|
||||
bl hwinit
|
||||
#else
|
||||
ldr r0, =hwinit
|
||||
mov lr, pc
|
||||
bx r0
|
||||
.code 16
|
||||
mov lr, pc
|
||||
bx lr
|
||||
.code 32
|
||||
#endif
|
||||
/*
|
||||
* main(0, NULL).
|
||||
*/
|
||||
mov r0, #0
|
||||
mov r1, #0
|
||||
#ifndef PURE_THUMB
|
||||
bl main
|
||||
bl chSysHalt
|
||||
#else
|
||||
ldr r2, =main
|
||||
mov lr, pc
|
||||
bx r2
|
||||
.code 16
|
||||
mov lr, pc
|
||||
bx lr
|
||||
.code 32
|
||||
ldr r2, =chSysHalt
|
||||
bx r2
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -38,6 +38,14 @@ AVR-AT90CANx-GCC - Port on AVR AT90CAN128, not complete yet.
|
|||
*** Releases ***
|
||||
*****************************************************************************
|
||||
|
||||
*** 0.4.2 ***
|
||||
- Improved the THUMB mode: when all C sources are compiled in thumb mode then
|
||||
the -mthumb-interworking option is not enabled in the makefile, this greatly
|
||||
improves the performance and reduces the overall code size.
|
||||
It is recommended to either use ARM mode or THUMB mode and not mix them
|
||||
unless you know exactly what you are doing and understand the consequences.
|
||||
Mixing is still supported anyway.
|
||||
|
||||
*** 0.4.1 ***
|
||||
- Modified the initialization code in order to have a dedicated idle thread in
|
||||
the system, now the main() function behaves like a normal thread after
|
||||
|
|
|
|||
|
|
@ -77,7 +77,7 @@ static void println(char *msgp) {
|
|||
|
||||
t_msg Thread1(void *p) {
|
||||
|
||||
chFDDPut(comp, *(BYTE8 *)p);
|
||||
// chFDDPut(comp, *(BYTE8 *)p);
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
|
|||
Loading…
Reference in New Issue