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ChibiOS
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Work on bug #1113, to be completed. 

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@13769 27425a3e-05d8-49a3-a47f-9c15f0e5edd8
This commit is contained in:
Giovanni Di Sirio 2020-07-22 09:09:23 +00:00
parent 77a5aacfcc
commit d1c2a7ced4
9 changed files with 40 additions and 7 deletions
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2
demos/STM32/RT-STM32H755ZI-NUCLEO144/cfg/halconf.h
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@ -135,7 +135,7 @@
* @brief Enables the SDC subsystem.
*/
#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__)
#define HAL_USE_SDC TRUE
#define HAL_USE_SDC FALSE
#endif
/**

2
demos/STM32/RT-STM32H755ZI-NUCLEO144/cfg/mcuconf.h
View File

@ -353,7 +353,7 @@
/*
* SDC driver system settings.
*/
#define STM32_SDC_USE_SDMMC1 TRUE
#define STM32_SDC_USE_SDMMC1 FALSE
#define STM32_SDC_USE_SDMMC2 FALSE
#define STM32_SDC_SDMMC_UNALIGNED_SUPPORT TRUE
#define STM32_SDC_SDMMC_WRITE_TIMEOUT 1000000

2
os/hal/ports/STM32/STM32H7xx/hal_lld.h
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@ -2615,7 +2615,7 @@
/**
* @brief LPUART1 clock.
*/
#define STM32_LPUART1CLK STM32_PCLK1
#define STM32_LPUART1CLK STM32_PCLK4
#elif STM32_LPUART1SEL == STM32_LPUART1SEL_PLL2_Q_CK
#define STM32_LPUART1CLK STM32_PLL2_Q_CK

6
os/hal/ports/STM32/STM32H7xx/stm32_isr.c
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@ -141,7 +141,8 @@ void irqInit(void) {
uart5_irq_init();
usart6_irq_init();
uart7_irq_init();
uart5_irq_init();
uart8_irq_init();
lpuart1_irq_init();
}
/**
@ -190,7 +191,8 @@ void irqDeinit(void) {
uart5_irq_deinit();
usart6_irq_deinit();
uart7_irq_deinit();
uart5_irq_deinit();
uart8_irq_deinit();
lpuart1_irq_deinit();
}
/** @} */

3
os/hal/ports/STM32/STM32H7xx/stm32_isr.h
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@ -56,6 +56,7 @@
#define STM32_USART6_SUPPRESS_ISR
#define STM32_UART7_SUPPRESS_ISR
#define STM32_UART8_SUPPRESS_ISR
#define STM32_LPUART1_SUPPRESS_ISR
/** @} */
/**
@ -289,6 +290,7 @@
#define STM32_USART6_HANDLER Vector15C
#define STM32_UART7_HANDLER Vector188
#define STM32_UART8_HANDLER Vector18C
#define STM32_LPUART1_HANDLER Vector278
#define STM32_USART1_NUMBER 37
#define STM32_USART2_NUMBER 38
@ -298,6 +300,7 @@
#define STM32_USART6_NUMBER 71
#define STM32_UART7_NUMBER 82
#define STM32_UART8_NUMBER 83
#define STM32_LPUART1_NUMBER 142
/*
* USB/OTG units.

24
os/hal/ports/STM32/STM32H7xx/stm32_rcc.h
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@ -1689,6 +1689,30 @@
#define rccResetUART8() rccResetAPB1L(RCC_APB1LRSTR_UART8RST)
/** @} */
/**
* @brief Enables the LPUART1 peripheral clock.
*
* @param[in] lp low power enable flag
*
* @api
*/
#define rccEnableLPUART1(lp) rccEnableAPB4(RCC_APB4ENR_LPUART1EN, lp)
/**
* @brief Disables the LPUART1 peripheral clock.
*
* @api
*/
#define rccDisableLPUART1() rccDisableAPB4(RCC_APB4ENR_LPUART1EN)
/**
* @brief Resets the LPUART1 peripheral.
*
* @api
*/
#define rccResetLPUART1() rccResetAPB4(RCC_APB4RSTR_LPUART1RST)
/** @} */
/**
* @name LTDC peripheral specific RCC operations
* @{

4
os/hal/ports/STM32/STM32H7xx/stm32_registry.h
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@ -258,7 +258,7 @@
#define STM32_HAS_USART6 TRUE
#define STM32_HAS_UART7 TRUE
#define STM32_HAS_UART8 TRUE
#define STM32_HAS_LPUART1 FALSE
#define STM32_HAS_LPUART1 TRUE
/* USB attributes.*/
#define STM32_OTG_STEPPING 2
@ -486,7 +486,7 @@
#define STM32_HAS_USART6 TRUE
#define STM32_HAS_UART7 TRUE
#define STM32_HAS_UART8 TRUE
#define STM32_HAS_LPUART1 FALSE
#define STM32_HAS_LPUART1 TRUE
/* USB attributes.*/
#define STM32_OTG_STEPPING 2

2
readme.txt
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@ -100,6 +100,8 @@
MEMS Accelerometers.
- NEW: Safer messages mechanism for sandboxes (to be backported to 20.3.1).
- NEW: Added latency measurement test application.
- FIX: Fixed LPUART1 support for STM32H7xx (bug #1113)
(backported to 20.3.2).
- FIX: Fixed wrong sector count in EFL driver for L4+ dual bank configuration
(bug #1112)(backported to 20.3.2).
- FIX: Fixed wrong preprocessor checks in STM32 TIMv1 ICU driver (bug #1111)

2
tools/ftl/processors/conf/mcuconf_stm32h743xx/mcuconf.h.ftl
View File

@ -229,6 +229,7 @@
#define STM32_IRQ_USART6_PRIORITY ${doc.STM32_IRQ_USART6_PRIORITY!"12"}
#define STM32_IRQ_UART7_PRIORITY ${doc.STM32_IRQ_UART7_PRIORITY!"12"}
#define STM32_IRQ_UART8_PRIORITY ${doc.STM32_IRQ_UART8_PRIORITY!"12"}
#define STM32_IRQ_LPUART1_PRIORITY ${doc.STM32_IRQ_LPUART1_PRIORITY!"12"}
/*
* ADC driver system settings.
@ -383,6 +384,7 @@
#define STM32_SERIAL_USE_USART6 ${doc.STM32_SERIAL_USE_USART6!"FALSE"}
#define STM32_SERIAL_USE_UART7 ${doc.STM32_SERIAL_USE_UART7!"FALSE"}
#define STM32_SERIAL_USE_UART8 ${doc.STM32_SERIAL_USE_UART8!"FALSE"}
#define STM32_SERIAL_USE_LPUART1 ${doc.STM32_SERIAL_USE_LPUART1!"FALSE"}
/*
* SPI driver system settings.