Serial support for STM32F3xx.

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4871 35acf78f-673a-0410-8e92-d51de3d6d3f4
This commit is contained in:
gdisirio 2012-12-04 15:02:49 +00:00
parent 1374037cdc
commit d65e5e6b0d
11 changed files with 167 additions and 15 deletions

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@ -70,7 +70,7 @@ include $(CHIBIOS)/os/hal/platforms/STM32F3xx/platform.mk
include $(CHIBIOS)/os/hal/hal.mk
include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F3xx/port.mk
include $(CHIBIOS)/os/kernel/kernel.mk
#include $(CHIBIOS)/test/test.mk
include $(CHIBIOS)/test/test.mk
# Define linker script file here
LDSCRIPT= $(PORTLD)/STM32F303xc.ld

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@ -129,7 +129,7 @@
* @brief Enables the SERIAL subsystem.
*/
#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__)
#define HAL_USE_SERIAL FALSE
#define HAL_USE_SERIAL TRUE
#endif
/**

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@ -20,7 +20,7 @@
#include "ch.h"
#include "hal.h"
//#include "test.h"
#include "test.h"
/*
* This is a periodic thread that does absolutely nothing except flashing
@ -74,7 +74,13 @@ int main(void) {
halInit();
chSysInit();
/* TODO: inialize serial driver 1 or 2 */
/*
* Activates the serial driver 1 using the driver default configuration.
* PA9(TX) and PA10(RX) are routed to USART1.
*/
sdStart(&SD1, NULL);
palSetPadMode(GPIOA, 9, PAL_MODE_ALTERNATE(7));
palSetPadMode(GPIOA, 10, PAL_MODE_ALTERNATE(7));
/*
* Creates the example thread.
@ -87,9 +93,8 @@ int main(void) {
* pressed the test procedure is launched.
*/
while (TRUE) {
/* TODO */
// if (palReadPad(GPIOA, GPIOA_BUTTON))
// TestThread(&SD2);
if (palReadPad(GPIOA, GPIOA_BUTTON))
TestThread(&SD1);
chThdSleepMilliseconds(500);
}
}

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@ -66,3 +66,17 @@
#define STM32_RTCSEL STM32_RTCSEL_LSI
#define STM32_USB_CLOCK_REQUIRED TRUE
#define STM32_USBPRE STM32_USBPRE_DIV1P5
/*
* SERIAL driver system settings.
*/
#define STM32_SERIAL_USE_USART1 TRUE
#define STM32_SERIAL_USE_USART2 FALSE
#define STM32_SERIAL_USE_USART3 FALSE
#define STM32_SERIAL_USE_UART4 FALSE
#define STM32_SERIAL_USE_UART5 FALSE
#define STM32_SERIAL_USART1_PRIORITY 12
#define STM32_SERIAL_USART2_PRIORITY 12
#define STM32_SERIAL_USART3_PRIORITY 12
#define STM32_SERIAL_UART4_PRIORITY 12
#define STM32_SERIAL_UART5_PRIORITY 12

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@ -93,10 +93,7 @@ static void usart_init(SerialDriver *sdp, const SerialConfig *config) {
USART_TypeDef *u = sdp->usart;
/* Baud rate setting.*/
if (sdp->usart == USART1)
u->BRR = STM32_USART1CLK / config->sc_speed;
else
u->BRR = STM32_PCLK / config->sc_speed;
u->BRR = sdp->clock / config->sc_speed;
/* Note that some bits are enforced.*/
u->CR2 = config->sc_cr2 | USART_CR2_LBDIE;
@ -373,26 +370,31 @@ void sd_lld_init(void) {
#if STM32_SERIAL_USE_USART1
sdObjectInit(&SD1, NULL, notify1);
SD1.usart = USART1;
SD1.clock = STM32_USART1CLK;
#endif
#if STM32_SERIAL_USE_USART2
sdObjectInit(&SD2, NULL, notify2);
SD2.usart = USART2;
SD1.clock = STM32_USART2CLK;
#endif
#if STM32_SERIAL_USE_USART3
sdObjectInit(&SD3, NULL, notify3);
SD3.usart = USART3;
SD1.clock = STM32_USART3CLK;
#endif
#if STM32_SERIAL_USE_UART4
sdObjectInit(&SD4, NULL, notify4);
SD4.usart = UART4;
SD1.clock = STM32_UART4CLK;
#endif
#if STM32_SERIAL_USE_UART5
sdObjectInit(&SD5, NULL, notify5);
SD5.usart = UART5;
SD1.clock = STM32_UART5CLK;
#endif
#if STM32_SERIAL_USE_USART6

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@ -252,7 +252,9 @@ typedef struct {
uint8_t ob[SERIAL_BUFFERS_SIZE]; \
/* End of the mandatory fields.*/ \
/* Pointer to the USART registers block.*/ \
USART_TypeDef *usart;
USART_TypeDef *usart; \
/* Clock frequency for this USART.*/ \
uint32_t clock;
/*===========================================================================*/
/* Driver macros. */

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@ -926,6 +926,11 @@
#error "invalid source selected for USART1 clock"
#endif
/**
* @brief USART2 frequency.
*/
#define STM32_USART2CLK STM32_PCLK
/**
* @brief Timers clock.
*/

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@ -196,6 +196,10 @@ void stm32_clock_init(void) {
/* SYSCFG clock enabled here because it is a multi-functional unit shared
among multiple drivers.*/
rccEnableAPB2(RCC_APB2ENR_SYSCFGEN, TRUE);
/* USB IRQ relocated to not conflict with CAN.*/
SYSCFG->CFGR1 |= SYSCFG_CFGR1_USB_IT_RMP;
#endif /* !STM32_NO_INIT */
}

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@ -1287,8 +1287,8 @@ typedef uint32_t halrtcnt_t;
/*===========================================================================*/
/* STM32 ISR, DMA and RCC helpers.*/
/*#include "stm32_isr.h"
#include "stm32_dma.h"*/
#include "stm32_isr.h"
/*#include "stm32_dma.h"*/
#include "stm32_rcc.h"
#ifdef __cplusplus

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@ -6,4 +6,5 @@ PLATFORMSRC = ${CHIBIOS}/os/hal/platforms/STM32F3xx/hal_lld.c \
# Required include directories
PLATFORMINC = ${CHIBIOS}/os/hal/platforms/STM32F3xx \
${CHIBIOS}/os/hal/platforms/STM32 \
${CHIBIOS}/os/hal/platforms/STM32/GPIOv2
${CHIBIOS}/os/hal/platforms/STM32/GPIOv2 \
${CHIBIOS}/os/hal/platforms/STM32/USARTv2

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@ -0,0 +1,119 @@
/*
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
2011,2012 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/**
* @file STM32F3xx/stm32_isr.h
* @brief ISR remapper driver header.
*
* @addtogroup STM32F3xx_ISR
* @{
*/
#ifndef _STM32_ISR_H_
#define _STM32_ISR_H_
/*===========================================================================*/
/* Driver constants. */
/*===========================================================================*/
/**
* @name ISR names and numbers remapping
* @{
*/
/*
* CAN units.
*/
#define STM32_CAN1_TX_HANDLER Vector8C
#define STM32_CAN1_RX0_HANDLER Vector90
#define STM32_CAN1_RX1_HANDLER Vector94
#define STM32_CAN1_SCE_HANDLER Vector98
#define STM32_CAN1_TX_NUMBER 19
#define STM32_CAN1_RX0_NUMBER 20
#define STM32_CAN1_RX1_NUMBER 21
#define STM32_CAN1_SCE_NUMBER 22
/*
* TIM units.
*/
#define STM32_TIM1_UP_HANDLER VectorA4
#define STM32_TIM1_CC_HANDLER VectorAC
#define STM32_TIM2_HANDLER VectorB0
#define STM32_TIM3_HANDLER VectorB4
#define STM32_TIM4_HANDLER VectorB8
#define STM32_TIM8_UP_HANDLER VectorF0
#define STM32_TIM8_CC_HANDLER VectorF8
#define STM32_TIM1_UP_NUMBER 25
#define STM32_TIM1_CC_NUMBER 27
#define STM32_TIM2_NUMBER 28
#define STM32_TIM3_NUMBER 29
#define STM32_TIM4_NUMBER 30
#define STM32_TIM8_UP_NUMBER 44
#define STM32_TIM8_CC_NUMBER 46
/*
* USART units.
*/
#define STM32_USART1_HANDLER VectorD4
#define STM32_USART2_HANDLER VectorD8
#define STM32_USART3_HANDLER VectorDC
#define STM32_UART4_HANDLER Vector110
#define STM32_UART5_HANDLER Vector114
#define STM32_USART1_NUMBER 37
#define STM32_USART2_NUMBER 38
#define STM32_USART3_NUMBER 39
#define STM32_UART4_NUMBER 52
#define STM32_UART5_NUMBER 53
/*
* USB units.
*/
#define STM32_USB1_HP_HANDLER Vector168
#define STM32_USB1_LP_HANDLER Vector16C
#define STM32_USB1_HP_NUMBER 74
#define STM32_USB1_LP_NUMBER 75
/** @} */
/*===========================================================================*/
/* Driver pre-compile time settings. */
/*===========================================================================*/
/*===========================================================================*/
/* Derived constants and error checks. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver data structures and types. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver macros. */
/*===========================================================================*/
/*===========================================================================*/
/* External declarations. */
/*===========================================================================*/
#endif /* _STM32_ISR_H_ */
/** @} */