From d773c280f9c5d6f574aef1a9c9afe26432cb61d7 Mon Sep 17 00:00:00 2001 From: Giovanni Di Sirio Date: Wed, 3 Nov 2021 12:22:27 +0000 Subject: [PATCH] Startup file for STM32H7xx-M4. Added check for cache invalidation, it is done only for the M7. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@15003 27425a3e-05d8-49a3-a47f-9c15f0e5edd8 --- .../compilers/GCC/mk/startup_stm32h7xx_m4.mk | 18 ++++ .../ARMCMx/devices/STM32H7xx-M4/cmparams.h | 94 +++++++++++++++++++ os/hal/ports/STM32/STM32H7xx/hal_lld.c | 2 + 3 files changed, 114 insertions(+) create mode 100644 os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32h7xx_m4.mk create mode 100644 os/common/startup/ARMCMx/devices/STM32H7xx-M4/cmparams.h diff --git a/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32h7xx_m4.mk b/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32h7xx_m4.mk new file mode 100644 index 000000000..6224491ef --- /dev/null +++ b/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32h7xx_m4.mk @@ -0,0 +1,18 @@ +# List of the ChibiOS generic STM32H7xx startup and CMSIS files. +STARTUPSRC = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt1.c + +STARTUPASM = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt0_v7m.S \ + $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/vectors.S + +STARTUPINC = $(CHIBIOS)/os/common/portability/GCC \ + $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC \ + $(CHIBIOS)/os/common/startup/ARMCMx/devices/STM32H7xx-M4 \ + $(CHIBIOS)/os/common/ext/ARM/CMSIS/Core/Include \ + $(CHIBIOS)/os/common/ext/ST/STM32H7xx + +STARTUPLD = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/ld + +# Shared variables +ALLXASMSRC += $(STARTUPASM) +ALLCSRC += $(STARTUPSRC) +ALLINC += $(STARTUPINC) diff --git a/os/common/startup/ARMCMx/devices/STM32H7xx-M4/cmparams.h b/os/common/startup/ARMCMx/devices/STM32H7xx-M4/cmparams.h new file mode 100644 index 000000000..e4bf90c8c --- /dev/null +++ b/os/common/startup/ARMCMx/devices/STM32H7xx-M4/cmparams.h @@ -0,0 +1,94 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file STM32H7xx/cmparams.h + * @brief ARM Cortex-M7 parameters for the STM32F4xx. + * + * @defgroup ARMCMx_STM32H7xx STM32H7xx Specific Parameters + * @ingroup ARMCMx_SPECIFIC + * @details This file contains the Cortex-M7 specific parameters for the + * STM32H7xx platform. + * @{ + */ + +#ifndef CMPARAMS_H +#define CMPARAMS_H + +/** + * @brief Cortex core model. + */ +#define CORTEX_MODEL 4 + +/** + * @brief Floating Point unit presence. + */ +#define CORTEX_HAS_FPU 1 + +/** + * @brief Number of bits in priority masks. + */ +#define CORTEX_PRIORITY_BITS 4 + +/* If the device type is not externally defined, for example from the Makefile, + then a file named board.h is included. This file must contain a device + definition compatible with the vendor include file.*/ +#if !defined(STM32H742xx) && !defined(STM32H750xx) && \ + !defined(STM32H743xx) && !defined(STM32H753xx) && \ + !defined(STM32H747xx) && !defined(STM32H757xx) && \ + !defined(STM32H745xx) && !defined(STM32H755xx) && \ + !defined(STM32H7B0xx) && !defined(STM32H7B0xxQ) && \ + !defined(STM32H7A3xx) && !defined(STM32H7A3xxQ) && \ + !defined(STM32H7B3xx) && !defined(STM32H7B3xxQ) +#include "board.h" +#endif + +/** + * @brief Number of interrupt vectors. + * @note This number does not include the 16 system vectors and must be + * rounded to a multiple of 8. + */ +#define CORTEX_NUM_VECTORS 152 + +/* The following code is not processed when the file is included from an + asm module.*/ +#if !defined(_FROM_ASM_) + +/* Including the device CMSIS header. Note, we are not using the definitions + from this header because we need this file to be usable also from + assembler source files. We verify that the info matches instead.*/ +#include "stm32h7xx.h" + +/*lint -save -e9029 [10.4] Signedness comes from external files, it is + unpredictable but gives no problems.*/ +#if CORTEX_MODEL != __CORTEX_M +#error "CMSIS __CORTEX_M mismatch" +#endif + +#if CORTEX_HAS_FPU != __FPU_PRESENT +#error "CMSIS __FPU_PRESENT mismatch" +#endif + +#if CORTEX_PRIORITY_BITS != __NVIC_PRIO_BITS +#error "CMSIS __NVIC_PRIO_BITS mismatch" +#endif +/*lint -restore*/ + +#endif /* !defined(_FROM_ASM_) */ + +#endif /* CMPARAMS_H */ + +/** @} */ diff --git a/os/hal/ports/STM32/STM32H7xx/hal_lld.c b/os/hal/ports/STM32/STM32H7xx/hal_lld.c index aa5f8a7e2..8050686be 100644 --- a/os/hal/ports/STM32/STM32H7xx/hal_lld.c +++ b/os/hal/ports/STM32/STM32H7xx/hal_lld.c @@ -195,9 +195,11 @@ void hal_lld_init(void) { MPU_RASR_ENABLE); mpuEnable(MPU_CTRL_PRIVDEFENA); +#if STM32_TARGET_CORE == 1 /* Invalidating data cache to make sure that the MPU settings are taken immediately.*/ SCB_CleanInvalidateDCache(); +#endif } #endif }