diff --git a/os/hal/ports/STM32/STM32H7xx/stm32_rcc.h b/os/hal/ports/STM32/STM32H7xx/stm32_rcc.h
index 2a6852a39..4f3ad3d2b 100644
--- a/os/hal/ports/STM32/STM32H7xx/stm32_rcc.h
+++ b/os/hal/ports/STM32/STM32H7xx/stm32_rcc.h
@@ -901,27 +901,27 @@
  * @{
  */
 /**
- * @brief   Enables the USB1_OTG_HS peripheral clock.
+ * @brief   Enables the USB1_OTG_FS peripheral clock.
  *
  * @param[in] lp        low power enable flag
  *
  * @api
  */
-#define rccEnableUSB1_OTG_HS(lp) rccEnableAHB1(RCC_AHB1ENR_USB1OTGHSEN, lp)
+#define rccEnableUSB1_OTG_FS(lp) rccEnableAHB1(RCC_AHB1ENR_USB2OTGFSEN, lp)
 
 /**
- * @brief   Disables the USB1_OTG_HS peripheral clock.
+ * @brief   Disables the USB1_OTG_FS peripheral clock.
  *
  * @api
  */
-#define rccDisableUSB1_OTG_HS() rccDisableAHB1(RCC_AHB1ENR_USB1OTGHSEN)
+#define rccDisableUSB1_OTG_FS() rccDisableAHB1(RCC_AHB1ENR_USB2OTGFSEN)
 
 /**
- * @brief   Resets the USB1_OTG_HS peripheral.
+ * @brief   Resets the USB1_OTG_FS peripheral.
  *
  * @api
  */
-#define rccResetUSB1_OTG_HS() rccResetAHB1(RCC_AHB1RSTR_USB1OTGHSRST)
+#define rccResetUSB1_OTG_FS() rccResetAHB1(RCC_AHB1RSTR_USB2OTGFSRST)
 
 /**
  * @brief   Enables the USB2_OTG_HS peripheral clock.