From d9c9a2ccc39f635e2f57821551c42e16d7e940e7 Mon Sep 17 00:00:00 2001 From: Giovanni Di Sirio Date: Fri, 6 Mar 2020 13:39:00 +0000 Subject: [PATCH] FDCAN driver prototype, to be reviewed. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@13392 27425a3e-05d8-49a3-a47f-9c15f0e5edd8 --- .../RT-STM32H755ZI-NUCLEO144/cfg/mcuconf.h | 6 +-- os/hal/include/hal_can.h | 2 +- os/hal/ports/STM32/LLD/FDCANv1/hal_can_lld.c | 31 ++++++++++++++- os/hal/ports/STM32/LLD/FDCANv1/hal_can_lld.h | 35 ++++++++++++++++- .../ports/STM32/LLD/FDCANv1/stm32_fdcan1.inc | 38 ++++--------------- 5 files changed, 73 insertions(+), 39 deletions(-) diff --git a/demos/STM32/RT-STM32H755ZI-NUCLEO144/cfg/mcuconf.h b/demos/STM32/RT-STM32H755ZI-NUCLEO144/cfg/mcuconf.h index 070e5d0c7..1883980f9 100644 --- a/demos/STM32/RT-STM32H755ZI-NUCLEO144/cfg/mcuconf.h +++ b/demos/STM32/RT-STM32H755ZI-NUCLEO144/cfg/mcuconf.h @@ -184,10 +184,8 @@ #define STM32_IRQ_EXTI19_PRIORITY 6 #define STM32_IRQ_EXTI20_21_PRIORITY 6 -#define STM32_IRQ_FDCAN1_IT0_PRIORITY 10 -#define STM32_IRQ_FDCAN1_IT1_PRIORITY 10 -#define STM32_IRQ_FDCAN2_IT0_PRIORITY 10 -#define STM32_IRQ_FDCAN2_IT1_PRIORITY 10 +#define STM32_IRQ_FDCAN1_PRIORITY 10 +#define STM32_IRQ_FDCAN2_PRIORITY 10 #define STM32_IRQ_MDMA_PRIORITY 9 diff --git a/os/hal/include/hal_can.h b/os/hal/include/hal_can.h index a743c2f6f..baf5b5676 100644 --- a/os/hal/include/hal_can.h +++ b/os/hal/include/hal_can.h @@ -166,7 +166,7 @@ typedef enum { } /** - * @brief Error event. + * @brief Wakeup event. */ #define _can_wakeup_isr(canp) { \ osalSysLockFromISR(); \ diff --git a/os/hal/ports/STM32/LLD/FDCANv1/hal_can_lld.c b/os/hal/ports/STM32/LLD/FDCANv1/hal_can_lld.c index 680dd30bf..af8cfa86a 100644 --- a/os/hal/ports/STM32/LLD/FDCANv1/hal_can_lld.c +++ b/os/hal/ports/STM32/LLD/FDCANv1/hal_can_lld.c @@ -72,7 +72,7 @@ /* TX Event FIFO Start Address.*/ #define SRAMCAN_TEFSA ((uint32_t)(SRAMCAN_RBSA + \ - (STM32_FDCAN_TEF_NBR * SRAMCAN_RB_SIZE))) + (STM32_FDCAN_RB_NBR * SRAMCAN_RB_SIZE))) /* TX Buffers Start Address.*/ #define SRAMCAN_TBSA ((uint32_t)(SRAMCAN_TEFSA + \ @@ -489,7 +489,36 @@ void can_lld_wakeup(CANDriver *canp) { * @notapi */ void can_lld_serve_interrupt(CANDriver *canp) { + uint32_t ir; + /* Getting and clearing active IRQs.*/ + ir = canp->fdcan->IR; + canp->fdcan->IR = ir; + + /* RX events.*/ + if ((ir & FDCAN_IR_RF0N) != 0U) { + /* Disabling this source until the queue is emptied.*/ + canp->fdcan->IE &= ~FDCAN_IE_RF0NE; + _can_rx_full_isr(canp, CAN_MAILBOX_TO_MASK(1U)); + } + if ((ir & FDCAN_IR_RF1N) != 0U) { + /* Disabling this source until the queue is emptied.*/ + canp->fdcan->IE &= ~FDCAN_IE_RF1NE; + _can_rx_full_isr(canp, CAN_MAILBOX_TO_MASK(2U)); + } + + /* Overflow events.*/ + if ((ir & FDCAN_IR_RF0N) != 0U) { + _can_error_isr(canp, CAN_OVERFLOW_ERROR); + } + + /* TX events.*/ + if ((ir & FDCAN_IR_TC) != 0U) { + eventflags_t flags = 0U; + + flags |= 1U; + _can_tx_empty_isr(canp, flags); + } } /** @} */ diff --git a/os/hal/ports/STM32/LLD/FDCANv1/hal_can_lld.h b/os/hal/ports/STM32/LLD/FDCANv1/hal_can_lld.h index 7887276ea..789665d33 100644 --- a/os/hal/ports/STM32/LLD/FDCANv1/hal_can_lld.h +++ b/os/hal/ports/STM32/LLD/FDCANv1/hal_can_lld.h @@ -95,6 +95,38 @@ #error "CAN driver activated but no FDCAN peripheral assigned" #endif +#if !defined(STM32_FDCAN_FLS_NBR) +#error "STM32_FDCAN_FLS_NBR not defined in registry" +#endif + +#if !defined(STM32_FDCAN_FLE_NBR) +#error "STM32_FDCAN_FLE_NBR not defined in registry" +#endif + +#if !defined(STM32_FDCAN_RF0_NBR) +#error "STM32_FDCAN_RF0_NBR not defined in registry" +#endif + +#if !defined(STM32_FDCAN_RF1_NBR) +#error "STM32_FDCAN_RF1_NBR not defined in registry" +#endif + +#if !defined(STM32_FDCAN_RB_NBR) +#error "STM32_FDCAN_RB_NBR not defined in registry" +#endif + +#if !defined(STM32_FDCAN_TEF_NBR) +#error "STM32_FDCAN_TEF_NBR not defined in registry" +#endif + +#if !defined(STM32_FDCAN_TB_NBR) +#error "STM32_FDCAN_TB_NBR not defined in registry" +#endif + +#if !defined(STM32_FDCAN_TM_NBR) +#error "STM32_FDCAN_TM_NBR not defined in registry" +#endif + /*===========================================================================*/ /* Driver data structures and types. */ /*===========================================================================*/ @@ -406,8 +438,7 @@ extern "C" { void can_lld_sleep(CANDriver *canp); void can_lld_wakeup(CANDriver *canp); #endif /* CAN_USE_SLEEP_MODE */ - void can_lld_serve_interrupt0(CANDriver *canp); - void can_lld_serve_interrupt1(CANDriver *canp); + void can_lld_serve_interrupt(CANDriver *canp); #ifdef __cplusplus } #endif diff --git a/os/hal/ports/STM32/LLD/FDCANv1/stm32_fdcan1.inc b/os/hal/ports/STM32/LLD/FDCANv1/stm32_fdcan1.inc index ce277f77f..4f6fd3754 100644 --- a/os/hal/ports/STM32/LLD/FDCANv1/stm32_fdcan1.inc +++ b/os/hal/ports/STM32/LLD/FDCANv1/stm32_fdcan1.inc @@ -38,20 +38,12 @@ #if STM32_HAS_FDCAN1 /* Priority settings checks.*/ -#if !defined(STM32_IRQ_FDCAN1_IT0_PRIORITY) -#error "STM32_IRQ_FDCAN1_IT0_PRIORITY not defined in mcuconf.h" +#if !defined(STM32_IRQ_FDCAN1_PRIORITY) +#error "STM32_IRQ_FDCAN1_PRIORITY not defined in mcuconf.h" #endif -#if !defined(STM32_IRQ_FDCAN1_IT1_PRIORITY) -#error "STM32_IRQ_FDCAN1_IT1_PRIORITY not defined in mcuconf.h" -#endif - -#if !OSAL_IRQ_IS_VALID_PRIORITY(STM32_IRQ_FDCAN1_IT0_PRIORITY) -#error "Invalid IRQ priority assigned to STM32_IRQ_FDCAN1_IT0_PRIORITY" -#endif - -#if !OSAL_IRQ_IS_VALID_PRIORITY(STM32_IRQ_FDCAN1_IT1_PRIORITY) -#error "Invalid IRQ priority assigned to STM32_IRQ_FDCAN1_IT1_PRIORITY" +#if !OSAL_IRQ_IS_VALID_PRIORITY(STM32_IRQ_FDCAN1_PRIORITY) +#error "Invalid IRQ priority assigned to STM32_IRQ_FDCAN1_PRIORITY" #endif #endif /* STM32_HAS_FDCAN1 */ @@ -77,15 +69,13 @@ static inline void fdcan1_irq_init(void) { #if STM32_FDCAN1_IS_USED - nvicEnableVector(STM32_FDCAN1_IT0_NUMBER, STM32_IRQ_FDCAN1_IT0_PRIORITY); - nvicEnableVector(STM32_FDCAN1_IT1_NUMBER, STM32_IRQ_FDCAN1_IT1_PRIORITY); + nvicEnableVector(STM32_FDCAN1_IT0_NUMBER, STM32_IRQ_FDCAN1_PRIORITY); #endif } static inline void fdcan1_irq_deinit(void) { #if STM32_FDCAN1_IS_USED nvicDisableVector(STM32_FDCAN1_IT0_NUMBER); - nvicDisableVector(STM32_FDCAN1_IT1_NUMBER); #endif } @@ -95,7 +85,7 @@ static inline void fdcan1_irq_deinit(void) { #if STM32_FDCAN1_IS_USED|| defined(__DOXYGEN__) /** - * @brief FDCAN1 interrupt 0 handler. + * @brief FDCAN1 interrupt handler. * * @isr */ @@ -103,21 +93,7 @@ OSAL_IRQ_HANDLER(STM32_FDCAN1_IT0_HANDLER) { OSAL_IRQ_PROLOGUE(); - can_lld_serve_interrupt0(&CAND1); - - OSAL_IRQ_EPILOGUE(); -} -/** - * - * @brief FDCAN1 interrupt 1 handler. - * - * @isr - */ -OSAL_IRQ_HANDLER(STM32_FDCAN1_IT1_HANDLER) { - - OSAL_IRQ_PROLOGUE(); - - can_lld_serve_interrupt1(&CAND1); + can_lld_serve_interrupt(&CAND1); OSAL_IRQ_EPILOGUE(); }