STM32 port files modified to use the new ST header.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@1063 35acf78f-673a-0410-8e92-d51de3d6d3f4
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@ -27,78 +27,72 @@
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#include <ch.h>
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#include <ch.h>
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#include <pal.h>
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#include <pal.h>
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#if defined(STM32F10X_LD)
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#define APB2_RST_MASK (RCC_APB2RSTR_IOPARST | RCC_APB2RSTR_IOPBRST | \
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RCC_APB2RSTR_IOPCRST | RCC_APB2RSTR_IOPDRST | \
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RCC_APB2RSTR_AFIORST)
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#define APB2_EN_MASK (RCC_APB2ENR_IOPAEN | RCC_APB2ENR_IOPBEN | \
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RCC_APB2ENR_IOPCEN | RCC_APB2ENR_IOPDEN | \
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RCC_APB2ENR_AFIOEN)
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#elif defined(STM32F10X_HD)
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#define APB2_RST_MASK (RCC_APB2RSTR_IOPARST | RCC_APB2RSTR_IOPBRST | \
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RCC_APB2RSTR_IOPCRST | RCC_APB2RSTR_IOPDRST | \
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RCC_APB2RSTR_IOPERST | RCC_APB2RSTR_IOPFRST | \
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RCC_APB2RSTR_IOPGRST | RCC_APB2RSTR_AFIORST);
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#define APB2_EN_MASK (RCC_APB2ENR_IOPAEN | RCC_APB2ENR_IOPBEN | \
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RCC_APB2ENR_IOPCEN | RCC_APB2ENR_IOPDEN | \
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RCC_APB2ENR_IOPEEN | RCC_APB2ENR_IOPFEN | \
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RCC_APB2ENR_IOPGEN | RCC_APB2ENR_AFIOEN)
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#else
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/* Defaults on Medium Density devices.*/
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#define APB2_RST_MASK (RCC_APB2RSTR_IOPARST | RCC_APB2RSTR_IOPBRST | \
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RCC_APB2RSTR_IOPCRST | RCC_APB2RSTR_IOPDRST | \
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RCC_APB2RSTR_IOPERST | RCC_APB2RSTR_AFIORST);
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#define APB2_EN_MASK (RCC_APB2ENR_IOPAEN | RCC_APB2ENR_IOPBEN | \
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RCC_APB2ENR_IOPCEN | RCC_APB2ENR_IOPDEN | \
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RCC_APB2ENR_IOPEEN | RCC_APB2ENR_AFIOEN)
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#endif
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/**
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/**
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* @brief STM32 I/O ports configuration.
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* @brief STM32 I/O ports configuration.
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* @details Ports A-D clocks enabled, AFIO clock enabled.
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* @details Ports A-D(E, F, G) clocks enabled, AFIO clock enabled.
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*
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*
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* @param[in] config the STM32 ports configuration
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* @param[in] config the STM32 ports configuration
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*/
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*/
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void _pal_lld_init(const STM32GPIOConfig *config) {
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void _pal_lld_init(const STM32GPIOConfig *config) {
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uint32_t clocks = RCC_APB2ENR_AFIOEN;
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#if defined(_GPIOA)
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/*
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clocks |= RCC_APB2ENR_IOPAEN;
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* Enables the GPIO related clocks.
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#endif
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*/
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#if defined(_GPIOB)
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RCC->APB2ENR |= APB2_EN_MASK;
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clocks |= RCC_APB2ENR_IOPBEN;
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#endif
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#if defined(_GPIOC)
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clocks |= RCC_APB2ENR_IOPCEN;
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#endif
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#if defined(_GPIOD)
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clocks |= RCC_APB2ENR_IOPDEN;
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#endif
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#if defined(_GPIOE)
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clocks |= RCC_APB2ENR_IOPEEN;
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#endif
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RCC->APB2ENR |= clocks;
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/*
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/*
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* Resets the GPIO ports and AFIO.
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* Resets the GPIO ports and AFIO.
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*/
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*/
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RCC->APB2RSTR = RCC_APB2RSTR_IOPARST | RCC_APB2RSTR_IOPBRST |
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RCC->APB2RSTR = APB2_RST_MASK;
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RCC_APB2RSTR_IOPCRST | RCC_APB2RSTR_IOPDRST |
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RCC_APB2RSTR_IOPERST | RCC_APB2RSTR_IOPFRST |
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RCC_APB2RSTR_IOPGRST | RCC_APB2RSTR_AFIORST;
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RCC->APB2RSTR = 0;
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RCC->APB2RSTR = 0;
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#if defined(_GPIOA)
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IOPORT_A->ODR = config->PAData.odr;
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IOPORT_A->ODR = config->PAData.odr;
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IOPORT_A->CRH = config->PAData.crh;
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IOPORT_A->CRH = config->PAData.crh;
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IOPORT_A->CRL = config->PAData.crl;
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IOPORT_A->CRL = config->PAData.crl;
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#endif
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#if defined(_GPIOB)
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IOPORT_B->ODR = config->PBData.odr;
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IOPORT_B->ODR = config->PBData.odr;
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IOPORT_B->CRH = config->PBData.crh;
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IOPORT_B->CRH = config->PBData.crh;
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IOPORT_B->CRL = config->PBData.crl;
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IOPORT_B->CRL = config->PBData.crl;
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#endif
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#if defined(_GPIOC)
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IOPORT_C->ODR = config->PCData.odr;
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IOPORT_C->ODR = config->PCData.odr;
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IOPORT_C->CRH = config->PCData.crh;
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IOPORT_C->CRH = config->PCData.crh;
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IOPORT_C->CRL = config->PCData.crl;
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IOPORT_C->CRL = config->PCData.crl;
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#endif
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#if defined(_GPIOD)
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IOPORT_D->ODR = config->PDData.odr;
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IOPORT_D->ODR = config->PDData.odr;
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IOPORT_D->CRH = config->PDData.crh;
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IOPORT_D->CRH = config->PDData.crh;
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IOPORT_D->CRL = config->PDData.crl;
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IOPORT_D->CRL = config->PDData.crl;
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#endif
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#if !defined(STM32F10X_LD) || defined(__DOXYGEN__)
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#if defined(_GPIOE)
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IOPORT_E->ODR = config->PEData.odr;
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IOPORT_E->ODR = config->PEData.odr;
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IOPORT_E->CRH = config->PEData.crh;
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IOPORT_E->CRH = config->PEData.crh;
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IOPORT_E->CRL = config->PEData.crl;
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IOPORT_E->CRL = config->PEData.crl;
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#endif
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#endif
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#if defined(STM32F10X_HD) || defined(__DOXYGEN__)
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#if defined(_GPIOF)
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IOPORT_F->ODR = config->PFData.odr;
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IOPORT_F->ODR = config->PFData.odr;
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IOPORT_F->CRH = config->PFData.crh;
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IOPORT_F->CRH = config->PFData.crh;
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IOPORT_F->CRL = config->PFData.crl;
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IOPORT_F->CRL = config->PFData.crl;
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#endif
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#if defined(_GPIOG)
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IOPORT_G->ODR = config->PGData.odr;
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IOPORT_G->ODR = config->PGData.odr;
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IOPORT_G->CRH = config->PGData.crh;
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IOPORT_G->CRH = config->PGData.crh;
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IOPORT_G->CRL = config->PGData.crl;
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IOPORT_G->CRL = config->PGData.crl;
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* Tricks required to make the TRUE/FALSE declaration inside the library
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* Tricks required to make the TRUE/FALSE declaration inside the library
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* compatible.
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* compatible.
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*/
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*/
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#ifndef __STM32F10x_MAP_H
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#ifndef __STM32F10x_H
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#undef FALSE
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#undef FALSE
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#undef TRUE
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#undef TRUE
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#include "stm32f10x_map.h"
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#include <stm32f10x.h>
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#define FALSE 0
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#define FALSE 0
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#define TRUE (!FALSE)
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#define TRUE (!FALSE)
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#endif
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#endif
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@ -63,31 +63,21 @@ typedef struct {
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* or whole ports can be reprogrammed at later time.
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* or whole ports can be reprogrammed at later time.
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*/
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*/
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typedef struct {
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typedef struct {
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#if defined(_GPIOA) || defined(__DOXYGEN__)
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/** @brief Port A setup data.*/
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/** @brief Port A setup data.*/
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stm32_gpio_setup_t PAData;
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stm32_gpio_setup_t PAData;
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#endif
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#if defined(_GPIOB) || defined(__DOXYGEN__)
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/** @brief Port B setup data.*/
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/** @brief Port B setup data.*/
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stm32_gpio_setup_t PBData;
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stm32_gpio_setup_t PBData;
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#endif
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#if defined(_GPIOC) || defined(__DOXYGEN__)
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/** @brief Port C setup data.*/
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/** @brief Port C setup data.*/
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stm32_gpio_setup_t PCData;
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stm32_gpio_setup_t PCData;
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#endif
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#if defined(_GPIOD) || defined(__DOXYGEN__)
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/** @brief Port D setup data.*/
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/** @brief Port D setup data.*/
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stm32_gpio_setup_t PDData;
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stm32_gpio_setup_t PDData;
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#endif
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#if !defined(STM32F10X_LD) || defined(__DOXYGEN__)
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#if defined(_GPIOE) || defined(__DOXYGEN__)
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/** @brief Port E setup data.*/
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/** @brief Port E setup data.*/
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stm32_gpio_setup_t PEData;
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stm32_gpio_setup_t PEData;
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#endif
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#endif
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#if defined(_GPIOF) || defined(__DOXYGEN__)
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#if defined(STM32F10X_HD) || defined(__DOXYGEN__)
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/** @brief Port F setup data.*/
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/** @brief Port F setup data.*/
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stm32_gpio_setup_t PFData;
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stm32_gpio_setup_t PFData;
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#endif
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#if defined(_GPIOG) || defined(__DOXYGEN__)
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/** @brief Port G setup data.*/
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/** @brief Port G setup data.*/
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stm32_gpio_setup_t PGData;
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stm32_gpio_setup_t PGData;
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#endif
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#endif
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@ -126,49 +116,39 @@ typedef GPIO_TypeDef * ioportid_t;
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/**
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/**
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* @brief GPIO port A identifier.
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* @brief GPIO port A identifier.
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*/
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*/
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#if defined(_GPIOA) || defined(__DOXYGEN__)
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#define IOPORT_A GPIOA
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#define IOPORT_A GPIOA
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#endif
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/**
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/**
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* @brief GPIO port B identifier.
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* @brief GPIO port B identifier.
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*/
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*/
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#if defined(_GPIOB) || defined(__DOXYGEN__)
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#define IOPORT_B GPIOB
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#define IOPORT_B GPIOB
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#endif
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/**
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/**
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* @brief GPIO port C identifier.
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* @brief GPIO port C identifier.
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*/
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*/
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#if defined(_GPIOC) || defined(__DOXYGEN__)
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#define IOPORT_C GPIOC
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#define IOPORT_C GPIOC
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#endif
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/**
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/**
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* @brief GPIO port D identifier.
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* @brief GPIO port D identifier.
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*/
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*/
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#if defined(_GPIOD) || defined(__DOXYGEN__)
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#define IOPORT_D GPIOD
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#define IOPORT_D GPIOD
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#endif
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/**
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/**
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* @brief GPIO port E identifier.
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* @brief GPIO port E identifier.
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*/
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*/
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#if defined(_GPIOE) || defined(__DOXYGEN__)
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#if !defined(STM32F10X_LD) || defined(__DOXYGEN__)
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#define IOPORT_E GPIOE
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#define IOPORT_E GPIOE
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#endif
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#endif
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/**
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/**
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* @brief GPIO port F identifier.
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* @brief GPIO port F identifier.
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*/
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*/
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#if defined(_GPIOF) || defined(__DOXYGEN__)
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#if defined(STM32F10X_HD) || defined(__DOXYGEN__)
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#define IOPORT_F GPIOF
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#define IOPORT_F GPIOF
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#endif
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/**
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/**
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* @brief GPIO port G identifier.
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* @brief GPIO port G identifier.
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*/
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*/
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#if defined(_GPIOG) || defined(__DOXYGEN__)
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#define IOPORT_G GPIOG
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#define IOPORT_G GPIOG
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#endif
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#endif
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#include "board.h"
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#include "board.h"
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#include "nvic.h"
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#include "nvic.h"
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#include "stm32_serial.h"
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#include "stm32_serial.h"
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#include "stm32f10x_nvic.h"
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#if USE_STM32_USART1 || defined(__DOXYGEN__)
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#if USE_STM32_USART1 || defined(__DOXYGEN__)
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/** @brief USART1 serial driver identifier.*/
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/** @brief USART1 serial driver identifier.*/
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@ -198,7 +197,7 @@ void serial_init(uint32_t prio1, uint32_t prio2, uint32_t prio3) {
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usart_setup(USART1, DEFAULT_USART_BITRATE, 0,
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usart_setup(USART1, DEFAULT_USART_BITRATE, 0,
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USART_CR2_STOP1_BITS | USART_CR2_LINEN, 0);
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USART_CR2_STOP1_BITS | USART_CR2_LINEN, 0);
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GPIOA->CRH = (GPIOA->CRH & 0xFFFFF00F) | 0x000004B0;
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GPIOA->CRH = (GPIOA->CRH & 0xFFFFF00F) | 0x000004B0;
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NVICEnableVector(USART1_IRQChannel, prio1);
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NVICEnableVector(USART1_IRQn, prio1);
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#endif
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#endif
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#if USE_STM32_USART2
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#if USE_STM32_USART2
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usart_setup(USART2, DEFAULT_USART_BITRATE, 0,
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usart_setup(USART2, DEFAULT_USART_BITRATE, 0,
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USART_CR2_STOP1_BITS | USART_CR2_LINEN, 0);
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USART_CR2_STOP1_BITS | USART_CR2_LINEN, 0);
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GPIOA->CRL = (GPIOA->CRL & 0xFFFF00FF) | 0x00004B00;
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GPIOA->CRL = (GPIOA->CRL & 0xFFFF00FF) | 0x00004B00;
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NVICEnableVector(USART2_IRQChannel, prio2);
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NVICEnableVector(USART2_IRQn, prio2);
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#endif
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#endif
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#if USE_STM32_USART3
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#if USE_STM32_USART3
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usart_setup(USART3, DEFAULT_USART_BITRATE, 0,
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usart_setup(USART3, DEFAULT_USART_BITRATE, 0,
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USART_CR2_STOP1_BITS | USART_CR2_LINEN, 0);
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USART_CR2_STOP1_BITS | USART_CR2_LINEN, 0);
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GPIOB->CRH = (GPIOB->CRH & 0xFFFF00FF) | 0x00004B00;
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GPIOB->CRH = (GPIOB->CRH & 0xFFFF00FF) | 0x00004B00;
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NVICEnableVector(USART3_IRQChannel, prio3);
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NVICEnableVector(USART3_IRQn, prio3);
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#endif
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#endif
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}
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}
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@ -31,13 +31,13 @@
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* Tricks required to make the TRUE/FALSE declaration inside the library
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* Tricks required to make the TRUE/FALSE declaration inside the library
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* compatible.
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* compatible.
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*/
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*/
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#ifndef __STM32F10x_MAP_H
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//#ifndef __STM32F10x_MAP_H
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#undef FALSE
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//#undef FALSE
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#undef TRUE
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//#undef TRUE
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#include "stm32f10x_map.h"
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//#include "stm32f10x_map.h"
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#define FALSE 0
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//#define FALSE 0
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#define TRUE (!FALSE)
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//#define TRUE (!FALSE)
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#endif
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//#endif
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/**
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/**
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* @brief Serial buffers size.
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* @brief Serial buffers size.
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