andreika-git
/
ChibiOS
mirror of https://github.com/andreika-git/ChibiOS.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@16374 27425a3e-05d8-49a3-a47f-9c15f0e5edd8

This commit is contained in:
Giovanni Di Sirio 2023-08-12 08:53:10 +00:00
parent 3b00dbd47f
commit ddd162f77d
1 changed files with 15 additions and 8 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

23
os/hal/ports/STM32/STM32H5xx/hal_lld.c
View File

@ -278,9 +278,20 @@ __STATIC_INLINE void hal_lld_set_static_clocks(void) {
STM32_SDMMC1SEL | STM32_USBSEL | STM32_SDMMC1SEL | STM32_USBSEL |
STM32_SYSTICKSEL | STM32_OSPISEL; STM32_SYSTICKSEL | STM32_OSPISEL;
RCC->CCIPR5 = STM32_CKPERSEL | STM32_SAI2SEL | RCC->CCIPR5 = STM32_CKPERSEL | STM32_SAI2SEL |
STM32_SAI1SEL | STM32_FDCANSEL | STM32_SAI1SEL |
STM32_CECSEL | STM32_RNGSEL | #if STM32_FDCANSEL != STM32_FDCANSEL_IGNORE
STM32_DACSEL | STM32_ADCDACSEL; STM32_FDCANSEL |
#endif
#if STM32_CECSEL != STM32_CECSEL_IGNORE
STM32_CECSEL |
#endif
#if STM32_RNGSEL != STM32_RNGSEL_IGNORE
STM32_RNGSEL |
#endif
#if STM32_DACSEL != STM32_DACSEL_IGNORE
STM32_DACSEL |
#endif
STM32_ADCDACSEL;
} }
#if defined(HAL_LLD_USE_CLOCK_MANAGEMENT) || defined(__DOXYGEN__) #if defined(HAL_LLD_USE_CLOCK_MANAGEMENT) || defined(__DOXYGEN__)
@ -722,11 +733,7 @@ void stm32_clock_init(void) {
/* Static PWR configurations.*/ /* Static PWR configurations.*/
hal_lld_set_static_pwr(); hal_lld_set_static_pwr();
/* Additional PWR configurations.*/ /* PWR core voltage setup.*/
// PWR->CR2 = STM32_PWR_CR2;
// PWR->CR5 = STM32_CR5BITS;
/* Core voltage setup, backup domain made accessible.*/
PWR->VOSCR = STM32_PWR_VOSCR; PWR->VOSCR = STM32_PWR_VOSCR;
while ((PWR->VOSSR & PWR_VOSSR_ACTVOSRDY) == 0U) { while ((PWR->VOSSR & PWR_VOSSR_ACTVOSRDY) == 0U) {
/* Wait until regulator is stable.*/ /* Wait until regulator is stable.*/