From deca37741b1aa0ac4a2653ffe353871c2f912c60 Mon Sep 17 00:00:00 2001 From: Giovanni Di Sirio Date: Tue, 9 Jul 2019 08:03:08 +0000 Subject: [PATCH] EXTIv1 changes. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@12888 27425a3e-05d8-49a3-a47f-9c15f0e5edd8 --- demos/STM32/RT-STM32G071RB-NUCLEO64/Makefile | 2 +- .../RT-STM32G071RB-NUCLEO64/cfg/halconf.h | 2 +- .../RT-STM32G071RB-NUCLEO64/cfg/mcuconf.h | 4 +- os/hal/ports/STM32/LLD/EXTIv1/stm32_exti.c | 22 +++++--- os/hal/ports/STM32/LLD/EXTIv1/stm32_exti.h | 51 ++++++++++++++----- os/hal/ports/STM32/STM32G0xx/hal_lld.h | 6 +++ os/hal/ports/STM32/STM32G0xx/stm32_registry.h | 2 + 7 files changed, 67 insertions(+), 22 deletions(-) diff --git a/demos/STM32/RT-STM32G071RB-NUCLEO64/Makefile b/demos/STM32/RT-STM32G071RB-NUCLEO64/Makefile index c0f7f7db0..6a131091d 100644 --- a/demos/STM32/RT-STM32G071RB-NUCLEO64/Makefile +++ b/demos/STM32/RT-STM32G071RB-NUCLEO64/Makefile @@ -5,7 +5,7 @@ # Compiler options here. ifeq ($(USE_OPT),) - USE_OPT = -O0 -ggdb -fomit-frame-pointer -falign-functions=16 + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 endif # C specific options here (added to USE_OPT). diff --git a/demos/STM32/RT-STM32G071RB-NUCLEO64/cfg/halconf.h b/demos/STM32/RT-STM32G071RB-NUCLEO64/cfg/halconf.h index 757d5a99b..7d79fba37 100644 --- a/demos/STM32/RT-STM32G071RB-NUCLEO64/cfg/halconf.h +++ b/demos/STM32/RT-STM32G071RB-NUCLEO64/cfg/halconf.h @@ -191,7 +191,7 @@ * @brief Enables the WDG subsystem. */ #if !defined(HAL_USE_WDG) || defined(__DOXYGEN__) -#define HAL_USE_WDG FALSE +#define HAL_USE_WDG TRUE #endif /** diff --git a/demos/STM32/RT-STM32G071RB-NUCLEO64/cfg/mcuconf.h b/demos/STM32/RT-STM32G071RB-NUCLEO64/cfg/mcuconf.h index 1915123e1..c1529d7d0 100644 --- a/demos/STM32/RT-STM32G071RB-NUCLEO64/cfg/mcuconf.h +++ b/demos/STM32/RT-STM32G071RB-NUCLEO64/cfg/mcuconf.h @@ -44,7 +44,7 @@ #define STM32_HSIDIV_VALUE 1 #define STM32_HSI16_ENABLED TRUE #define STM32_HSE_ENABLED FALSE -#define STM32_LSI_ENABLED FALSE +#define STM32_LSI_ENABLED TRUE #define STM32_LSE_ENABLED FALSE #define STM32_SW STM32_SW_PLLRCLK #define STM32_PLLSRC STM32_PLLSRC_HSI16 @@ -208,6 +208,6 @@ /* * WDG driver system settings. */ -#define STM32_WDG_USE_IWDG FALSE +#define STM32_WDG_USE_IWDG TRUE #endif /* MCUCONF_H */ diff --git a/os/hal/ports/STM32/LLD/EXTIv1/stm32_exti.c b/os/hal/ports/STM32/LLD/EXTIv1/stm32_exti.c index e4952937a..af6ca909d 100644 --- a/os/hal/ports/STM32/LLD/EXTIv1/stm32_exti.c +++ b/os/hal/ports/STM32/LLD/EXTIv1/stm32_exti.c @@ -72,7 +72,12 @@ void extiEnableGroup1(uint32_t mask, extimode_t mode) { EXTI->EMR1 &= ~mask; EXTI->RTSR1 &= ~mask; EXTI->FTSR1 &= ~mask; +#if STM32_EXTI_TYPE == EXTI_TYPE_CLASSIC EXTI->PR1 = mask; +#else + EXTI->RPR1 = mask; + EXTI->FPR1 = mask; +#endif } else { /* Programming edge registers.*/ @@ -101,7 +106,7 @@ void extiEnableGroup1(uint32_t mask, extimode_t mode) { } } -#if (STM32_EXTI_NUM_LINES > 32) || defined(__DOXYGEN__) +#if (STM32_EXTI_HAS_GROUP2 == TRUE) || defined(__DOXYGEN__) /** * @brief STM32 EXTI group 2 lines initialization. * @@ -121,7 +126,12 @@ void extiEnableGroup2(uint32_t mask, extimode_t mode) { EXTI->EMR2 &= ~mask; EXTI->RTSR2 &= ~mask; EXTI->FTSR2 &= ~mask; +#if STM32_EXTI_TYPE == EXTI_TYPE_CLASSIC EXTI->PR2 = mask; +#else + EXTI->RPR2 = mask; + EXTI->FPR2 = mask; +#endif } else { /* Programming edge registers.*/ @@ -149,7 +159,7 @@ void extiEnableGroup2(uint32_t mask, extimode_t mode) { } } } -#endif /* STM32_EXTI_NUM_LINES > 32 */ +#endif /* STM32_EXTI_HAS_GROUP2 == TRUE */ /** * @brief STM32 EXTI line initialization. @@ -165,11 +175,11 @@ void extiEnableLine(extiline_t line, extimode_t mode) { osalDbgCheck(line < STM32_EXTI_NUM_LINES); osalDbgCheck((mode & ~EXTI_MODE_MASK) == 0U); -#if STM32_EXTI_NUM_LINES > 32 +#if STM32_EXTI_HAS_GROUP2 == TRUE if (line < 32) { #endif extiEnableGroup1(mask, mode); -#if STM32_EXTI_NUM_LINES > 32 +#if STM32_EXTI_HAS_GROUP2 == TRUE } else { extiEnableGroup2(mask, mode); @@ -189,11 +199,11 @@ void extiClearLine(extiline_t line) { osalDbgCheck(line < STM32_EXTI_NUM_LINES); -#if STM32_EXTI_NUM_LINES > 32 +#if STM32_EXTI_HAS_GROUP2 == TRUE if (line < 32) { #endif extiClearGroup1(mask); -#if STM32_EXTI_NUM_LINES > 32 +#if STM32_EXTI_HAS_GROUP2 == TRUE } else { extiClearGroup2(mask); diff --git a/os/hal/ports/STM32/LLD/EXTIv1/stm32_exti.h b/os/hal/ports/STM32/LLD/EXTIv1/stm32_exti.h index bba8e54a2..8834eb710 100644 --- a/os/hal/ports/STM32/LLD/EXTIv1/stm32_exti.h +++ b/os/hal/ports/STM32/LLD/EXTIv1/stm32_exti.h @@ -66,6 +66,25 @@ /* Driver pre-compile time settings. */ /*===========================================================================*/ +/*===========================================================================*/ +/* Derived constants and error checks. */ +/*===========================================================================*/ + +#if !defined(STM32_EXTI_NUM_LINES) +#error "STM32_EXTI_NUM_LINES not defined in registry" +#endif + +/* Checking for presence of bank 2 registers. If the definition is not + present in registry then it is iferred by the number of channels (which + is not an always-good method, see G0.*/ +#if !defined(STM32_EXTI_HAS_GROUP2) +#if STM32_EXTI_NUM_LINES <= 32 +#define STM32_EXTI_HAS_GROUP2 FALSE +#else +#define STM32_EXTI_HAS_GROUP2 TRUE +#endif +#endif /* !defined(STM32_EXTI_TYPE) */ + /* If not defined then it is a classic EXTI (without EXTICR and separate PR registers for raising and falling edges.*/ #if !defined(STM32_EXTI_TYPE) @@ -77,14 +96,6 @@ #error "invalid STM32_EXTI_TYPE" #endif -/*===========================================================================*/ -/* Derived constants and error checks. */ -/*===========================================================================*/ - -#if !defined(STM32_EXTI_NUM_LINES) -#error "STM32_EXTI_NUM_LINES not defined in registry" -#endif - #if (STM32_EXTI_NUM_LINES < 0) || (STM32_EXTI_NUM_LINES > 63) #error "invalid STM32_EXTI_NUM_LINES value" #endif @@ -138,12 +149,20 @@ typedef uint32_t extimode_t; * * @api */ +#if (STM32_EXTI_TYPE == EXTI_TYPE_CLASSIC) || defined(__DOXYGEN__) #define extiClearGroup1(mask) do { \ osalDbgAssert(((mask) & STM32_EXTI_IMR1_MASK) == 0U, "fixed lines"); \ EXTI->PR1 = (uint32_t)(mask); \ } while (false) +#else +#define extiClearGroup1(mask) do { \ + osalDbgAssert(((mask) & STM32_EXTI_IMR1_MASK) == 0U, "fixed lines"); \ + EXTI->RPR1 = (uint32_t)(mask); \ + EXTI->FPR1 = (uint32_t)(mask); \ +} while (false) +#endif -#if (STM32_EXTI_NUM_LINES > 32) || defined(__DOXYGEN__) +#if (STM32_EXTI_HAS_GROUP2 == TRUE) || defined(__DOXYGEN__) /** * @brief STM32 EXTI group 2 IRQ status clearing. * @@ -151,11 +170,19 @@ typedef uint32_t extimode_t; * * @api */ +#if (STM32_EXTI_TYPE == EXTI_TYPE_CLASSIC) || defined(__DOXYGEN__) #define extiClearGroup2(mask) do { \ osalDbgAssert(((mask) & STM32_EXTI_IMR2_MASK) == 0U, "fixed lines"); \ EXTI->PR2 = (uint32_t)(mask); \ } while (false) -#endif /* STM32_EXTI_NUM_LINES > 32 */ +#else +#define extiClearGroup2(mask) do { \ + osalDbgAssert(((mask) & STM32_EXTI_IMR2_MASK) == 0U, "fixed lines"); \ + EXTI->RPR2 = (uint32_t)(mask); \ + EXTI->FPR2 = (uint32_t)(mask); \ +} while (false) +#endif +#endif /* STM32_EXTI_HAS_GROUP2 == TRUE */ /*===========================================================================*/ /* External declarations. */ @@ -165,9 +192,9 @@ typedef uint32_t extimode_t; extern "C" { #endif void extiEnableGroup1(uint32_t mask, extimode_t mode); -#if (STM32_EXTI_NUM_LINES > 32) || defined(__DOXYGEN__) +#if (STM32_EXTI_HAS_GROUP2 == TRUE) || defined(__DOXYGEN__) void extiEnableGroup2(uint32_t mask, extimode_t mode); -#endif /* STM32_EXTI_NUM_LINES > 32 */ +#endif /* STM32_EXTI_HAS_GROUP2 == TRUE */ void extiEnableLine(extiline_t line, extimode_t mode); void extiClearLine(extiline_t line); #ifdef __cplusplus diff --git a/os/hal/ports/STM32/STM32G0xx/hal_lld.h b/os/hal/ports/STM32/STM32G0xx/hal_lld.h index 6f6eca04e..2329820da 100644 --- a/os/hal/ports/STM32/STM32G0xx/hal_lld.h +++ b/os/hal/ports/STM32/STM32G0xx/hal_lld.h @@ -1210,6 +1210,12 @@ #error "invalid STM32_PPRE value specified" #endif +/* + * Compatibility definitions. + */ +#define STM32_PCLK1 STM32_PCLK +#define STM32_PCLK2 STM32_PCLK + /* * APB frequency check. */ diff --git a/os/hal/ports/STM32/STM32G0xx/stm32_registry.h b/os/hal/ports/STM32/STM32G0xx/stm32_registry.h index ba97fb1e3..935724c6a 100644 --- a/os/hal/ports/STM32/STM32G0xx/stm32_registry.h +++ b/os/hal/ports/STM32/STM32G0xx/stm32_registry.h @@ -110,6 +110,7 @@ /* EXTI attributes.*/ #define STM32_EXTI_TYPE EXTI_TYPE_NEWG0 +#define STM32_EXTI_HAS_GROUP2 FALSE #define STM32_EXTI_NUM_LINES 16 #define STM32_EXTI_IMR1_MASK 0xFFF80000U @@ -305,6 +306,7 @@ /* EXTI attributes.*/ #define STM32_EXTI_TYPE EXTI_TYPE_NEWG0 +#define STM32_EXTI_HAS_GROUP2 FALSE #define STM32_EXTI_NUM_LINES 33 #define STM32_EXTI_IMR1_MASK 0xFFF80000U #define STM32_EXTI_IMR2_MASK 0xFFFFFFFFU