diff --git a/demos/STM32/RT-STM32L4R5ZI-NUCLEO144/cfg/mcuconf.h b/demos/STM32/RT-STM32L4R5ZI-NUCLEO144/cfg/mcuconf.h
index d02013549..bbbaf9972 100644
--- a/demos/STM32/RT-STM32L4R5ZI-NUCLEO144/cfg/mcuconf.h
+++ b/demos/STM32/RT-STM32L4R5ZI-NUCLEO144/cfg/mcuconf.h
@@ -249,6 +249,13 @@
 /*
  * SDC driver system settings.
  */
+#define STM32_SDC_USE_SDMMC1                FALSE
+#define STM32_SDC_SDMMC_UNALIGNED_SUPPORT   TRUE
+#define STM32_SDC_SDMMC_WRITE_TIMEOUT       1000000
+#define STM32_SDC_SDMMC_READ_TIMEOUT        1000000
+#define STM32_SDC_SDMMC_CLOCK_DELAY         10
+#define STM32_SDC_SDMMC_PWRSAV              TRUE
+#define STM32_SDC_SDMMC1_IRQ_PRIORITY       9
 
 /*
  * SERIAL driver system settings.
diff --git a/demos/STM32/RT-STM32L4R9-DISCOVERY/cfg/mcuconf.h b/demos/STM32/RT-STM32L4R9-DISCOVERY/cfg/mcuconf.h
index b2b14ad01..49124b683 100644
--- a/demos/STM32/RT-STM32L4R9-DISCOVERY/cfg/mcuconf.h
+++ b/demos/STM32/RT-STM32L4R9-DISCOVERY/cfg/mcuconf.h
@@ -249,6 +249,13 @@
 /*
  * SDC driver system settings.
  */
+#define STM32_SDC_USE_SDMMC1                FALSE
+#define STM32_SDC_SDMMC_UNALIGNED_SUPPORT   TRUE
+#define STM32_SDC_SDMMC_WRITE_TIMEOUT       1000000
+#define STM32_SDC_SDMMC_READ_TIMEOUT        1000000
+#define STM32_SDC_SDMMC_CLOCK_DELAY         10
+#define STM32_SDC_SDMMC_PWRSAV              TRUE
+#define STM32_SDC_SDMMC1_IRQ_PRIORITY       9
 
 /*
  * SERIAL driver system settings.
diff --git a/testhal/STM32/multi/ADC/cfg/stm32l4r5zi_nucleo144/mcuconf.h b/testhal/STM32/multi/ADC/cfg/stm32l4r5zi_nucleo144/mcuconf.h
index b0d857c2c..88c45ea24 100644
--- a/testhal/STM32/multi/ADC/cfg/stm32l4r5zi_nucleo144/mcuconf.h
+++ b/testhal/STM32/multi/ADC/cfg/stm32l4r5zi_nucleo144/mcuconf.h
@@ -249,6 +249,13 @@
 /*
  * SDC driver system settings.
  */
+#define STM32_SDC_USE_SDMMC1                FALSE
+#define STM32_SDC_SDMMC_UNALIGNED_SUPPORT   TRUE
+#define STM32_SDC_SDMMC_WRITE_TIMEOUT       1000000
+#define STM32_SDC_SDMMC_READ_TIMEOUT        1000000
+#define STM32_SDC_SDMMC_CLOCK_DELAY         10
+#define STM32_SDC_SDMMC_PWRSAV              TRUE
+#define STM32_SDC_SDMMC1_IRQ_PRIORITY       9
 
 /*
  * SERIAL driver system settings.
diff --git a/testhal/STM32/multi/DAC/cfg/stm32l4r5zi_nucleo144/mcuconf.h b/testhal/STM32/multi/DAC/cfg/stm32l4r5zi_nucleo144/mcuconf.h
index 0d89bb63a..e29e0417d 100644
--- a/testhal/STM32/multi/DAC/cfg/stm32l4r5zi_nucleo144/mcuconf.h
+++ b/testhal/STM32/multi/DAC/cfg/stm32l4r5zi_nucleo144/mcuconf.h
@@ -249,6 +249,13 @@
 /*
  * SDC driver system settings.
  */
+#define STM32_SDC_USE_SDMMC1                FALSE
+#define STM32_SDC_SDMMC_UNALIGNED_SUPPORT   TRUE
+#define STM32_SDC_SDMMC_WRITE_TIMEOUT       1000000
+#define STM32_SDC_SDMMC_READ_TIMEOUT        1000000
+#define STM32_SDC_SDMMC_CLOCK_DELAY         10
+#define STM32_SDC_SDMMC_PWRSAV              TRUE
+#define STM32_SDC_SDMMC1_IRQ_PRIORITY       9
 
 /*
  * SERIAL driver system settings.
diff --git a/testhal/STM32/multi/RTC/cfg/stm32l4r5_nucleo144/mcuconf.h b/testhal/STM32/multi/RTC/cfg/stm32l4r5_nucleo144/mcuconf.h
index d02013549..bbbaf9972 100644
--- a/testhal/STM32/multi/RTC/cfg/stm32l4r5_nucleo144/mcuconf.h
+++ b/testhal/STM32/multi/RTC/cfg/stm32l4r5_nucleo144/mcuconf.h
@@ -249,6 +249,13 @@
 /*
  * SDC driver system settings.
  */
+#define STM32_SDC_USE_SDMMC1                FALSE
+#define STM32_SDC_SDMMC_UNALIGNED_SUPPORT   TRUE
+#define STM32_SDC_SDMMC_WRITE_TIMEOUT       1000000
+#define STM32_SDC_SDMMC_READ_TIMEOUT        1000000
+#define STM32_SDC_SDMMC_CLOCK_DELAY         10
+#define STM32_SDC_SDMMC_PWRSAV              TRUE
+#define STM32_SDC_SDMMC1_IRQ_PRIORITY       9
 
 /*
  * SERIAL driver system settings.
diff --git a/testhal/STM32/multi/SPI/cfg/stm32l4r5_nucleo144/mcuconf.h b/testhal/STM32/multi/SPI/cfg/stm32l4r5_nucleo144/mcuconf.h
index d03bd044e..4f6ce9be1 100644
--- a/testhal/STM32/multi/SPI/cfg/stm32l4r5_nucleo144/mcuconf.h
+++ b/testhal/STM32/multi/SPI/cfg/stm32l4r5_nucleo144/mcuconf.h
@@ -249,6 +249,13 @@
 /*
  * SDC driver system settings.
  */
+#define STM32_SDC_USE_SDMMC1                FALSE
+#define STM32_SDC_SDMMC_UNALIGNED_SUPPORT   TRUE
+#define STM32_SDC_SDMMC_WRITE_TIMEOUT       1000000
+#define STM32_SDC_SDMMC_READ_TIMEOUT        1000000
+#define STM32_SDC_SDMMC_CLOCK_DELAY         10
+#define STM32_SDC_SDMMC_PWRSAV              TRUE
+#define STM32_SDC_SDMMC1_IRQ_PRIORITY       9
 
 /*
  * SERIAL driver system settings.
diff --git a/testhal/STM32/multi/SPI/cfg/stm32l4r9_discovery/mcuconf.h b/testhal/STM32/multi/SPI/cfg/stm32l4r9_discovery/mcuconf.h
index ff58bb958..385edf1a3 100644
--- a/testhal/STM32/multi/SPI/cfg/stm32l4r9_discovery/mcuconf.h
+++ b/testhal/STM32/multi/SPI/cfg/stm32l4r9_discovery/mcuconf.h
@@ -249,6 +249,13 @@
 /*
  * SDC driver system settings.
  */
+#define STM32_SDC_USE_SDMMC1                FALSE
+#define STM32_SDC_SDMMC_UNALIGNED_SUPPORT   TRUE
+#define STM32_SDC_SDMMC_WRITE_TIMEOUT       1000000
+#define STM32_SDC_SDMMC_READ_TIMEOUT        1000000
+#define STM32_SDC_SDMMC_CLOCK_DELAY         10
+#define STM32_SDC_SDMMC_PWRSAV              TRUE
+#define STM32_SDC_SDMMC1_IRQ_PRIORITY       9
 
 /*
  * SERIAL driver system settings.
diff --git a/testhal/STM32/multi/TRNG/cfg/stm32l4r5zi_nucleo144/mcuconf.h b/testhal/STM32/multi/TRNG/cfg/stm32l4r5zi_nucleo144/mcuconf.h
index dd3880004..1f65178f7 100644
--- a/testhal/STM32/multi/TRNG/cfg/stm32l4r5zi_nucleo144/mcuconf.h
+++ b/testhal/STM32/multi/TRNG/cfg/stm32l4r5zi_nucleo144/mcuconf.h
@@ -249,6 +249,13 @@
 /*
  * SDC driver system settings.
  */
+#define STM32_SDC_USE_SDMMC1                FALSE
+#define STM32_SDC_SDMMC_UNALIGNED_SUPPORT   TRUE
+#define STM32_SDC_SDMMC_WRITE_TIMEOUT       1000000
+#define STM32_SDC_SDMMC_READ_TIMEOUT        1000000
+#define STM32_SDC_SDMMC_CLOCK_DELAY         10
+#define STM32_SDC_SDMMC_PWRSAV              TRUE
+#define STM32_SDC_SDMMC1_IRQ_PRIORITY       9
 
 /*
  * SERIAL driver system settings.
diff --git a/testhal/STM32/multi/USB_CDC/cfg/stm32l4r5_nucleo144/mcuconf.h b/testhal/STM32/multi/USB_CDC/cfg/stm32l4r5_nucleo144/mcuconf.h
index 4b12a62e3..2524e8c47 100644
--- a/testhal/STM32/multi/USB_CDC/cfg/stm32l4r5_nucleo144/mcuconf.h
+++ b/testhal/STM32/multi/USB_CDC/cfg/stm32l4r5_nucleo144/mcuconf.h
@@ -249,6 +249,13 @@
 /*
  * SDC driver system settings.
  */
+#define STM32_SDC_USE_SDMMC1                FALSE
+#define STM32_SDC_SDMMC_UNALIGNED_SUPPORT   TRUE
+#define STM32_SDC_SDMMC_WRITE_TIMEOUT       1000000
+#define STM32_SDC_SDMMC_READ_TIMEOUT        1000000
+#define STM32_SDC_SDMMC_CLOCK_DELAY         10
+#define STM32_SDC_SDMMC_PWRSAV              TRUE
+#define STM32_SDC_SDMMC1_IRQ_PRIORITY       9
 
 /*
  * SERIAL driver system settings.
diff --git a/testhal/STM32/multi/WSPI-MFS/cfg/stm32l4r9_discovery/mcuconf.h b/testhal/STM32/multi/WSPI-MFS/cfg/stm32l4r9_discovery/mcuconf.h
index dc13344cf..e71bcc923 100644
--- a/testhal/STM32/multi/WSPI-MFS/cfg/stm32l4r9_discovery/mcuconf.h
+++ b/testhal/STM32/multi/WSPI-MFS/cfg/stm32l4r9_discovery/mcuconf.h
@@ -249,6 +249,13 @@
 /*
  * SDC driver system settings.
  */
+#define STM32_SDC_USE_SDMMC1                FALSE
+#define STM32_SDC_SDMMC_UNALIGNED_SUPPORT   TRUE
+#define STM32_SDC_SDMMC_WRITE_TIMEOUT       1000000
+#define STM32_SDC_SDMMC_READ_TIMEOUT        1000000
+#define STM32_SDC_SDMMC_CLOCK_DELAY         10
+#define STM32_SDC_SDMMC_PWRSAV              TRUE
+#define STM32_SDC_SDMMC1_IRQ_PRIORITY       9
 
 /*
  * SERIAL driver system settings.
diff --git a/tools/ftl/processors/conf/mcuconf_stm32l4rxxx/mcuconf.h.ftl b/tools/ftl/processors/conf/mcuconf_stm32l4rxxx/mcuconf.h.ftl
index 9b7ed639e..375dd3f6c 100644
--- a/tools/ftl/processors/conf/mcuconf_stm32l4rxxx/mcuconf.h.ftl
+++ b/tools/ftl/processors/conf/mcuconf_stm32l4rxxx/mcuconf.h.ftl
@@ -260,6 +260,13 @@
 /*
  * SDC driver system settings.
  */
+#define STM32_SDC_USE_SDMMC1                ${doc.STM32_SDC_USE_SDMMC1!"FALSE"}
+#define STM32_SDC_SDMMC_UNALIGNED_SUPPORT   ${doc.STM32_SDC_SDMMC_UNALIGNED_SUPPORT!"TRUE"}
+#define STM32_SDC_SDMMC_WRITE_TIMEOUT       ${doc.STM32_SDC_SDMMC_WRITE_TIMEOUT!"1000000"}
+#define STM32_SDC_SDMMC_READ_TIMEOUT        ${doc.STM32_SDC_SDMMC_READ_TIMEOUT!"1000000"}
+#define STM32_SDC_SDMMC_CLOCK_DELAY         ${doc.STM32_SDC_SDMMC_CLOCK_DELAY!"10"}
+#define STM32_SDC_SDMMC_PWRSAV              ${doc.STM32_SDC_SDMMC_PWRSAV!"TRUE"}
+#define STM32_SDC_SDMMC1_IRQ_PRIORITY       ${doc.STM32_SDC_SDMMC1_IRQ_PRIORITY!"9"}
 
 /*
  * SERIAL driver system settings.