andreika-git
/
ChibiOS
mirror of https://github.com/andreika-git/ChibiOS.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

INEMO and NUCLEO board files. 

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@6962 35acf78f-673a-0410-8e92-d51de3d6d3f4
This commit is contained in:
gdisirio 2014-05-25 15:55:46 +00:00
parent 8bdd0b9269
commit e1fe47b7f9
22 changed files with 7061 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

26
os/common/ports/ARMCMx/compilers/GCC/ld/STM32F030x8.ld Normal file
View File

@ -0,0 +1,26 @@
/*
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
/*
* STM32F030x8 memory setup.
*/
MEMORY
{
flash : org = 0x08000000, len = 64k
ram : org = 0x20000000, len = 8k
}
INCLUDE rules.ld

26
os/common/ports/ARMCMx/compilers/GCC/ld/STM32F401xC.ld Normal file
View File

@ -0,0 +1,26 @@
/*
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
/*
* STM32F401xC memory setup.
*/
MEMORY
{
flash : org = 0x08000000, len = 256k
ram : org = 0x20000000, len = 64k
}
INCLUDE rules.ld

26
os/common/ports/ARMCMx/compilers/GCC/ld/STM32L152xE.ld Normal file
View File

@ -0,0 +1,26 @@
/*
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
/*
* STM32L152xB memory setup.
*/
MEMORY
{
flash : org = 0x08000000, len = 512k
ram : org = 0x20000000, len = 80k
}
INCLUDE rules.ld

51
os/hal/boards/ST_INEMO_M1_DISCOVERY/board.c Normal file
View File

@ -0,0 +1,51 @@
/*
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
#include "hal.h"
/**
* @brief PAL setup.
* @details Digital I/O ports static configuration as defined in @p board.h.
* This variable is used by the HAL when initializing the PAL driver.
*/
#if HAL_USE_PAL || defined(__DOXYGEN__)
const PALConfig pal_default_config =
{
{VAL_GPIOAODR, VAL_GPIOACRL, VAL_GPIOACRH},
{VAL_GPIOBODR, VAL_GPIOBCRL, VAL_GPIOBCRH},
{VAL_GPIOCODR, VAL_GPIOCCRL, VAL_GPIOCCRH},
{VAL_GPIODODR, VAL_GPIODCRL, VAL_GPIODCRH},
{VAL_GPIOEODR, VAL_GPIOECRL, VAL_GPIOECRH},
{VAL_GPIOFODR, VAL_GPIOFCRL, VAL_GPIOFCRH},
{VAL_GPIOGODR, VAL_GPIOGCRL, VAL_GPIOGCRH},
};
#endif
/*
* Early initialization code.
* This initialization must be performed just after stack setup and before
* any other initialization.
*/
void __early_init(void) {
stm32_clock_init();
}
/*
* Board-specific initialization code.
*/
void boardInit(void) {
}

195
os/hal/boards/ST_INEMO_M1_DISCOVERY/board.h Normal file
View File

@ -0,0 +1,195 @@
/*
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
#ifndef _BOARD_H_
#define _BOARD_H_
/*
* Setup for the ST INEMO-M1 Discovery board.
*/
/*
* Board identifier.
*/
#define BOARD_ST_INEMO_M1_DISCOVERY
#define BOARD_NAME "STMicroelectronics INEMO-M1 Discovery"
/*
* Board frequencies.
*/
#define STM32_LSECLK 0
#define STM32_HSECLK 8000000
/*
* MCU type, supported types are defined in ./os/hal/platforms/hal_lld.h.
*/
#define STM32F10X_HD
/*
* IO pins assignments.
*/
#define GPIOA_PRESS_INT 0
#define GPIOA_LED_BLUE 1
#define GPIOA_PA2 2
#define GPIOA_PA3 3
#define GPIOA_PA4 4
#define GPIOA_PA5 5
#define GPIOA_PA6 6
#define GPIOA_PA7 7
#define GPIOA_USB_EN 9
#define GPIOA_BUTTON 10
#define GPIOA_USB_DM 11
#define GPIOA_USB_DP 12
#define GPIOA_SWDIO 13
#define GPIOA_SWCLK 14
#define GPIOB_SWO 3
#define GPIOB_I2C1_SCL 6
#define GPIOB_I2C1_SDA 7
#define GPIOB_PB8 8
#define GPIOB_PB9 9
#define GPIOB_I2C2_SCL 10
#define GPIOB_I2C2_SDA 11
#define GPIOB_SPI2_CS 12
#define GPIOB_SPI2_SCK 13
#define GPIOB_SPI2_MISO 14
#define GPIOB_SPI2_MOSI 15
#define GPIOC_GYRO_INT1 6
#define GPIOC_LMS_DRDY 7
#define GPIOC_LMS_INT1 8
#define GPIOC_GYRO_DRDY 9
#define GPIOD_LMS_INT2 2
/*
* I/O ports initial setup, this configuration is established soon after reset
* in the initialization code.
*
* The digits have the following meaning:
* 0 - Analog input.
* 1 - Push Pull output 10MHz.
* 2 - Push Pull output 2MHz.
* 3 - Push Pull output 50MHz.
* 4 - Digital input.
* 5 - Open Drain output 10MHz.
* 6 - Open Drain output 2MHz.
* 7 - Open Drain output 50MHz.
* 8 - Digital input with PullUp or PullDown resistor depending on ODR.
* 9 - Alternate Push Pull output 10MHz.
* A - Alternate Push Pull output 2MHz.
* B - Alternate Push Pull output 50MHz.
* C - Reserved.
* D - Alternate Open Drain output 10MHz.
* E - Alternate Open Drain output 2MHz.
* F - Alternate Open Drain output 50MHz.
* Please refer to the STM32 Reference Manual for details.
*/
/*
* Port A setup.
* Everything input with pull-up except:
* PA0 - Push Pull output (GPIOA_PRESS_INT).
* PA1 - Push Pull output (GPIOA_LED_BLUE).
* PA9 - Push Pull output (GPIOA_USB_EN).
* PA10 - Normal input (GPIOA_BUTTON).
* PA11 - Normal input (GPIOA_USB_DM).
* PA12 - Normal input (GPIOA_USB_DP).
* PA13 - Pull-up input (GPIOA_SWDIO).
* PA14 - Pull-down input (GPIOA_SWCLK).
*/
#define VAL_GPIOACRL 0x88888838 /* PA7...PA0 */
#define VAL_GPIOACRH 0x88844438 /* PA15...PA8 */
#define VAL_GPIOAODR 0xFFFFBDFD
/*
* Port B setup.
* Everything input with pull-up except:
* PB3 - Pull-up input (GPIOB_SWO).
* PB6,7 - Alternate open drain (I2C1).
* PB10,11 - Alternate open drain (I2C2).
* PB12 - Push Pull output (GPIOB_SPI2_CS).
* PB13 - Alternate output (GPIOB_SPI2_SCK).
* PB14 - Normal input (GPIOB_SPI2_MISO).
* PB15 - Alternate output (GPIOB_SPI2_MOSI).
*/
#define VAL_GPIOBCRL 0xEE888888 /* PB7...PB0 */
#define VAL_GPIOBCRH 0xB4B3EE88 /* PB15...PB8 */
#define VAL_GPIOBODR 0xFFFFFFFF
/*
* Port C setup.
* Everything input with pull-up except:
*/
#define VAL_GPIOCCRL 0x88888888 /* PC7...PC0 */
#define VAL_GPIOCCRH 0x88888888 /* PC15...PC8 */
#define VAL_GPIOCODR 0xFFFFFFFF
/*
* Port D setup.
* Everything input with pull-up except:
* PD0 - Normal input (XTAL).
* PD1 - Normal input (XTAL).
*/
#define VAL_GPIODCRL 0x88888844 /* PD7...PD0 */
#define VAL_GPIODCRH 0x88888888 /* PD15...PD8 */
#define VAL_GPIODODR 0xFFFFFFFF
/*
* Port E setup.
* Everything input with pull-up except:
*/
#define VAL_GPIOECRL 0x88888888 /* PE7...PE0 */
#define VAL_GPIOECRH 0x88888888 /* PE15...PE8 */
#define VAL_GPIOEODR 0xFFFFFFFF
/*
* Port F setup.
* Everything input with pull-up except:
*/
#define VAL_GPIOFCRL 0x88888888 /* PF7...PF0 */
#define VAL_GPIOFCRH 0x88888888 /* PF15...PF8 */
#define VAL_GPIOFODR 0xFFFFFFFF
/*
* Port G setup.
* Everything input with pull-up except:
*/
#define VAL_GPIOGCRL 0x88888888 /* PG7...PG0 */
#define VAL_GPIOGCRH 0x88888888 /* PG15...PG8 */
#define VAL_GPIOGODR 0xFFFFFFFF
/*
* USB bus activation macro, required by the USB driver.
*/
#define usb_lld_connect_bus(usbp) palSetPad(GPIOA, GPIOA_USB_EN)
/*
* USB bus de-activation macro, required by the USB driver.
*/
#define usb_lld_disconnect_bus(usbp) palClearPad(GPIOA, GPIOA_USB_EN)
#if !defined(_FROM_ASM_)
#ifdef __cplusplus
extern "C" {
#endif
void boardInit(void);
#ifdef __cplusplus
}
#endif
#endif /* _FROM_ASM_ */
#endif /* _BOARD_H_ */

5
os/hal/boards/ST_INEMO_M1_DISCOVERY/board.mk Normal file
View File

@ -0,0 +1,5 @@
# List of all the board related files.
BOARDSRC = ${CHIBIOS}/os/hal/boards/ST_INEMO_M1_DISCOVERY/board.c
# Required include directories
BOARDINC = ${CHIBIOS}/os/hal/boards/ST_INEMO_M1_DISCOVERY

77
os/hal/boards/ST_NUCLEO_F030R8/board.c Normal file
View File

@ -0,0 +1,77 @@
/*
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
#include "hal.h"
#if HAL_USE_PAL || defined(__DOXYGEN__)
/**
* @brief PAL setup.
* @details Digital I/O ports static configuration as defined in @p board.h.
* This variable is used by the HAL when initializing the PAL driver.
*/
const PALConfig pal_default_config =
{
{VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR,
VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH},
{VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR,
VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH},
{VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR,
VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH},
{VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR,
VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH},
{VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR,
VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH}
};
#endif
/**
* @brief Early initialization code.
* @details This initialization must be performed just after stack setup
* and before any other initialization.
*/
void __early_init(void) {
stm32_clock_init();
}
#if HAL_USE_MMC_SPI || defined(__DOXYGEN__)
/**
* @brief MMC_SPI card detection.
*/
bool mmc_lld_is_card_inserted(MMCDriver *mmcp) {
(void)mmcp;
/* TODO: Fill the implementation.*/
return TRUE;
}
/**
* @brief MMC_SPI card write protection detection.
*/
bool mmc_lld_is_write_protected(MMCDriver *mmcp) {
(void)mmcp;
/* TODO: Fill the implementation.*/
return FALSE;
}
#endif
/**
* @brief Board-specific initialization code.
* @todo Add your board-specific code, if any.
*/
void boardInit(void) {
}

757
os/hal/boards/ST_NUCLEO_F030R8/board.h Normal file
View File

@ -0,0 +1,757 @@
/*
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
#ifndef _BOARD_H_
#define _BOARD_H_
/*
* Setup for STMicroelectronics NUCLEO-F030R8 board.
*/
/*
* Board identifier.
*/
#define BOARD_ST_NUCLEO_F030R8
#define BOARD_NAME "STMicroelectronics NUCLEO-F030R8"
/*
* Board oscillators-related settings.
* NOTE: LSE not fitted.
* NOTE: HSE not fitted.
*/
#if !defined(STM32_LSECLK)
#define STM32_LSECLK 0
#endif
#define STM32_LSEDRV (3 << 3)
#if !defined(STM32_HSECLK)
#define STM32_HSECLK 0
#endif
#define STM32_HSE_BYPASS
/*
* MCU type as defined in the ST header.
*/
#define STM32F030
/*
* IO pins assignments.
*/
#define GPIOA_PIN0 0
#define GPIOA_PIN1 1
#define GPIOA_USART_TX 2
#define GPIOA_USART_RX 3
#define GPIOA_PIN4 4
#define GPIOA_LED_GREEN 5
#define GPIOA_PIN6 6
#define GPIOA_PIN7 7
#define GPIOA_PIN8 8
#define GPIOA_PIN9 9
#define GPIOA_PIN10 10
#define GPIOA_OTG_FS_DM 11
#define GPIOA_OTG_FS_DP 12
#define GPIOA_SWDIO 13
#define GPIOA_SWCLK 14
#define GPIOA_PIN15 15
#define GPIOB_PIN0 0
#define GPIOB_PIN1 1
#define GPIOB_PIN2 2
#define GPIOB_SWO 3
#define GPIOB_PIN4 4
#define GPIOB_PIN5 5
#define GPIOB_PIN6 6
#define GPIOB_PIN7 7
#define GPIOB_PIN8 8
#define GPIOB_PIN9 9
#define GPIOB_PIN10 10
#define GPIOB_PIN11 11
#define GPIOB_PIN12 12
#define GPIOB_PIN13 13
#define GPIOB_PIN14 14
#define GPIOB_PIN15 15
#define GPIOC_PIN0 0
#define GPIOC_PIN1 1
#define GPIOC_PIN2 2
#define GPIOC_PIN3 3
#define GPIOC_PIN4 4
#define GPIOC_PIN5 5
#define GPIOC_PIN6 6
#define GPIOC_PIN7 7
#define GPIOC_PIN8 8
#define GPIOC_PIN9 9
#define GPIOC_PIN10 10
#define GPIOC_PIN11 11
#define GPIOC_PIN12 12
#define GPIOC_BUTTON 13
#define GPIOC_PIN14 14
#define GPIOC_PIN15 15
#define GPIOD_PIN0 0
#define GPIOD_PIN1 1
#define GPIOD_PIN2 2
#define GPIOD_PIN3 3
#define GPIOD_PIN4 4
#define GPIOD_PIN5 5
#define GPIOD_PIN6 6
#define GPIOD_PIN7 7
#define GPIOD_PIN8 8
#define GPIOD_PIN9 9
#define GPIOD_PIN10 10
#define GPIOD_PIN11 11
#define GPIOD_PIN12 12
#define GPIOD_PIN13 13
#define GPIOD_PIN14 14
#define GPIOD_PIN15 15
#define GPIOF_OSC_IN 0
#define GPIOF_OSC_OUT 1
#define GPIOF_PIN2 2
#define GPIOF_PIN3 3
#define GPIOF_PIN4 4
#define GPIOF_PIN5 5
#define GPIOF_PIN6 6
#define GPIOF_PIN7 7
#define GPIOF_PIN8 8
#define GPIOF_PIN9 9
#define GPIOF_PIN10 10
#define GPIOF_PIN11 11
#define GPIOF_PIN12 12
#define GPIOF_PIN13 13
#define GPIOF_PIN14 14
#define GPIOF_PIN15 15
/*
* I/O ports initial setup, this configuration is established soon after reset
* in the initialization code.
* Please refer to the STM32 Reference Manual for details.
*/
#define PIN_MODE_INPUT(n) (0U << ((n) * 2))
#define PIN_MODE_OUTPUT(n) (1U << ((n) * 2))
#define PIN_MODE_ALTERNATE(n) (2U << ((n) * 2))
#define PIN_MODE_ANALOG(n) (3U << ((n) * 2))
#define PIN_ODR_LOW(n) (0U << (n))
#define PIN_ODR_HIGH(n) (1U << (n))
#define PIN_OTYPE_PUSHPULL(n) (0U << (n))
#define PIN_OTYPE_OPENDRAIN(n) (1U << (n))
#define PIN_OSPEED_2M(n) (0U << ((n) * 2))
#define PIN_OSPEED_10M(n) (1U << ((n) * 2))
#define PIN_OSPEED_40M(n) (3U << ((n) * 2))
#define PIN_PUPDR_FLOATING(n) (0U << ((n) * 2))
#define PIN_PUPDR_PULLUP(n) (1U << ((n) * 2))
#define PIN_PUPDR_PULLDOWN(n) (2U << ((n) * 2))
#define PIN_AFIO_AF(n, v) ((v##U) << ((n % 8) * 4))
/*
* GPIOA setup:
*
* PA0 - PIN0 (input pullup).
* PA1 - PIN1 (input pullup).
* PA2 - USART_TX (alternate 1).
* PA3 - USART_RX (alternate 1).
* PA4 - PIN4 (input pullup).
* PA5 - LED_GREEN (output pushpull high).
* PA6 - PIN6 (input pullup).
* PA7 - PIN7 (input pullup).
* PA8 - PIN8 (input pullup).
* PA9 - PIN9 (input pullup).
* PA10 - PIN10 (input pullup).
* PA11 - OTG_FS_DM (alternate 10).
* PA12 - OTG_FS_DP (alternate 10).
* PA13 - SWDIO (alternate 0).
* PA14 - SWCLK (alternate 0).
* PA15 - PIN15 (input pullup).
*/
#define VAL_GPIOA_MODER (PIN_MODE_INPUT(GPIOA_PIN0) | \
PIN_MODE_INPUT(GPIOA_PIN1) | \
PIN_MODE_ALTERNATE(GPIOA_USART_TX) | \
PIN_MODE_ALTERNATE(GPIOA_USART_RX) | \
PIN_MODE_INPUT(GPIOA_PIN4) | \
PIN_MODE_OUTPUT(GPIOA_LED_GREEN) | \
PIN_MODE_INPUT(GPIOA_PIN6) | \
PIN_MODE_INPUT(GPIOA_PIN7) | \
PIN_MODE_INPUT(GPIOA_PIN8) | \
PIN_MODE_INPUT(GPIOA_PIN9) | \
PIN_MODE_INPUT(GPIOA_PIN10) | \
PIN_MODE_ALTERNATE(GPIOA_OTG_FS_DM) | \
PIN_MODE_ALTERNATE(GPIOA_OTG_FS_DP) | \
PIN_MODE_ALTERNATE(GPIOA_SWDIO) | \
PIN_MODE_ALTERNATE(GPIOA_SWCLK) | \
PIN_MODE_INPUT(GPIOA_PIN15))
#define VAL_GPIOA_OTYPER (PIN_OTYPE_PUSHPULL(GPIOA_PIN0) | \
PIN_OTYPE_PUSHPULL(GPIOA_PIN1) | \
PIN_OTYPE_PUSHPULL(GPIOA_USART_TX) | \
PIN_OTYPE_PUSHPULL(GPIOA_USART_RX) | \
PIN_OTYPE_PUSHPULL(GPIOA_PIN4) | \
PIN_OTYPE_PUSHPULL(GPIOA_LED_GREEN) | \
PIN_OTYPE_PUSHPULL(GPIOA_PIN6) | \
PIN_OTYPE_PUSHPULL(GPIOA_PIN7) | \
PIN_OTYPE_PUSHPULL(GPIOA_PIN8) | \
PIN_OTYPE_PUSHPULL(GPIOA_PIN9) | \
PIN_OTYPE_PUSHPULL(GPIOA_PIN10) | \
PIN_OTYPE_PUSHPULL(GPIOA_OTG_FS_DM) | \
PIN_OTYPE_PUSHPULL(GPIOA_OTG_FS_DP) | \
PIN_OTYPE_PUSHPULL(GPIOA_SWDIO) | \
PIN_OTYPE_PUSHPULL(GPIOA_SWCLK) | \
PIN_OTYPE_PUSHPULL(GPIOA_PIN15))
#define VAL_GPIOA_OSPEEDR (PIN_OSPEED_40M(GPIOA_PIN0) | \
PIN_OSPEED_40M(GPIOA_PIN1) | \
PIN_OSPEED_10M(GPIOA_USART_TX) | \
PIN_OSPEED_10M(GPIOA_USART_RX) | \
PIN_OSPEED_40M(GPIOA_PIN4) | \
PIN_OSPEED_10M(GPIOA_LED_GREEN) | \
PIN_OSPEED_40M(GPIOA_PIN6) | \
PIN_OSPEED_40M(GPIOA_PIN7) | \
PIN_OSPEED_40M(GPIOA_PIN8) | \
PIN_OSPEED_40M(GPIOA_PIN9) | \
PIN_OSPEED_40M(GPIOA_PIN10) | \
PIN_OSPEED_40M(GPIOA_OTG_FS_DM) | \
PIN_OSPEED_40M(GPIOA_OTG_FS_DP) | \
PIN_OSPEED_40M(GPIOA_SWDIO) | \
PIN_OSPEED_40M(GPIOA_SWCLK) | \
PIN_OSPEED_40M(GPIOA_PIN15))
#define VAL_GPIOA_PUPDR (PIN_PUPDR_PULLUP(GPIOA_PIN0) | \
PIN_PUPDR_PULLUP(GPIOA_PIN1) | \
PIN_PUPDR_FLOATING(GPIOA_USART_TX) | \
PIN_PUPDR_FLOATING(GPIOA_USART_RX) | \
PIN_PUPDR_PULLUP(GPIOA_PIN4) | \
PIN_PUPDR_FLOATING(GPIOA_LED_GREEN) | \
PIN_PUPDR_PULLUP(GPIOA_PIN6) | \
PIN_PUPDR_PULLUP(GPIOA_PIN7) | \
PIN_PUPDR_PULLUP(GPIOA_PIN8) | \
PIN_PUPDR_PULLUP(GPIOA_PIN9) | \
PIN_PUPDR_PULLUP(GPIOA_PIN10) | \
PIN_PUPDR_FLOATING(GPIOA_OTG_FS_DM) | \
PIN_PUPDR_FLOATING(GPIOA_OTG_FS_DP) | \
PIN_PUPDR_PULLUP(GPIOA_SWDIO) | \
PIN_PUPDR_PULLDOWN(GPIOA_SWCLK) | \
PIN_PUPDR_PULLUP(GPIOA_PIN15))
#define VAL_GPIOA_ODR (PIN_ODR_HIGH(GPIOA_PIN0) | \
PIN_ODR_HIGH(GPIOA_PIN1) | \
PIN_ODR_HIGH(GPIOA_USART_TX) | \
PIN_ODR_HIGH(GPIOA_USART_RX) | \
PIN_ODR_HIGH(GPIOA_PIN4) | \
PIN_ODR_LOW(GPIOA_LED_GREEN) | \
PIN_ODR_HIGH(GPIOA_PIN6) | \
PIN_ODR_HIGH(GPIOA_PIN7) | \
PIN_ODR_HIGH(GPIOA_PIN8) | \
PIN_ODR_HIGH(GPIOA_PIN9) | \
PIN_ODR_HIGH(GPIOA_PIN10) | \
PIN_ODR_HIGH(GPIOA_OTG_FS_DM) | \
PIN_ODR_HIGH(GPIOA_OTG_FS_DP) | \
PIN_ODR_HIGH(GPIOA_SWDIO) | \
PIN_ODR_HIGH(GPIOA_SWCLK) | \
PIN_ODR_HIGH(GPIOA_PIN15))
#define VAL_GPIOA_AFRL (PIN_AFIO_AF(GPIOA_PIN0, 0) | \
PIN_AFIO_AF(GPIOA_PIN1, 0) | \
PIN_AFIO_AF(GPIOA_USART_TX, 1) | \
PIN_AFIO_AF(GPIOA_USART_RX, 1) | \
PIN_AFIO_AF(GPIOA_PIN4, 0) | \
PIN_AFIO_AF(GPIOA_LED_GREEN, 0) | \
PIN_AFIO_AF(GPIOA_PIN6, 0) | \
PIN_AFIO_AF(GPIOA_PIN7, 0))
#define VAL_GPIOA_AFRH (PIN_AFIO_AF(GPIOA_PIN8, 0) | \
PIN_AFIO_AF(GPIOA_PIN9, 0) | \
PIN_AFIO_AF(GPIOA_PIN10, 0) | \
PIN_AFIO_AF(GPIOA_OTG_FS_DM, 10) | \
PIN_AFIO_AF(GPIOA_OTG_FS_DP, 10) | \
PIN_AFIO_AF(GPIOA_SWDIO, 0) | \
PIN_AFIO_AF(GPIOA_SWCLK, 0) | \
PIN_AFIO_AF(GPIOA_PIN15, 0))
/*
* GPIOB setup:
*
* PB0 - PIN0 (input pullup).
* PB1 - PIN1 (input pullup).
* PB2 - PIN2 (input pullup).
* PB3 - SWO (alternate 0).
* PB4 - PIN4 (input pullup).
* PB5 - PIN5 (input pullup).
* PB6 - PIN6 (input pullup).
* PB7 - PIN7 (input pullup).
* PB8 - PIN8 (input pullup).
* PB9 - PIN9 (input pullup).
* PB10 - PIN10 (input pullup).
* PB11 - PIN11 (input pullup).
* PB12 - PIN12 (input pullup).
* PB13 - PIN13 (input pullup).
* PB14 - PIN14 (input pullup).
* PB15 - PIN15 (input pullup).
*/
#define VAL_GPIOB_MODER (PIN_MODE_INPUT(GPIOB_PIN0) | \
PIN_MODE_INPUT(GPIOB_PIN1) | \
PIN_MODE_INPUT(GPIOB_PIN2) | \
PIN_MODE_ALTERNATE(GPIOB_SWO) | \
PIN_MODE_INPUT(GPIOB_PIN4) | \
PIN_MODE_INPUT(GPIOB_PIN5) | \
PIN_MODE_INPUT(GPIOB_PIN6) | \
PIN_MODE_INPUT(GPIOB_PIN7) | \
PIN_MODE_INPUT(GPIOB_PIN8) | \
PIN_MODE_INPUT(GPIOB_PIN9) | \
PIN_MODE_INPUT(GPIOB_PIN10) | \
PIN_MODE_INPUT(GPIOB_PIN11) | \
PIN_MODE_INPUT(GPIOB_PIN12) | \
PIN_MODE_INPUT(GPIOB_PIN13) | \
PIN_MODE_INPUT(GPIOB_PIN14) | \
PIN_MODE_INPUT(GPIOB_PIN15))
#define VAL_GPIOB_OTYPER (PIN_OTYPE_PUSHPULL(GPIOB_PIN0) | \
PIN_OTYPE_PUSHPULL(GPIOB_PIN1) | \
PIN_OTYPE_PUSHPULL(GPIOB_PIN2) | \
PIN_OTYPE_PUSHPULL(GPIOB_SWO) | \
PIN_OTYPE_PUSHPULL(GPIOB_PIN4) | \
PIN_OTYPE_PUSHPULL(GPIOB_PIN5) | \
PIN_OTYPE_PUSHPULL(GPIOB_PIN6) | \
PIN_OTYPE_PUSHPULL(GPIOB_PIN7) | \
PIN_OTYPE_PUSHPULL(GPIOB_PIN8) | \
PIN_OTYPE_PUSHPULL(GPIOB_PIN9) | \
PIN_OTYPE_PUSHPULL(GPIOB_PIN10) | \
PIN_OTYPE_PUSHPULL(GPIOB_PIN11) | \
PIN_OTYPE_PUSHPULL(GPIOB_PIN12) | \
PIN_OTYPE_PUSHPULL(GPIOB_PIN13) | \
PIN_OTYPE_PUSHPULL(GPIOB_PIN14) | \
PIN_OTYPE_PUSHPULL(GPIOB_PIN15))
#define VAL_GPIOB_OSPEEDR (PIN_OSPEED_40M(GPIOB_PIN0) | \
PIN_OSPEED_40M(GPIOB_PIN1) | \
PIN_OSPEED_40M(GPIOB_PIN2) | \
PIN_OSPEED_40M(GPIOB_SWO) | \
PIN_OSPEED_40M(GPIOB_PIN4) | \
PIN_OSPEED_40M(GPIOB_PIN5) | \
PIN_OSPEED_40M(GPIOB_PIN6) | \
PIN_OSPEED_40M(GPIOB_PIN7) | \
PIN_OSPEED_40M(GPIOB_PIN8) | \
PIN_OSPEED_40M(GPIOB_PIN9) | \
PIN_OSPEED_40M(GPIOB_PIN10) | \
PIN_OSPEED_40M(GPIOB_PIN11) | \
PIN_OSPEED_40M(GPIOB_PIN12) | \
PIN_OSPEED_40M(GPIOB_PIN13) | \
PIN_OSPEED_40M(GPIOB_PIN14) | \
PIN_OSPEED_40M(GPIOB_PIN15))
#define VAL_GPIOB_PUPDR (PIN_PUPDR_PULLUP(GPIOB_PIN0) | \
PIN_PUPDR_PULLUP(GPIOB_PIN1) | \
PIN_PUPDR_PULLUP(GPIOB_PIN2) | \
PIN_PUPDR_PULLUP(GPIOB_SWO) | \
PIN_PUPDR_PULLUP(GPIOB_PIN4) | \
PIN_PUPDR_PULLUP(GPIOB_PIN5) | \
PIN_PUPDR_PULLUP(GPIOB_PIN6) | \
PIN_PUPDR_PULLUP(GPIOB_PIN7) | \
PIN_PUPDR_PULLUP(GPIOB_PIN8) | \
PIN_PUPDR_PULLUP(GPIOB_PIN9) | \
PIN_PUPDR_PULLUP(GPIOB_PIN10) | \
PIN_PUPDR_PULLUP(GPIOB_PIN11) | \
PIN_PUPDR_PULLUP(GPIOB_PIN12) | \
PIN_PUPDR_PULLUP(GPIOB_PIN13) | \
PIN_PUPDR_PULLUP(GPIOB_PIN14) | \
PIN_PUPDR_PULLUP(GPIOB_PIN15))
#define VAL_GPIOB_ODR (PIN_ODR_HIGH(GPIOB_PIN0) | \
PIN_ODR_HIGH(GPIOB_PIN1) | \
PIN_ODR_HIGH(GPIOB_PIN2) | \
PIN_ODR_HIGH(GPIOB_SWO) | \
PIN_ODR_HIGH(GPIOB_PIN4) | \
PIN_ODR_HIGH(GPIOB_PIN5) | \
PIN_ODR_HIGH(GPIOB_PIN6) | \
PIN_ODR_HIGH(GPIOB_PIN7) | \
PIN_ODR_HIGH(GPIOB_PIN8) | \
PIN_ODR_HIGH(GPIOB_PIN9) | \
PIN_ODR_HIGH(GPIOB_PIN10) | \
PIN_ODR_HIGH(GPIOB_PIN11) | \
PIN_ODR_HIGH(GPIOB_PIN12) | \
PIN_ODR_HIGH(GPIOB_PIN13) | \
PIN_ODR_HIGH(GPIOB_PIN14) | \
PIN_ODR_HIGH(GPIOB_PIN15))
#define VAL_GPIOB_AFRL (PIN_AFIO_AF(GPIOB_PIN0, 0) | \
PIN_AFIO_AF(GPIOB_PIN1, 0) | \
PIN_AFIO_AF(GPIOB_PIN2, 0) | \
PIN_AFIO_AF(GPIOB_SWO, 0) | \
PIN_AFIO_AF(GPIOB_PIN4, 0) | \
PIN_AFIO_AF(GPIOB_PIN5, 0) | \
PIN_AFIO_AF(GPIOB_PIN6, 0) | \
PIN_AFIO_AF(GPIOB_PIN7, 0))
#define VAL_GPIOB_AFRH (PIN_AFIO_AF(GPIOB_PIN8, 0) | \
PIN_AFIO_AF(GPIOB_PIN9, 0) | \
PIN_AFIO_AF(GPIOB_PIN10, 0) | \
PIN_AFIO_AF(GPIOB_PIN11, 0) | \
PIN_AFIO_AF(GPIOB_PIN12, 0) | \
PIN_AFIO_AF(GPIOB_PIN13, 0) | \
PIN_AFIO_AF(GPIOB_PIN14, 0) | \
PIN_AFIO_AF(GPIOB_PIN15, 0))
/*
* GPIOC setup:
*
* PC0 - PIN0 (input pullup).
* PC1 - PIN1 (input pullup).
* PC2 - PIN2 (input pullup).
* PC3 - PIN3 (input pullup).
* PC4 - PIN4 (input pullup).
* PC5 - PIN5 (input pullup).
* PC6 - PIN6 (input pullup).
* PC7 - PIN7 (input pullup).
* PC8 - PIN8 (input pullup).
* PC9 - PIN9 (input pullup).
* PC10 - PIN10 (input pullup).
* PC11 - PIN11 (input pullup).
* PC12 - PIN12 (input pullup).
* PC13 - BUTTON (input floating).
* PC14 - PIN14 (input pullup).
* PC15 - PIN15 (input pullup).
*/
#define VAL_GPIOC_MODER (PIN_MODE_INPUT(GPIOC_PIN0) | \
PIN_MODE_INPUT(GPIOC_PIN1) | \
PIN_MODE_INPUT(GPIOC_PIN2) | \
PIN_MODE_INPUT(GPIOC_PIN3) | \
PIN_MODE_INPUT(GPIOC_PIN4) | \
PIN_MODE_INPUT(GPIOC_PIN5) | \
PIN_MODE_INPUT(GPIOC_PIN6) | \
PIN_MODE_INPUT(GPIOC_PIN7) | \
PIN_MODE_INPUT(GPIOC_PIN8) | \
PIN_MODE_INPUT(GPIOC_PIN9) | \
PIN_MODE_INPUT(GPIOC_PIN10) | \
PIN_MODE_INPUT(GPIOC_PIN11) | \
PIN_MODE_INPUT(GPIOC_PIN12) | \
PIN_MODE_INPUT(GPIOC_BUTTON) | \
PIN_MODE_INPUT(GPIOC_PIN14) | \
PIN_MODE_INPUT(GPIOC_PIN15))
#define VAL_GPIOC_OTYPER (PIN_OTYPE_PUSHPULL(GPIOC_PIN0) | \
PIN_OTYPE_PUSHPULL(GPIOC_PIN1) | \
PIN_OTYPE_PUSHPULL(GPIOC_PIN2) | \
PIN_OTYPE_PUSHPULL(GPIOC_PIN3) | \
PIN_OTYPE_PUSHPULL(GPIOC_PIN4) | \
PIN_OTYPE_PUSHPULL(GPIOC_PIN5) | \
PIN_OTYPE_PUSHPULL(GPIOC_PIN6) | \
PIN_OTYPE_PUSHPULL(GPIOC_PIN7) | \
PIN_OTYPE_PUSHPULL(GPIOC_PIN8) | \
PIN_OTYPE_PUSHPULL(GPIOC_PIN9) | \
PIN_OTYPE_PUSHPULL(GPIOC_PIN10) | \
PIN_OTYPE_PUSHPULL(GPIOC_PIN11) | \
PIN_OTYPE_PUSHPULL(GPIOC_PIN12) | \
PIN_OTYPE_PUSHPULL(GPIOC_BUTTON) | \
PIN_OTYPE_PUSHPULL(GPIOC_PIN14) | \
PIN_OTYPE_PUSHPULL(GPIOC_PIN15))
#define VAL_GPIOC_OSPEEDR (PIN_OSPEED_40M(GPIOC_PIN0) | \
PIN_OSPEED_40M(GPIOC_PIN1) | \
PIN_OSPEED_40M(GPIOC_PIN2) | \
PIN_OSPEED_40M(GPIOC_PIN3) | \
PIN_OSPEED_40M(GPIOC_PIN4) | \
PIN_OSPEED_40M(GPIOC_PIN5) | \
PIN_OSPEED_40M(GPIOC_PIN6) | \
PIN_OSPEED_40M(GPIOC_PIN7) | \
PIN_OSPEED_40M(GPIOC_PIN8) | \
PIN_OSPEED_40M(GPIOC_PIN9) | \
PIN_OSPEED_40M(GPIOC_PIN10) | \
PIN_OSPEED_40M(GPIOC_PIN11) | \
PIN_OSPEED_40M(GPIOC_PIN12) | \
PIN_OSPEED_40M(GPIOC_BUTTON) | \
PIN_OSPEED_40M(GPIOC_PIN14) | \
PIN_OSPEED_40M(GPIOC_PIN15))
#define VAL_GPIOC_PUPDR (PIN_PUPDR_PULLUP(GPIOC_PIN0) | \
PIN_PUPDR_PULLUP(GPIOC_PIN1) | \
PIN_PUPDR_PULLUP(GPIOC_PIN2) | \
PIN_PUPDR_PULLUP(GPIOC_PIN3) | \
PIN_PUPDR_PULLUP(GPIOC_PIN4) | \
PIN_PUPDR_PULLUP(GPIOC_PIN5) | \
PIN_PUPDR_PULLUP(GPIOC_PIN6) | \
PIN_PUPDR_PULLUP(GPIOC_PIN7) | \
PIN_PUPDR_PULLUP(GPIOC_PIN8) | \
PIN_PUPDR_PULLUP(GPIOC_PIN9) | \
PIN_PUPDR_PULLUP(GPIOC_PIN10) | \
PIN_PUPDR_PULLUP(GPIOC_PIN11) | \
PIN_PUPDR_PULLUP(GPIOC_PIN12) | \
PIN_PUPDR_FLOATING(GPIOC_BUTTON) | \
PIN_PUPDR_PULLUP(GPIOC_PIN14) | \
PIN_PUPDR_PULLUP(GPIOC_PIN15))
#define VAL_GPIOC_ODR (PIN_ODR_HIGH(GPIOC_PIN0) | \
PIN_ODR_HIGH(GPIOC_PIN1) | \
PIN_ODR_HIGH(GPIOC_PIN2) | \
PIN_ODR_HIGH(GPIOC_PIN3) | \
PIN_ODR_HIGH(GPIOC_PIN4) | \
PIN_ODR_HIGH(GPIOC_PIN5) | \
PIN_ODR_HIGH(GPIOC_PIN6) | \
PIN_ODR_HIGH(GPIOC_PIN7) | \
PIN_ODR_HIGH(GPIOC_PIN8) | \
PIN_ODR_HIGH(GPIOC_PIN9) | \
PIN_ODR_HIGH(GPIOC_PIN10) | \
PIN_ODR_HIGH(GPIOC_PIN11) | \
PIN_ODR_HIGH(GPIOC_PIN12) | \
PIN_ODR_HIGH(GPIOC_BUTTON) | \
PIN_ODR_HIGH(GPIOC_PIN14) | \
PIN_ODR_HIGH(GPIOC_PIN15))
#define VAL_GPIOC_AFRL (PIN_AFIO_AF(GPIOC_PIN0, 0) | \
PIN_AFIO_AF(GPIOC_PIN1, 0) | \
PIN_AFIO_AF(GPIOC_PIN2, 0) | \
PIN_AFIO_AF(GPIOC_PIN3, 0) | \
PIN_AFIO_AF(GPIOC_PIN4, 0) | \
PIN_AFIO_AF(GPIOC_PIN5, 0) | \
PIN_AFIO_AF(GPIOC_PIN6, 0) | \
PIN_AFIO_AF(GPIOC_PIN7, 0))
#define VAL_GPIOC_AFRH (PIN_AFIO_AF(GPIOC_PIN8, 0) | \
PIN_AFIO_AF(GPIOC_PIN9, 0) | \
PIN_AFIO_AF(GPIOC_PIN10, 0) | \
PIN_AFIO_AF(GPIOC_PIN11, 0) | \
PIN_AFIO_AF(GPIOC_PIN12, 0) | \
PIN_AFIO_AF(GPIOC_BUTTON, 0) | \
PIN_AFIO_AF(GPIOC_PIN14, 0) | \
PIN_AFIO_AF(GPIOC_PIN15, 0))
/*
* GPIOD setup:
*
* PD0 - PIN0 (input pullup).
* PD1 - PIN1 (input pullup).
* PD2 - PIN2 (input pullup).
* PD3 - PIN3 (input pullup).
* PD4 - PIN4 (input pullup).
* PD5 - PIN5 (input pullup).
* PD6 - PIN6 (input pullup).
* PD7 - PIN7 (input pullup).
* PD8 - PIN8 (input pullup).
* PD9 - PIN9 (input pullup).
* PD10 - PIN10 (input pullup).
* PD11 - PIN11 (input pullup).
* PD12 - PIN12 (input pullup).
* PD13 - PIN13 (input pullup).
* PD14 - PIN14 (input pullup).
* PD15 - PIN15 (input pullup).
*/
#define VAL_GPIOD_MODER (PIN_MODE_INPUT(GPIOD_PIN0) | \
PIN_MODE_INPUT(GPIOD_PIN1) | \
PIN_MODE_INPUT(GPIOD_PIN2) | \
PIN_MODE_INPUT(GPIOD_PIN3) | \
PIN_MODE_INPUT(GPIOD_PIN4) | \
PIN_MODE_INPUT(GPIOD_PIN5) | \
PIN_MODE_INPUT(GPIOD_PIN6) | \
PIN_MODE_INPUT(GPIOD_PIN7) | \
PIN_MODE_INPUT(GPIOD_PIN8) | \
PIN_MODE_INPUT(GPIOD_PIN9) | \
PIN_MODE_INPUT(GPIOD_PIN10) | \
PIN_MODE_INPUT(GPIOD_PIN11) | \
PIN_MODE_INPUT(GPIOD_PIN12) | \
PIN_MODE_INPUT(GPIOD_PIN13) | \
PIN_MODE_INPUT(GPIOD_PIN14) | \
PIN_MODE_INPUT(GPIOD_PIN15))
#define VAL_GPIOD_OTYPER (PIN_OTYPE_PUSHPULL(GPIOD_PIN0) | \
PIN_OTYPE_PUSHPULL(GPIOD_PIN1) | \
PIN_OTYPE_PUSHPULL(GPIOD_PIN2) | \
PIN_OTYPE_PUSHPULL(GPIOD_PIN3) | \
PIN_OTYPE_PUSHPULL(GPIOD_PIN4) | \
PIN_OTYPE_PUSHPULL(GPIOD_PIN5) | \
PIN_OTYPE_PUSHPULL(GPIOD_PIN6) | \
PIN_OTYPE_PUSHPULL(GPIOD_PIN7) | \
PIN_OTYPE_PUSHPULL(GPIOD_PIN8) | \
PIN_OTYPE_PUSHPULL(GPIOD_PIN9) | \
PIN_OTYPE_PUSHPULL(GPIOD_PIN10) | \
PIN_OTYPE_PUSHPULL(GPIOD_PIN11) | \
PIN_OTYPE_PUSHPULL(GPIOD_PIN12) | \
PIN_OTYPE_PUSHPULL(GPIOD_PIN13) | \
PIN_OTYPE_PUSHPULL(GPIOD_PIN14) | \
PIN_OTYPE_PUSHPULL(GPIOD_PIN15))
#define VAL_GPIOD_OSPEEDR (PIN_OSPEED_40M(GPIOD_PIN0) | \
PIN_OSPEED_40M(GPIOD_PIN1) | \
PIN_OSPEED_40M(GPIOD_PIN2) | \
PIN_OSPEED_40M(GPIOD_PIN3) | \
PIN_OSPEED_40M(GPIOD_PIN4) | \
PIN_OSPEED_40M(GPIOD_PIN5) | \
PIN_OSPEED_40M(GPIOD_PIN6) | \
PIN_OSPEED_40M(GPIOD_PIN7) | \
PIN_OSPEED_40M(GPIOD_PIN8) | \
PIN_OSPEED_40M(GPIOD_PIN9) | \
PIN_OSPEED_40M(GPIOD_PIN10) | \
PIN_OSPEED_40M(GPIOD_PIN11) | \
PIN_OSPEED_40M(GPIOD_PIN12) | \
PIN_OSPEED_40M(GPIOD_PIN13) | \
PIN_OSPEED_40M(GPIOD_PIN14) | \
PIN_OSPEED_40M(GPIOD_PIN15))
#define VAL_GPIOD_PUPDR (PIN_PUPDR_PULLUP(GPIOD_PIN0) | \
PIN_PUPDR_PULLUP(GPIOD_PIN1) | \
PIN_PUPDR_PULLUP(GPIOD_PIN2) | \
PIN_PUPDR_PULLUP(GPIOD_PIN3) | \
PIN_PUPDR_PULLUP(GPIOD_PIN4) | \
PIN_PUPDR_PULLUP(GPIOD_PIN5) | \
PIN_PUPDR_PULLUP(GPIOD_PIN6) | \
PIN_PUPDR_PULLUP(GPIOD_PIN7) | \
PIN_PUPDR_PULLUP(GPIOD_PIN8) | \
PIN_PUPDR_PULLUP(GPIOD_PIN9) | \
PIN_PUPDR_PULLUP(GPIOD_PIN10) | \
PIN_PUPDR_PULLUP(GPIOD_PIN11) | \
PIN_PUPDR_PULLUP(GPIOD_PIN12) | \
PIN_PUPDR_PULLUP(GPIOD_PIN13) | \
PIN_PUPDR_PULLUP(GPIOD_PIN14) | \
PIN_PUPDR_PULLUP(GPIOD_PIN15))
#define VAL_GPIOD_ODR (PIN_ODR_HIGH(GPIOD_PIN0) | \
PIN_ODR_HIGH(GPIOD_PIN1) | \
PIN_ODR_HIGH(GPIOD_PIN2) | \
PIN_ODR_HIGH(GPIOD_PIN3) | \
PIN_ODR_HIGH(GPIOD_PIN4) | \
PIN_ODR_HIGH(GPIOD_PIN5) | \
PIN_ODR_HIGH(GPIOD_PIN6) | \
PIN_ODR_HIGH(GPIOD_PIN7) | \
PIN_ODR_HIGH(GPIOD_PIN8) | \
PIN_ODR_HIGH(GPIOD_PIN9) | \
PIN_ODR_HIGH(GPIOD_PIN10) | \
PIN_ODR_HIGH(GPIOD_PIN11) | \
PIN_ODR_HIGH(GPIOD_PIN12) | \
PIN_ODR_HIGH(GPIOD_PIN13) | \
PIN_ODR_HIGH(GPIOD_PIN14) | \
PIN_ODR_HIGH(GPIOD_PIN15))
#define VAL_GPIOD_AFRL (PIN_AFIO_AF(GPIOD_PIN0, 0) | \
PIN_AFIO_AF(GPIOD_PIN1, 0) | \
PIN_AFIO_AF(GPIOD_PIN2, 0) | \
PIN_AFIO_AF(GPIOD_PIN3, 0) | \
PIN_AFIO_AF(GPIOD_PIN4, 0) | \
PIN_AFIO_AF(GPIOD_PIN5, 0) | \
PIN_AFIO_AF(GPIOD_PIN6, 0) | \
PIN_AFIO_AF(GPIOD_PIN7, 0))
#define VAL_GPIOD_AFRH (PIN_AFIO_AF(GPIOD_PIN8, 0) | \
PIN_AFIO_AF(GPIOD_PIN9, 0) | \
PIN_AFIO_AF(GPIOD_PIN10, 0) | \
PIN_AFIO_AF(GPIOD_PIN11, 0) | \
PIN_AFIO_AF(GPIOD_PIN12, 0) | \
PIN_AFIO_AF(GPIOD_PIN13, 0) | \
PIN_AFIO_AF(GPIOD_PIN14, 0) | \
PIN_AFIO_AF(GPIOD_PIN15, 0))
/*
* GPIOF setup:
*
* PF0 - OSC_IN (input floating).
* PF1 - OSC_OUT (input floating).
* PF2 - PIN2 (input pullup).
* PF3 - PIN3 (input pullup).
* PF4 - PIN4 (input pullup).
* PF5 - PIN5 (input pullup).
* PF6 - PIN6 (input pullup).
* PF7 - PIN7 (input pullup).
* PF8 - PIN8 (input pullup).
* PF9 - PIN9 (input pullup).
* PF10 - PIN10 (input pullup).
* PF11 - PIN11 (input pullup).
* PF12 - PIN12 (input pullup).
* PF13 - PIN13 (input pullup).
* PF14 - PIN14 (input pullup).
* PF15 - PIN15 (input pullup).
*/
#define VAL_GPIOF_MODER (PIN_MODE_INPUT(GPIOF_OSC_IN) | \
PIN_MODE_INPUT(GPIOF_OSC_OUT) | \
PIN_MODE_INPUT(GPIOF_PIN2) | \
PIN_MODE_INPUT(GPIOF_PIN3) | \
PIN_MODE_INPUT(GPIOF_PIN4) | \
PIN_MODE_INPUT(GPIOF_PIN5) | \
PIN_MODE_INPUT(GPIOF_PIN6) | \
PIN_MODE_INPUT(GPIOF_PIN7) | \
PIN_MODE_INPUT(GPIOF_PIN8) | \
PIN_MODE_INPUT(GPIOF_PIN9) | \
PIN_MODE_INPUT(GPIOF_PIN10) | \
PIN_MODE_INPUT(GPIOF_PIN11) | \
PIN_MODE_INPUT(GPIOF_PIN12) | \
PIN_MODE_INPUT(GPIOF_PIN13) | \
PIN_MODE_INPUT(GPIOF_PIN14) | \
PIN_MODE_INPUT(GPIOF_PIN15))
#define VAL_GPIOF_OTYPER (PIN_OTYPE_PUSHPULL(GPIOF_OSC_IN) | \
PIN_OTYPE_PUSHPULL(GPIOF_OSC_OUT) | \
PIN_OTYPE_PUSHPULL(GPIOF_PIN2) | \
PIN_OTYPE_PUSHPULL(GPIOF_PIN3) | \
PIN_OTYPE_PUSHPULL(GPIOF_PIN4) | \
PIN_OTYPE_PUSHPULL(GPIOF_PIN5) | \
PIN_OTYPE_PUSHPULL(GPIOF_PIN6) | \
PIN_OTYPE_PUSHPULL(GPIOF_PIN7) | \
PIN_OTYPE_PUSHPULL(GPIOF_PIN8) | \
PIN_OTYPE_PUSHPULL(GPIOF_PIN9) | \
PIN_OTYPE_PUSHPULL(GPIOF_PIN10) | \
PIN_OTYPE_PUSHPULL(GPIOF_PIN11) | \
PIN_OTYPE_PUSHPULL(GPIOF_PIN12) | \
PIN_OTYPE_PUSHPULL(GPIOF_PIN13) | \
PIN_OTYPE_PUSHPULL(GPIOF_PIN14) | \
PIN_OTYPE_PUSHPULL(GPIOF_PIN15))
#define VAL_GPIOF_OSPEEDR (PIN_OSPEED_2M(GPIOF_OSC_IN) | \
PIN_OSPEED_2M(GPIOF_OSC_OUT) | \
PIN_OSPEED_2M(GPIOF_PIN2) | \
PIN_OSPEED_2M(GPIOF_PIN3) | \
PIN_OSPEED_2M(GPIOF_PIN4) | \
PIN_OSPEED_2M(GPIOF_PIN5) | \
PIN_OSPEED_2M(GPIOF_PIN6) | \
PIN_OSPEED_2M(GPIOF_PIN7) | \
PIN_OSPEED_2M(GPIOF_PIN8) | \
PIN_OSPEED_2M(GPIOF_PIN9) | \
PIN_OSPEED_2M(GPIOF_PIN10) | \
PIN_OSPEED_2M(GPIOF_PIN11) | \
PIN_OSPEED_2M(GPIOF_PIN12) | \
PIN_OSPEED_2M(GPIOF_PIN13) | \
PIN_OSPEED_2M(GPIOF_PIN14) | \
PIN_OSPEED_2M(GPIOF_PIN15))
#define VAL_GPIOF_PUPDR (PIN_PUPDR_FLOATING(GPIOF_OSC_IN) | \
PIN_PUPDR_FLOATING(GPIOF_OSC_OUT) | \
PIN_PUPDR_PULLUP(GPIOF_PIN2) | \
PIN_PUPDR_PULLUP(GPIOF_PIN3) | \
PIN_PUPDR_PULLUP(GPIOF_PIN4) | \
PIN_PUPDR_PULLUP(GPIOF_PIN5) | \
PIN_PUPDR_PULLUP(GPIOF_PIN6) | \
PIN_PUPDR_PULLUP(GPIOF_PIN7) | \
PIN_PUPDR_PULLUP(GPIOF_PIN8) | \
PIN_PUPDR_PULLUP(GPIOF_PIN9) | \
PIN_PUPDR_PULLUP(GPIOF_PIN10) | \
PIN_PUPDR_PULLUP(GPIOF_PIN11) | \
PIN_PUPDR_PULLUP(GPIOF_PIN12) | \
PIN_PUPDR_PULLUP(GPIOF_PIN13) | \
PIN_PUPDR_PULLUP(GPIOF_PIN14) | \
PIN_PUPDR_PULLUP(GPIOF_PIN15))
#define VAL_GPIOF_ODR (PIN_ODR_HIGH(GPIOF_OSC_IN) | \
PIN_ODR_HIGH(GPIOF_OSC_OUT) | \
PIN_ODR_HIGH(GPIOF_PIN2) | \
PIN_ODR_HIGH(GPIOF_PIN3) | \
PIN_ODR_HIGH(GPIOF_PIN4) | \
PIN_ODR_HIGH(GPIOF_PIN5) | \
PIN_ODR_HIGH(GPIOF_PIN6) | \
PIN_ODR_HIGH(GPIOF_PIN7) | \
PIN_ODR_HIGH(GPIOF_PIN8) | \
PIN_ODR_HIGH(GPIOF_PIN9) | \
PIN_ODR_HIGH(GPIOF_PIN10) | \
PIN_ODR_HIGH(GPIOF_PIN11) | \
PIN_ODR_HIGH(GPIOF_PIN12) | \
PIN_ODR_HIGH(GPIOF_PIN13) | \
PIN_ODR_HIGH(GPIOF_PIN14) | \
PIN_ODR_HIGH(GPIOF_PIN15))
#define VAL_GPIOF_AFRL (PIN_AFIO_AF(GPIOF_OSC_IN, 0) | \
PIN_AFIO_AF(GPIOF_OSC_OUT, 0) | \
PIN_AFIO_AF(GPIOF_PIN2, 0) | \
PIN_AFIO_AF(GPIOF_PIN3, 0) | \
PIN_AFIO_AF(GPIOF_PIN4, 0) | \
PIN_AFIO_AF(GPIOF_PIN5, 0) | \
PIN_AFIO_AF(GPIOF_PIN6, 0) | \
PIN_AFIO_AF(GPIOF_PIN7, 0))
#define VAL_GPIOF_AFRH (PIN_AFIO_AF(GPIOF_PIN8, 0) | \
PIN_AFIO_AF(GPIOF_PIN9, 0) | \
PIN_AFIO_AF(GPIOF_PIN10, 0) | \
PIN_AFIO_AF(GPIOF_PIN11, 0) | \
PIN_AFIO_AF(GPIOF_PIN12, 0) | \
PIN_AFIO_AF(GPIOF_PIN13, 0) | \
PIN_AFIO_AF(GPIOF_PIN14, 0) | \
PIN_AFIO_AF(GPIOF_PIN15, 0))
#if !defined(_FROM_ASM_)
#ifdef __cplusplus
extern "C" {
#endif
void boardInit(void);
#ifdef __cplusplus
}
#endif
#endif /* _FROM_ASM_ */
#endif /* _BOARD_H_ */

5
os/hal/boards/ST_NUCLEO_F030R8/board.mk Normal file
View File

@ -0,0 +1,5 @@
# List of all the board related files.
BOARDSRC = ${CHIBIOS}/os/hal/boards/ST_NUCLEO_F030R8/board.c
# Required include directories
BOARDINC = ${CHIBIOS}/os/hal/boards/ST_NUCLEO_F030R8

668
os/hal/boards/ST_NUCLEO_F030R8/cfg/board.chcfg Normal file
View File

@ -0,0 +1,668 @@
<?xml version="1.0" encoding="UTF-8"?>
<!-- STM32F0xx board Template -->
<board
xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
xsi:noNamespaceSchemaLocation="http://www.chibios.org/xml/schema/boards/stm32f0xx_board.xsd">
<configuration_settings>
<templates_path>resources/gencfg/processors/boards/stm32f0xx/templates</templates_path>
<output_path>..</output_path>
</configuration_settings>
<board_name>STMicroelectronics NUCLEO-F030R8</board_name>
<board_id>ST_NUCLEO_F030R8</board_id>
<board_functions></board_functions>
<subtype>STM32F030</subtype>
<clocks HSEFrequency="0" HSEBypass="true" LSEFrequency="0"
LSEBypass="false" LSEDrive="3 High Drive (default)" />
<ports>
<GPIOA>
<pin0
ID=""
Type="PushPull"
Level="High"
Speed="Maximum"
Resistor="PullUp"
Mode="Input"
Alternate="0" />
<pin1
ID=""
Type="PushPull"
Level="High"
Speed="Maximum"
Resistor="PullUp"
Mode="Input"
Alternate="0" />
<pin2
ID="USART_TX"
Type="PushPull"
Level="High"
Speed="High"
Resistor="Floating"
Mode="Alternate"
Alternate="1" />
<pin3
ID="USART_RX"
Type="PushPull"
Level="High"
Speed="High"
Resistor="Floating"
Mode="Alternate"
Alternate="1" ></pin3>
<pin4
ID=""
Type="PushPull"
Level="High"
Speed="Maximum"
Resistor="PullUp"
Mode="Input"
Alternate="0" />
<pin5
ID="LED_GREEN"
Type="PushPull"
Level="Low"
Speed="High"
Resistor="Floating"
Mode="Output"
Alternate="0" />
<pin6
ID=""
Type="PushPull"
Level="High"
Speed="Maximum"
Resistor="PullUp"
Mode="Input"
Alternate="0" />
<pin7
ID=""
Type="PushPull"
Level="High"
Speed="Maximum"
Resistor="PullUp"
Mode="Input"
Alternate="0" />
<pin8
ID=""
Type="PushPull"
Level="High"
Speed="Maximum"
Resistor="PullUp"
Mode="Input"
Alternate="0" />
<pin9
ID=""
Type="PushPull"
Level="High"
Speed="Maximum"
Resistor="PullUp"
Mode="Input"
Alternate="0" />
<pin10
ID=""
Type="PushPull"
Level="High"
Speed="Maximum"
Resistor="PullUp"
Mode="Input"
Alternate="0" />
<pin11
ID="OTG_FS_DM"
Type="PushPull"
Level="High"
Speed="Maximum"
Resistor="Floating"
Mode="Alternate"
Alternate="10" />
<pin12
ID="OTG_FS_DP"
Type="PushPull"
Level="High"
Speed="Maximum"
Resistor="Floating"
Mode="Alternate"
Alternate="10" />
<pin13
ID="SWDIO"
Type="PushPull"
Level="High"
Speed="Maximum"
Resistor="PullUp"
Mode="Alternate"
Alternate="0" />
<pin14
ID="SWCLK"
Type="PushPull"
Level="High"
Speed="Maximum"
Resistor="PullDown"
Mode="Alternate"
Alternate="0" />
<pin15
ID=""
Type="PushPull"
Level="High"
Speed="Maximum"
Resistor="PullUp"
Mode="Input"
Alternate="0" />
</GPIOA>
<GPIOB>
<pin0
ID=""
Type="PushPull"
Level="High"
Speed="Maximum"
Resistor="PullUp"
Mode="Input"
Alternate="0" />
<pin1
ID=""
Type="PushPull"
Level="High"
Speed="Maximum"
Resistor="PullUp"
Mode="Input"
Alternate="0" />
<pin2
ID=""
Type="PushPull"
Level="High"
Speed="Maximum"
Resistor="PullUp"
Mode="Input"
Alternate="0" />
<pin3
ID="SWO"
Type="PushPull"
Level="High"
Speed="Maximum"
Resistor="PullUp"
Mode="Alternate"
Alternate="0" />
<pin4
ID=""
Type="PushPull"
Level="High"
Speed="Maximum"
Resistor="PullUp"
Mode="Input"
Alternate="0" />
<pin5
ID=""
Type="PushPull"
Level="High"
Speed="Maximum"
Resistor="PullUp"
Mode="Input"
Alternate="0" />
<pin6
ID=""
Type="PushPull"
Level="High"
Speed="Maximum"
Resistor="PullUp"
Mode="Input"
Alternate="0" />
<pin7
ID=""
Type="PushPull"
Level="High"
Speed="Maximum"
Resistor="PullUp"
Mode="Input"
Alternate="0" />
<pin8
ID=""
Type="PushPull"
Level="High"
Speed="Maximum"
Resistor="PullUp"
Mode="Input"
Alternate="0" />
<pin9
ID=""
Type="PushPull"
Level="High"
Speed="Maximum"
Resistor="PullUp"
Mode="Input"
Alternate="0" />
<pin10
ID=""
Type="PushPull"
Level="High"
Speed="Maximum"
Resistor="PullUp"
Mode="Input"
Alternate="0" />
<pin11
ID=""
Type="PushPull"
Level="High"
Speed="Maximum"
Resistor="PullUp"
Mode="Input"
Alternate="0" />
<pin12
ID=""
Type="PushPull"
Level="High"
Speed="Maximum"
Resistor="PullUp"
Mode="Input"
Alternate="0" />
<pin13
ID=""
Type="PushPull"
Level="High"
Speed="Maximum"
Resistor="PullUp"
Mode="Input"
Alternate="0" />
<pin14
ID=""
Type="PushPull"
Level="High"
Speed="Maximum"
Resistor="PullUp"
Mode="Input"
Alternate="0" />
<pin15
ID=""
Type="PushPull"
Level="High"
Speed="Maximum"
Resistor="PullUp"
Mode="Input"
Alternate="0" />
</GPIOB>
<GPIOC>
<pin0
ID=""
Type="PushPull"
Level="High"
Speed="Maximum"
Resistor="PullUp"
Mode="Input"
Alternate="0" />
<pin1
ID=""
Type="PushPull"
Level="High"
Speed="Maximum"
Resistor="PullUp"
Mode="Input"
Alternate="0" />
<pin2
ID=""
Type="PushPull"
Level="High"
Speed="Maximum"
Resistor="PullUp"
Mode="Input"
Alternate="0" />
<pin3
ID=""
Type="PushPull"
Level="High"
Speed="Maximum"
Resistor="PullUp"
Mode="Input"
Alternate="0" />
<pin4
ID=""
Type="PushPull"
Level="High"
Speed="Maximum"
Resistor="PullUp"
Mode="Input"
Alternate="0" />
<pin5
ID=""
Type="PushPull"
Level="High"
Speed="Maximum"
Resistor="PullUp"
Mode="Input"
Alternate="0" />
<pin6
ID=""
Type="PushPull"
Level="High"
Speed="Maximum"
Resistor="PullUp"
Mode="Input"
Alternate="0" />
<pin7
ID=""
Type="PushPull"
Level="High"
Speed="Maximum"
Resistor="PullUp"
Mode="Input"
Alternate="0" />
<pin8
ID=""
Type="PushPull"
Level="High"
Speed="Maximum"
Resistor="PullUp"
Mode="Input"
Alternate="0" />
<pin9
ID=""
Type="PushPull"
Level="High"
Speed="Maximum"
Resistor="PullUp"
Mode="Input"
Alternate="0" />
<pin10
ID=""
Type="PushPull"
Level="High"
Speed="Maximum"
Resistor="PullUp"
Mode="Input"
Alternate="0" />
<pin11
ID=""
Type="PushPull"
Level="High"
Speed="Maximum"
Resistor="PullUp"
Mode="Input"
Alternate="0" />
<pin12
ID=""
Type="PushPull"
Level="High"
Speed="Maximum"
Resistor="PullUp"
Mode="Input"
Alternate="0" />
<pin13
ID="BUTTON"
Type="PushPull"
Level="High"
Speed="Maximum"
Resistor="Floating"
Mode="Input"
Alternate="0" />
<pin14
ID=""
Type="PushPull"
Level="High"
Speed="Maximum"
Resistor="PullUp"
Mode="Input"
Alternate="0" />
<pin15
ID=""
Type="PushPull"
Level="High"
Speed="Maximum"
Resistor="PullUp"
Mode="Input"
Alternate="0" />
</GPIOC>
<GPIOD>
<pin0
ID=""
Type="PushPull"
Level="High"
Speed="Maximum"
Resistor="PullUp"
Mode="Input"
Alternate="0" />
<pin1
ID=""
Type="PushPull"
Level="High"
Speed="Maximum"
Resistor="PullUp"
Mode="Input"
Alternate="0" />
<pin2
ID=""
Type="PushPull"
Level="High"
Speed="Maximum"
Resistor="PullUp"
Mode="Input"
Alternate="0" />
<pin3
ID=""
Type="PushPull"
Level="High"
Speed="Maximum"
Resistor="PullUp"
Mode="Input"
Alternate="0" />
<pin4
ID=""
Type="PushPull"
Level="High"
Speed="Maximum"
Resistor="PullUp"
Mode="Input"
Alternate="0" />
<pin5
ID=""
Type="PushPull"
Level="High"
Speed="Maximum"
Resistor="PullUp"
Mode="Input"
Alternate="0" />
<pin6
ID=""
Type="PushPull"
Level="High"
Speed="Maximum"
Resistor="PullUp"
Mode="Input"
Alternate="0" />
<pin7
ID=""
Type="PushPull"
Level="High"
Speed="Maximum"
Resistor="PullUp"
Mode="Input"
Alternate="0" />
<pin8
ID=""
Type="PushPull"
Level="High"
Speed="Maximum"
Resistor="PullUp"
Mode="Input"
Alternate="0" />
<pin9
ID=""
Type="PushPull"
Level="High"
Speed="Maximum"
Resistor="PullUp"
Mode="Input"
Alternate="0" />
<pin10
ID=""
Type="PushPull"
Level="High"
Speed="Maximum"
Resistor="PullUp"
Mode="Input"
Alternate="0" />
<pin11
ID=""
Type="PushPull"
Level="High"
Speed="Maximum"
Resistor="PullUp"
Mode="Input"
Alternate="0" />
<pin12
ID=""
Type="PushPull"
Level="High"
Speed="Maximum"
Resistor="PullUp"
Mode="Input"
Alternate="0" />
<pin13
ID=""
Type="PushPull"
Level="High"
Speed="Maximum"
Resistor="PullUp"
Mode="Input"
Alternate="0" />
<pin14
ID=""
Type="PushPull"
Level="High"
Speed="Maximum"
Resistor="PullUp"
Mode="Input"
Alternate="0" />
<pin15
ID=""
Type="PushPull"
Level="High"
Speed="Maximum"
Resistor="PullUp"
Mode="Input"
Alternate="0" />
</GPIOD>
<GPIOF>
<pin0
ID="OSC_IN"
Type="PushPull"
Speed="Minimum"
Resistor="Floating"
Level="High"
Mode="Input"
Alternate="0" />
<pin1
ID="OSC_OUT"
Type="PushPull"
Speed="Minimum"
Resistor="Floating"
Level="High"
Mode="Input"
Alternate="0" />
<pin2
ID=""
Type="PushPull"
Speed="Minimum"
Resistor="PullUp"
Level="High"
Mode="Input"
Alternate="0" />
<pin3
ID=""
Type="PushPull"
Speed="Minimum"
Resistor="PullUp"
Level="High"
Mode="Input"
Alternate="0" />
<pin4
ID=""
Type="PushPull"
Speed="Minimum"
Resistor="PullUp"
Level="High"
Mode="Input"
Alternate="0" />
<pin5
ID=""
Type="PushPull"
Speed="Minimum"
Resistor="PullUp"
Level="High"
Mode="Input"
Alternate="0" />
<pin6
ID=""
Type="PushPull"
Speed="Minimum"
Resistor="PullUp"
Level="High"
Mode="Input"
Alternate="0" />
<pin7
ID=""
Type="PushPull"
Speed="Minimum"
Resistor="PullUp"
Level="High"
Mode="Input"
Alternate="0" />
<pin8
ID=""
Type="PushPull"
Speed="Minimum"
Resistor="PullUp"
Level="High"
Mode="Input"
Alternate="0" />
<pin9
ID=""
Type="PushPull"
Speed="Minimum"
Resistor="PullUp"
Level="High"
Mode="Input"
Alternate="0" />
<pin10
ID=""
Type="PushPull"
Speed="Minimum"
Resistor="PullUp"
Level="High"
Mode="Input"
Alternate="0" />
<pin11
ID=""
Type="PushPull"
Speed="Minimum"
Resistor="PullUp"
Level="High"
Mode="Input"
Alternate="0" />
<pin12
ID=""
Type="PushPull"
Speed="Minimum"
Resistor="PullUp"
Level="High"
Mode="Input"
Alternate="0" />
<pin13
ID=""
Type="PushPull"
Speed="Minimum"
Resistor="PullUp"
Level="High"
Mode="Input"
Alternate="0" />
<pin14
ID=""
Type="PushPull"
Speed="Minimum"
Resistor="PullUp"
Level="High"
Mode="Input"
Alternate="0" />
<pin15
ID=""
Type="PushPull"
Speed="Minimum"
Resistor="PullUp"
Level="High"
Mode="Input"
Alternate="0" />
</GPIOF>
</ports>
</board>

49
os/hal/boards/ST_NUCLEO_F103RB/board.c Normal file
View File

@ -0,0 +1,49 @@
/*
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
#include "hal.h"
/**
* @brief PAL setup.
* @details Digital I/O ports static configuration as defined in @p board.h.
* This variable is used by the HAL when initializing the PAL driver.
*/
#if HAL_USE_PAL || defined(__DOXYGEN__)
const PALConfig pal_default_config =
{
{VAL_GPIOAODR, VAL_GPIOACRL, VAL_GPIOACRH},
{VAL_GPIOBODR, VAL_GPIOBCRL, VAL_GPIOBCRH},
{VAL_GPIOCODR, VAL_GPIOCCRL, VAL_GPIOCCRH},
{VAL_GPIODODR, VAL_GPIODCRL, VAL_GPIODCRH},
{VAL_GPIOEODR, VAL_GPIOECRL, VAL_GPIOECRH},
};
#endif
/*
* Early initialization code.
* This initialization must be performed just after stack setup and before
* any other initialization.
*/
void __early_init(void) {
stm32_clock_init();
}
/*
* Board-specific initialization code.
*/
void boardInit(void) {
}

202
os/hal/boards/ST_NUCLEO_F103RB/board.h Normal file
View File

@ -0,0 +1,202 @@
/*
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
#ifndef _BOARD_H_
#define _BOARD_H_
/*
* Setup for the ST INEMO-M1 Discovery board.
*/
/*
* Board identifier.
*/
#define BOARD_ST_NUCLEO_F103RB
#define BOARD_NAME "STMicroelectronics NUCLEO-F103RB"
/*
* Board frequencies.
*/
#define STM32_LSECLK 0
#if defined(NUCLEO_EXTERNAL_OSCILLATOR)
#define STM32_HSECLK 8000000
#define STM32_HSE_BYPASS
#elif defined(NUCLEO_HSE_CRYSTAL)
#define STM32_HSECLK 8000000
#else
#define STM32_HSECLK 0
#endif
/*
* MCU type, supported types are defined in ./os/hal/platforms/hal_lld.h.
*/
#define STM32F10X_MD
/*
* IO pins assignments.
*/
#define GPIOA_PA0 0
#define GPIOA_PA1 1
#define GPIOA_USART_TX 2
#define GPIOA_USART_RX 3
#define GPIOA_PA4 4
#define GPIOA_LED_GREEN 5
#define GPIOA_PA6 6
#define GPIOA_PA7 7
#define GPIOA_PA8 8
#define GPIOA_PA9 9
#define GPIOA_PA10 10
#define GPIOA_PA11 11
#define GPIOA_PA12 12
#define GPIOA_SWDIO 13
#define GPIOA_SWCLK 14
#define GPIOA_PA15 15
#define GPIOB_PB0 0
#define GPIOB_PB1 1
#define GPIOB_PB2 2
#define GPIOB_SWO 3
#define GPIOB_PB4 4
#define GPIOB_PB5 5
#define GPIOB_PB6 6
#define GPIOB_PB7 7
#define GPIOB_PB8 8
#define GPIOB_PB9 9
#define GPIOB_PB10 10
#define GPIOB_PB11 11
#define GPIOB_PB12 12
#define GPIOB_PB13 13
#define GPIOB_PB14 14
#define GPIOB_PB15 15
#define GPIOC_PC0 0
#define GPIOC_PC1 1
#define GPIOC_PC2 2
#define GPIOC_PC3 3
#define GPIOC_PC4 4
#define GPIOC_PC5 5
#define GPIOC_PC6 6
#define GPIOC_PC7 7
#define GPIOC_PC8 8
#define GPIOC_PC9 9
#define GPIOC_PC10 10
#define GPIOC_PC11 11
#define GPIOC_PC12 12
#define GPIOC_BUTTON 13
#define GPIOC_PC14 14
#define GPIOC_PC15 15
#define GPIOD_OSC_IN 0
#define GPIOD_OSC_OUT 1
#define GPIOD_PD2 2
/*
* I/O ports initial setup, this configuration is established soon after reset
* in the initialization code.
*
* The digits have the following meaning:
* 0 - Analog input.
* 1 - Push Pull output 10MHz.
* 2 - Push Pull output 2MHz.
* 3 - Push Pull output 50MHz.
* 4 - Digital input.
* 5 - Open Drain output 10MHz.
* 6 - Open Drain output 2MHz.
* 7 - Open Drain output 50MHz.
* 8 - Digital input with PullUp or PullDown resistor depending on ODR.
* 9 - Alternate Push Pull output 10MHz.
* A - Alternate Push Pull output 2MHz.
* B - Alternate Push Pull output 50MHz.
* C - Reserved.
* D - Alternate Open Drain output 10MHz.
* E - Alternate Open Drain output 2MHz.
* F - Alternate Open Drain output 50MHz.
* Please refer to the STM32 Reference Manual for details.
*/
/*
* Port A setup.
* Everything input with pull-up except:
* PA2 - Alternate output (GPIOA_USART_TX).
* PA3 - Normal input (GPIOA_USART_RX).
* PA5 - Push Pull output (GPIOA_LED_GREEN).
* PA13 - Pull-up input (GPIOA_SWDIO).
* PA14 - Pull-down input (GPIOA_SWCLK).
*/
#define VAL_GPIOACRL 0x88384B88 /* PA7...PA0 */
#define VAL_GPIOACRH 0x88888888 /* PA15...PA8 */
#define VAL_GPIOAODR 0xFFFFBFDF
/*
* Port B setup.
* Everything input with pull-up except:
* PB3 - Pull-up input (GPIOA_SWO).
*/
#define VAL_GPIOBCRL 0x88888888 /* PB7...PB0 */
#define VAL_GPIOBCRH 0x88888888 /* PB15...PB8 */
#define VAL_GPIOBODR 0xFFFFFFFF
/*
* Port C setup.
* Everything input with pull-up except:
* PC13 - Normal input (GPIOC_BUTTON).
*/
#define VAL_GPIOCCRL 0x88888888 /* PC7...PC0 */
#define VAL_GPIOCCRH 0x88488888 /* PC15...PC8 */
#define VAL_GPIOCODR 0xFFFFFFFF
/*
* Port D setup.
* Everything input with pull-up except:
* PD0 - Normal input (GPIOD_OSC_IN).
* PD1 - Normal input (GPIOD_OSC_OUT).
*/
#define VAL_GPIODCRL 0x88888844 /* PD7...PD0 */
#define VAL_GPIODCRH 0x88888888 /* PD15...PD8 */
#define VAL_GPIODODR 0xFFFFFFFF
/*
* Port E setup.
* Everything input with pull-up except:
*/
#define VAL_GPIOECRL 0x88888888 /* PE7...PE0 */
#define VAL_GPIOECRH 0x88888888 /* PE15...PE8 */
#define VAL_GPIOEODR 0xFFFFFFFF
/*
* USB bus activation macro, required by the USB driver.
*/
#define usb_lld_connect_bus(usbp)
/*
* USB bus de-activation macro, required by the USB driver.
*/
#define usb_lld_disconnect_bus(usbp)
#if !defined(_FROM_ASM_)
#ifdef __cplusplus
extern "C" {
#endif
void boardInit(void);
#ifdef __cplusplus
}
#endif
#endif /* _FROM_ASM_ */
#endif /* _BOARD_H_ */

5
os/hal/boards/ST_NUCLEO_F103RB/board.mk Normal file
View File

@ -0,0 +1,5 @@
# List of all the board related files.
BOARDSRC = ${CHIBIOS}/os/hal/boards/ST_NUCLEO_F103RB/board.c
# Required include directories
BOARDINC = ${CHIBIOS}/os/hal/boards/ST_NUCLEO_F103RB

125
os/hal/boards/ST_NUCLEO_F401RE/board.c Normal file
View File

@ -0,0 +1,125 @@
/*
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
#include "hal.h"
#if HAL_USE_PAL || defined(__DOXYGEN__)
/**
* @brief PAL setup.
* @details Digital I/O ports static configuration as defined in @p board.h.
* This variable is used by the HAL when initializing the PAL driver.
*/
const PALConfig pal_default_config =
{
#if STM32_HAS_GPIOA
{VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR,
VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH},
#endif
#if STM32_HAS_GPIOB
{VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR,
VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH},
#endif
#if STM32_HAS_GPIOC
{VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR,
VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH},
#endif
#if STM32_HAS_GPIOD
{VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR,
VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH},
#endif
#if STM32_HAS_GPIOE
{VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR,
VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH},
#endif
#if STM32_HAS_GPIOF
{VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR,
VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH},
#endif
#if STM32_HAS_GPIOG
{VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR,
VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH},
#endif
#if STM32_HAS_GPIOH
{VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR,
VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH},
#endif
#if STM32_HAS_GPIOI
{VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR,
VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH}
#endif
};
#endif
/**
* @brief Early initialization code.
* @details This initialization must be performed just after stack setup
* and before any other initialization.
*/
void __early_init(void) {
stm32_clock_init();
}
#if HAL_USE_SDC || defined(__DOXYGEN__)
/**
* @brief SDC card detection.
*/
bool sdc_lld_is_card_inserted(SDCDriver *sdcp) {
(void)sdcp;
/* TODO: Fill the implementation.*/
return TRUE;
}
/**
* @brief SDC card write protection detection.
*/
bool sdc_lld_is_write_protected(SDCDriver *sdcp) {
(void)sdcp;
/* TODO: Fill the implementation.*/
return FALSE;
}
#endif /* HAL_USE_SDC */
#if HAL_USE_MMC_SPI || defined(__DOXYGEN__)
/**
* @brief MMC_SPI card detection.
*/
bool mmc_lld_is_card_inserted(MMCDriver *mmcp) {
(void)mmcp;
/* TODO: Fill the implementation.*/
return TRUE;
}
/**
* @brief MMC_SPI card write protection detection.
*/
bool mmc_lld_is_write_protected(MMCDriver *mmcp) {
(void)mmcp;
/* TODO: Fill the implementation.*/
return FALSE;
}
#endif
/**
* @brief Board-specific initialization code.
* @todo Add your board-specific code, if any.
*/
void boardInit(void) {
}

1297
os/hal/boards/ST_NUCLEO_F401RE/board.h Normal file
View File

File diff suppressed because it is too large Load Diff

5
os/hal/boards/ST_NUCLEO_F401RE/board.mk Normal file
View File

@ -0,0 +1,5 @@
# List of all the board related files.
BOARDSRC = ${CHIBIOS}/os/hal/boards/ST_NUCLEO_F401RE/board.c
# Required include directories
BOARDINC = ${CHIBIOS}/os/hal/boards/ST_NUCLEO_F401RE

1192
os/hal/boards/ST_NUCLEO_F401RE/cfg/board.chcfg Normal file
View File

File diff suppressed because it is too large Load Diff

124
os/hal/boards/ST_NUCLEO_L152RE/board.c Normal file
View File

@ -0,0 +1,124 @@
/*
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
#include "hal.h"
#if HAL_USE_PAL || defined(__DOXYGEN__)
/**
* @brief PAL setup.
* @details Digital I/O ports static configuration as defined in @p board.h.
* This variable is used by the HAL when initializing the PAL driver.
*/
const PALConfig pal_default_config = {
#if STM32_HAS_GPIOA
{VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR,
VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH},
#endif
#if STM32_HAS_GPIOB
{VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR,
VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH},
#endif
#if STM32_HAS_GPIOC
{VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR,
VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH},
#endif
#if STM32_HAS_GPIOD
{VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR,
VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH},
#endif
#if STM32_HAS_GPIOE
{VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR,
VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH},
#endif
#if STM32_HAS_GPIOF
{VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR,
VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH},
#endif
#if STM32_HAS_GPIOG
{VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR,
VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH},
#endif
#if STM32_HAS_GPIOH
{VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR,
VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH}
#endif
#if STM32_HAS_GPIOI
{VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR,
VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH}
#endif
};
#endif
/**
* @brief Early initialization code.
* @details This initialization must be performed just after stack setup
* and before any other initialization.
*/
void __early_init(void) {
stm32_clock_init();
}
#if HAL_USE_SDC || defined(__DOXYGEN__)
/**
* @brief SDC card detection.
*/
bool sdc_lld_is_card_inserted(SDCDriver *sdcp) {
(void)sdcp;
/* TODO: Fill the implementation.*/
return TRUE;
}
/**
* @brief SDC card write protection detection.
*/
bool sdc_lld_is_write_protected(SDCDriver *sdcp) {
(void)sdcp;
/* TODO: Fill the implementation.*/
return FALSE;
}
#endif /* HAL_USE_SDC */
#if HAL_USE_MMC_SPI || defined(__DOXYGEN__)
/**
* @brief MMC_SPI card detection.
*/
bool mmc_lld_is_card_inserted(MMCDriver *mmcp) {
(void)mmcp;
/* TODO: Fill the implementation.*/
return TRUE;
}
/**
* @brief MMC_SPI card write protection detection.
*/
bool mmc_lld_is_write_protected(MMCDriver *mmcp) {
(void)mmcp;
/* TODO: Fill the implementation.*/
return FALSE;
}
#endif
/**
* @brief Board-specific initialization code.
* @todo Add your board-specific code, if any.
*/
void boardInit(void) {
}

1158
os/hal/boards/ST_NUCLEO_L152RE/board.h Normal file
View File

File diff suppressed because it is too large Load Diff

5
os/hal/boards/ST_NUCLEO_L152RE/board.mk Normal file
View File

@ -0,0 +1,5 @@
# List of all the board related files.
BOARDSRC = ${CHIBIOS}/os/hal/boards/ST_NUCLEO_L152RE/board.c
# Required include directories
BOARDINC = ${CHIBIOS}/os/hal/boards/ST_NUCLEO_L152RE

1062
os/hal/boards/ST_NUCLEO_L152RE/cfg/board.chcfg Normal file
View File

File diff suppressed because it is too large Load Diff

2
os/hal/ports/STM32/STM32F0xx/hal_lld.h
View File

@ -55,7 +55,7 @@
#define PLATFORM_NAME "STM32F050xx/F060xx Entry Level Low Density devices" #define PLATFORM_NAME "STM32F050xx/F060xx Entry Level Low Density devices"
#elif defined(STM32F030) #elif defined(STM32F030)
#define PLATFORM_NAME "STM32F050xx/F060xx Entry Level Value Line devices" #define PLATFORM_NAME "STM32F030xx Entry Level Value Line devices"
#else #else
#error "STM32F0xx device not specified" #error "STM32F0xx device not specified"