From e2448aac991fff9bc29d892de9d78c6d1714e81c Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 15 Jan 2012 09:37:27 +0000 Subject: [PATCH] git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3811 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- os/hal/platforms/STM32/i2c_lld.c | 6 ------ os/hal/platforms/STM32/spi_lld.c | 4 +--- os/hal/platforms/STM32/uart_lld.c | 5 ----- os/hal/platforms/STM32F1xx/hal_lld_f100.h | 2 +- os/hal/platforms/STM32F1xx/hal_lld_f103.h | 2 +- os/hal/platforms/STM32F1xx/hal_lld_f105_f107.h | 2 +- os/hal/platforms/STM32F1xx/stm32_dma.h | 5 ++++- os/hal/platforms/STM32F2xx/hal_lld.c | 2 +- os/hal/platforms/STM32F2xx/stm32_dma.h | 5 +++++ os/hal/platforms/STM32F4xx/hal_lld.c | 2 +- os/hal/platforms/STM32F4xx/stm32_dma.h | 5 +++++ os/hal/platforms/STM32L1xx/hal_lld.c | 2 +- os/hal/platforms/STM32L1xx/stm32_dma.h | 5 ++++- 13 files changed, 25 insertions(+), 22 deletions(-) diff --git a/os/hal/platforms/STM32/i2c_lld.c b/os/hal/platforms/STM32/i2c_lld.c index 1e96c922c..b947dd579 100644 --- a/os/hal/platforms/STM32/i2c_lld.c +++ b/os/hal/platforms/STM32/i2c_lld.c @@ -153,8 +153,6 @@ static void i2c_lld_abort_operation(I2CDriver *i2cp) { /* Stops the associated DMA streams.*/ dmaStreamDisable(i2cp->dmatx); dmaStreamDisable(i2cp->dmarx); - dmaStreamClearInterrupt(i2cp->dmatx); - dmaStreamClearInterrupt(i2cp->dmarx); } /** @@ -362,7 +360,6 @@ static void i2c_lld_serve_rx_end_irq(I2CDriver *i2cp, uint32_t flags) { #endif dmaStreamDisable(i2cp->dmarx); - dmaStreamClearInterrupt(i2cp->dmarx); dp->CR2 &= ~I2C_CR2_LAST; dp->CR1 &= ~I2C_CR1_ACK; @@ -390,7 +387,6 @@ static void i2c_lld_serve_tx_end_irq(I2CDriver *i2cp, uint32_t flags) { #endif dmaStreamDisable(i2cp->dmatx); - dmaStreamClearInterrupt(i2cp->dmatx); /* Enables interrupts to catch BTF event meaning transmission part complete. Interrupt handler will decide to generate STOP or to begin receiving part of R/W transaction itself.*/ @@ -412,8 +408,6 @@ static void i2c_lld_serve_error_interrupt(I2CDriver *i2cp) { chSysLockFromIsr(); dmaStreamDisable(i2cp->dmatx); dmaStreamDisable(i2cp->dmarx); - dmaStreamClearInterrupt(i2cp->dmatx); - dmaStreamClearInterrupt(i2cp->dmarx); chSysUnlockFromIsr(); errors = I2CD_NO_ERROR; diff --git a/os/hal/platforms/STM32/spi_lld.c b/os/hal/platforms/STM32/spi_lld.c index c98d762b3..1e9c69100 100644 --- a/os/hal/platforms/STM32/spi_lld.c +++ b/os/hal/platforms/STM32/spi_lld.c @@ -106,11 +106,9 @@ static void spi_lld_serve_rx_interrupt(SPIDriver *spip, uint32_t flags) { (void)flags; #endif - /* Stop everything. The status of the TX DMA is cleared here because its - handler is only invoked in case of error.*/ + /* Stop everything.*/ dmaStreamDisable(spip->dmatx); dmaStreamDisable(spip->dmarx); - dmaStreamClearInterrupt(spip->dmatx); /* Portable SPI ISR code defined in the high level driver, note, it is a macro.*/ diff --git a/os/hal/platforms/STM32/uart_lld.c b/os/hal/platforms/STM32/uart_lld.c index a9be379af..1c377273b 100644 --- a/os/hal/platforms/STM32/uart_lld.c +++ b/os/hal/platforms/STM32/uart_lld.c @@ -139,9 +139,7 @@ static void usart_stop(UARTDriver *uartp) { /* Stops RX and TX DMA channels.*/ dmaStreamDisable(uartp->dmarx); - dmaStreamClearInterrupt(uartp->dmarx); dmaStreamDisable(uartp->dmatx); - dmaStreamClearInterrupt(uartp->dmatx); /* Stops USART operations.*/ uartp->usart->CR1 = 0; @@ -534,7 +532,6 @@ void uart_lld_start_send(UARTDriver *uartp, size_t n, const void *txbuf) { size_t uart_lld_stop_send(UARTDriver *uartp) { dmaStreamDisable(uartp->dmatx); - dmaStreamClearInterrupt(uartp->dmatx); return dmaStreamGetTransactionSize(uartp->dmatx); } @@ -553,7 +550,6 @@ void uart_lld_start_receive(UARTDriver *uartp, size_t n, void *rxbuf) { /* Stopping previous activity (idle state).*/ dmaStreamDisable(uartp->dmarx); - dmaStreamClearInterrupt(uartp->dmarx); /* RX DMA channel preparation and start.*/ dmaStreamSetMemory0(uartp->dmarx, rxbuf); @@ -578,7 +574,6 @@ size_t uart_lld_stop_receive(UARTDriver *uartp) { size_t n; dmaStreamDisable(uartp->dmarx); - dmaStreamClearInterrupt(uartp->dmarx); n = dmaStreamGetTransactionSize(uartp->dmarx); set_rx_idle_loop(uartp); return n; diff --git a/os/hal/platforms/STM32F1xx/hal_lld_f100.h b/os/hal/platforms/STM32F1xx/hal_lld_f100.h index c30f2a7dc..85171195b 100644 --- a/os/hal/platforms/STM32F1xx/hal_lld_f100.h +++ b/os/hal/platforms/STM32F1xx/hal_lld_f100.h @@ -169,12 +169,12 @@ #define STM32_MCOSEL_HSE (6 << 24) /**< HSE clock on MCO pin. */ #define STM32_MCOSEL_PLLDIV2 (7 << 24) /**< PLL/2 clock on MCO pin. */ +#define STM32_RTCSEL_MASK (3 << 8) /**< RTC clock source mask. */ #define STM32_RTCSEL_NOCLOCK (0 << 8) /**< No clock. */ #define STM32_RTCSEL_LSE (1 << 8) /**< LSE used as RTC clock. */ #define STM32_RTCSEL_LSI (2 << 8) /**< LSI used as RTC clock. */ #define STM32_RTCSEL_HSEDIV (3 << 8) /**< HSE divided by 128 used as RTC clock. */ -#define STM32_RTCSEL_MSK (3 << 8) /**< RTC clock source mask. */ /** @} */ /*===========================================================================*/ diff --git a/os/hal/platforms/STM32F1xx/hal_lld_f103.h b/os/hal/platforms/STM32F1xx/hal_lld_f103.h index b8aa67374..74f4efe83 100644 --- a/os/hal/platforms/STM32F1xx/hal_lld_f103.h +++ b/os/hal/platforms/STM32F1xx/hal_lld_f103.h @@ -179,12 +179,12 @@ #define STM32_MCOSEL_HSE (6 << 24) /**< HSE clock on MCO pin. */ #define STM32_MCOSEL_PLLDIV2 (7 << 24) /**< PLL/2 clock on MCO pin. */ +#define STM32_RTCSEL_MASK (3 << 8) /**< RTC clock source mask. */ #define STM32_RTCSEL_NOCLOCK (0 << 8) /**< No clock. */ #define STM32_RTCSEL_LSE (1 << 8) /**< LSE used as RTC clock. */ #define STM32_RTCSEL_LSI (2 << 8) /**< LSI used as RTC clock. */ #define STM32_RTCSEL_HSEDIV (3 << 8) /**< HSE divided by 128 used as RTC clock. */ -#define STM32_RTCSEL_MSK (3 << 8) /**< RTC clock source mask. */ /** @} */ /*===========================================================================*/ diff --git a/os/hal/platforms/STM32F1xx/hal_lld_f105_f107.h b/os/hal/platforms/STM32F1xx/hal_lld_f105_f107.h index 53bebc3b2..22a221470 100644 --- a/os/hal/platforms/STM32F1xx/hal_lld_f105_f107.h +++ b/os/hal/platforms/STM32F1xx/hal_lld_f105_f107.h @@ -189,12 +189,12 @@ #define STM32_MCOSEL_XT1 (10 << 24) /**< XT1 clock on MCO pin. */ #define STM32_MCOSEL_PLL3 (11 << 24) /**< PLL3 clock on MCO pin. */ +#define STM32_RTCSEL_MASK (3 << 8) /**< RTC clock source mask. */ #define STM32_RTCSEL_NOCLOCK (0 << 8) /**< No clock. */ #define STM32_RTCSEL_LSE (1 << 8) /**< LSE used as RTC clock. */ #define STM32_RTCSEL_LSI (2 << 8) /**< LSI used as RTC clock. */ #define STM32_RTCSEL_HSEDIV (3 << 8) /**< HSE divided by 128 used as RTC clock. */ -#define STM32_RTCSEL_MSK (3 << 8) /**< RTC clock source mask. */ /** @} */ /** diff --git a/os/hal/platforms/STM32F1xx/stm32_dma.h b/os/hal/platforms/STM32F1xx/stm32_dma.h index 7e230d851..4a92ce50a 100644 --- a/os/hal/platforms/STM32F1xx/stm32_dma.h +++ b/os/hal/platforms/STM32F1xx/stm32_dma.h @@ -299,6 +299,8 @@ typedef void (*stm32_dmaisr_t)(void *p, uint32_t flags); /** * @brief DMA stream disable. + * @details The function disables the specified stream and then clears any + * pending interrupt. * @note This function can be invoked in both ISR or thread context. * @pre The stream must have been allocated using @p dmaStreamAllocate(). * @post After use the stream can be released using @p dmaStreamRelease(). @@ -308,7 +310,8 @@ typedef void (*stm32_dmaisr_t)(void *p, uint32_t flags); * @special */ #define dmaStreamDisable(dmastp) { \ - (dmastp)->channel->CCR &= ~STM32_DMA_CR_EN; \ + (dmastp)->stream->CR &= ~STM32_DMA_CR_EN; \ + dmaStreamClearInterrupt(dmastp); \ } /** diff --git a/os/hal/platforms/STM32F2xx/hal_lld.c b/os/hal/platforms/STM32F2xx/hal_lld.c index 050fa21d8..74f245778 100644 --- a/os/hal/platforms/STM32F2xx/hal_lld.c +++ b/os/hal/platforms/STM32F2xx/hal_lld.c @@ -50,7 +50,7 @@ static void hal_lld_backup_domain_init(void) { PWR->CR |= PWR_CR_DBP; /* Reset BKP domain if different clock source selected.*/ - if ((RCC->BDCR & STM32_RTCSEL_MSK) != STM32_RTCSEL){ + if ((RCC->BDCR & STM32_RTCSEL_MASK) != STM32_RTCSEL){ /* Backup domain reset.*/ RCC->BDCR = RCC_BDCR_BDRST; RCC->BDCR = 0; diff --git a/os/hal/platforms/STM32F2xx/stm32_dma.h b/os/hal/platforms/STM32F2xx/stm32_dma.h index d57cae4be..b17b3aa61 100644 --- a/os/hal/platforms/STM32F2xx/stm32_dma.h +++ b/os/hal/platforms/STM32F2xx/stm32_dma.h @@ -352,6 +352,8 @@ typedef void (*stm32_dmaisr_t)(void *p, uint32_t flags); /** * @brief DMA stream disable. + * @details The function disables the specified stream, waits for the disable + * operation to complete and then clears any pending interrupt. * @note This function can be invoked in both ISR or thread context. * @pre The stream must have been allocated using @p dmaStreamAllocate(). * @post After use the stream can be released using @p dmaStreamRelease(). @@ -362,6 +364,9 @@ typedef void (*stm32_dmaisr_t)(void *p, uint32_t flags); */ #define dmaStreamDisable(dmastp) { \ (dmastp)->stream->CR &= ~STM32_DMA_CR_EN; \ + while (((dmastp)->stream->CR & STM32_DMA_CR_EN) != 0) \ + ; \ + dmaStreamClearInterrupt(dmastp); \ } /** diff --git a/os/hal/platforms/STM32F4xx/hal_lld.c b/os/hal/platforms/STM32F4xx/hal_lld.c index 9fbd34b08..d25431f76 100644 --- a/os/hal/platforms/STM32F4xx/hal_lld.c +++ b/os/hal/platforms/STM32F4xx/hal_lld.c @@ -50,7 +50,7 @@ static void hal_lld_backup_domain_init(void) { PWR->CR |= PWR_CR_DBP; /* Reset BKP domain if different clock source selected.*/ - if ((RCC->BDCR & STM32_RTCSEL_MSK) != STM32_RTCSEL){ + if ((RCC->BDCR & STM32_RTCSEL_MASK) != STM32_RTCSEL) { /* Backup domain reset.*/ RCC->BDCR = RCC_BDCR_BDRST; RCC->BDCR = 0; diff --git a/os/hal/platforms/STM32F4xx/stm32_dma.h b/os/hal/platforms/STM32F4xx/stm32_dma.h index bcadf153c..5c0430e7d 100644 --- a/os/hal/platforms/STM32F4xx/stm32_dma.h +++ b/os/hal/platforms/STM32F4xx/stm32_dma.h @@ -352,6 +352,8 @@ typedef void (*stm32_dmaisr_t)(void *p, uint32_t flags); /** * @brief DMA stream disable. + * @details The function disables the specified stream, waits for the disable + * operation to complete and then clears any pending interrupt. * @note This function can be invoked in both ISR or thread context. * @pre The stream must have been allocated using @p dmaStreamAllocate(). * @post After use the stream can be released using @p dmaStreamRelease(). @@ -362,6 +364,9 @@ typedef void (*stm32_dmaisr_t)(void *p, uint32_t flags); */ #define dmaStreamDisable(dmastp) { \ (dmastp)->stream->CR &= ~STM32_DMA_CR_EN; \ + while (((dmastp)->stream->CR & STM32_DMA_CR_EN) != 0) \ + ; \ + dmaStreamClearInterrupt(dmastp); \ } /** diff --git a/os/hal/platforms/STM32L1xx/hal_lld.c b/os/hal/platforms/STM32L1xx/hal_lld.c index ecde8c0e8..65828128e 100644 --- a/os/hal/platforms/STM32L1xx/hal_lld.c +++ b/os/hal/platforms/STM32L1xx/hal_lld.c @@ -50,7 +50,7 @@ static void hal_lld_backup_domain_init(void) { PWR->CR |= PWR_CR_DBP; /* Reset BKP domain if different clock source selected.*/ - if ((RCC->CSR & STM32_RTCSEL_MSK) != STM32_RTCSEL){ + if ((RCC->CSR & STM32_RTCSEL_MASK) != STM32_RTCSEL){ /* Backup domain reset.*/ RCC->CSR |= RCC_CSR_RTCRST; RCC->CSR &= ~RCC_CSR_RTCRST; diff --git a/os/hal/platforms/STM32L1xx/stm32_dma.h b/os/hal/platforms/STM32L1xx/stm32_dma.h index 6afadfcc1..a12f60fcb 100644 --- a/os/hal/platforms/STM32L1xx/stm32_dma.h +++ b/os/hal/platforms/STM32L1xx/stm32_dma.h @@ -290,6 +290,8 @@ typedef void (*stm32_dmaisr_t)(void *p, uint32_t flags); /** * @brief DMA stream disable. + * @details The function disables the specified stream and then clears any + * pending interrupt. * @note This function can be invoked in both ISR or thread context. * @pre The stream must have been allocated using @p dmaStreamAllocate(). * @post After use the stream can be released using @p dmaStreamRelease(). @@ -299,7 +301,8 @@ typedef void (*stm32_dmaisr_t)(void *p, uint32_t flags); * @special */ #define dmaStreamDisable(dmastp) { \ - (dmastp)->channel->CCR &= ~STM32_DMA_CR_EN; \ + (dmastp)->stream->CR &= ~STM32_DMA_CR_EN; \ + dmaStreamClearInterrupt(dmastp); \ } /**