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ChibiOS
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git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3235 35acf78f-673a-0410-8e92-d51de3d6d3f4

This commit is contained in:
gdisirio 2011-08-14 12:44:00 +00:00
parent 9741231ed7
commit e2868efe16
4 changed files with 54 additions and 2 deletions
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13
os/ports/IAR/ARMCMx/chcoreasm_v6m.s
View File

@ -39,6 +39,10 @@ SCB_ICSR SET 0xE000ED04
EXTERN chThdExit EXTERN chThdExit
EXTERN chSchIsPreemptionRequired EXTERN chSchIsPreemptionRequired
EXTERN chSchDoReschedule EXTERN chSchDoReschedule
#if CH_DBG_SYSTEM_STATE_CHECK
EXTERN dbg_check_unlock
EXTERN dbg_check_lock
#endif
THUMB THUMB
@ -70,6 +74,9 @@ _port_switch:
*/ */
PUBLIC _port_thread_start PUBLIC _port_thread_start
_port_thread_start: _port_thread_start:
#if CH_DBG_SYSTEM_STATE_CHECK
bl dbg_check_unlock
#endif
cpsie i cpsie i
mov r0, r5 mov r0, r5
blx r4 blx r4
@ -110,11 +117,17 @@ PendSVVector:
*/ */
PUBLIC _port_switch_from_isr PUBLIC _port_switch_from_isr
_port_switch_from_isr: _port_switch_from_isr:
#if CH_DBG_SYSTEM_STATE_CHECK
bl dbg_check_lock
#endif
bl chSchIsPreemptionRequired bl chSchIsPreemptionRequired
cmp r0, #0 cmp r0, #0
beq noresch beq noresch
bl chSchDoReschedule bl chSchDoReschedule
noresch: noresch:
#if CH_DBG_SYSTEM_STATE_CHECK
bl dbg_check_unlock
#endif
ldr r2, =SCB_ICSR ldr r2, =SCB_ICSR
movs r3, #128 movs r3, #128
#if CORTEX_ALTERNATE_SWITCH #if CORTEX_ALTERNATE_SWITCH

13
os/ports/IAR/ARMCMx/chcoreasm_v7m.s
View File

@ -41,6 +41,10 @@ ICSR_PENDSVSET SET 0x10000000
EXTERN chThdExit EXTERN chThdExit
EXTERN chSchIsPreemptionRequired EXTERN chSchIsPreemptionRequired
EXTERN chSchDoReschedule EXTERN chSchDoReschedule
#if CH_DBG_SYSTEM_STATE_CHECK
EXTERN dbg_check_unlock
EXTERN dbg_check_lock
#endif
THUMB THUMB
@ -60,6 +64,9 @@ _port_switch:
*/ */
PUBLIC _port_thread_start PUBLIC _port_thread_start
_port_thread_start: _port_thread_start:
#if CH_DBG_SYSTEM_STATE_CHECK
bl dbg_check_unlock
#endif
#if CORTEX_SIMPLIFIED_PRIORITY #if CORTEX_SIMPLIFIED_PRIORITY
cpsie i cpsie i
#else #else
@ -76,10 +83,16 @@ _port_thread_start:
*/ */
PUBLIC _port_switch_from_isr PUBLIC _port_switch_from_isr
_port_switch_from_isr: _port_switch_from_isr:
#if CH_DBG_SYSTEM_STATE_CHECK
bl dbg_check_lock
#endif
bl chSchIsPreemptionRequired bl chSchIsPreemptionRequired
cbz r0, .L2 cbz r0, .L2
bl chSchDoReschedule bl chSchDoReschedule
.L2: .L2:
#if CH_DBG_SYSTEM_STATE_CHECK
bl dbg_check_unlock
#endif
#if CORTEX_SIMPLIFIED_PRIORITY #if CORTEX_SIMPLIFIED_PRIORITY
mov r3, #LWRD SCB_ICSR mov r3, #LWRD SCB_ICSR
movt r3, #HWRD SCB_ICSR movt r3, #HWRD SCB_ICSR

17
os/ports/RVCT/ARMCMx/chcoreasm_v6m.s
View File

@ -36,6 +36,10 @@ SCB_ICSR EQU 0xE000ED04
IMPORT chThdExit IMPORT chThdExit
IMPORT chSchIsPreemptionRequired IMPORT chSchIsPreemptionRequired
IMPORT chSchDoReschedule IMPORT chSchDoReschedule
#if CH_DBG_SYSTEM_STATE_CHECK
IMPORT dbg_check_unlock
IMPORT dbg_check_lock
#endif
/* /*
* Performs a context switch between two threads. * Performs a context switch between two threads.
@ -66,6 +70,9 @@ _port_switch PROC
*/ */
EXPORT _port_thread_start EXPORT _port_thread_start
_port_thread_start PROC _port_thread_start PROC
#if CH_DBG_SYSTEM_STATE_CHECK
bl dbg_check_unlock
#endif
cpsie i cpsie i
mov r0, r5 mov r0, r5
blx r4 blx r4
@ -109,11 +116,17 @@ PendSVVector PROC
*/ */
EXPORT _port_switch_from_isr EXPORT _port_switch_from_isr
_port_switch_from_isr PROC _port_switch_from_isr PROC
#if CH_DBG_SYSTEM_STATE_CHECK
bl dbg_check_lock
#endif
bl chSchIsPreemptionRequired bl chSchIsPreemptionRequired
cmp r0, #0 cmp r0, #0
beq noresch beq noreschedule
bl chSchDoReschedule bl chSchDoReschedule
noresch noreschedule
#if CH_DBG_SYSTEM_STATE_CHECK
bl dbg_check_unlock
#endif
ldr r2, =SCB_ICSR ldr r2, =SCB_ICSR
movs r3, #128 movs r3, #128
#if CORTEX_ALTERNATE_SWITCH #if CORTEX_ALTERNATE_SWITCH

13
os/ports/RVCT/ARMCMx/chcoreasm_v7m.s
View File

@ -38,6 +38,10 @@ ICSR_PENDSVSET EQU 0x10000000
IMPORT chThdExit IMPORT chThdExit
IMPORT chSchIsPreemptionRequired IMPORT chSchIsPreemptionRequired
IMPORT chSchDoReschedule IMPORT chSchDoReschedule
#if CH_DBG_SYSTEM_STATE_CHECK
IMPORT dbg_check_unlock
IMPORT dbg_check_lock
#endif
/* /*
* Performs a context switch between two threads. * Performs a context switch between two threads.
@ -56,6 +60,9 @@ _port_switch PROC
*/ */
EXPORT _port_thread_start EXPORT _port_thread_start
_port_thread_start PROC _port_thread_start PROC
#if CH_DBG_SYSTEM_STATE_CHECK
bl dbg_check_unlock
#endif
#if CORTEX_SIMPLIFIED_PRIORITY #if CORTEX_SIMPLIFIED_PRIORITY
cpsie i cpsie i
#else #else
@ -73,10 +80,16 @@ _port_thread_start PROC
*/ */
EXPORT _port_switch_from_isr EXPORT _port_switch_from_isr
_port_switch_from_isr PROC _port_switch_from_isr PROC
#if CH_DBG_SYSTEM_STATE_CHECK
bl dbg_check_lock
#endif
bl chSchIsPreemptionRequired bl chSchIsPreemptionRequired
cbz r0, noreschedule cbz r0, noreschedule
bl chSchDoReschedule bl chSchDoReschedule
noreschedule noreschedule
#if CH_DBG_SYSTEM_STATE_CHECK
bl dbg_check_unlock
#endif
#if CORTEX_SIMPLIFIED_PRIORITY #if CORTEX_SIMPLIFIED_PRIORITY
mov r3, #SCB_ICSR :AND: 0xFFFF mov r3, #SCB_ICSR :AND: 0xFFFF
movt r3, #SCB_ICSR :SHR: 16 movt r3, #SCB_ICSR :SHR: 16