ADCv3 oversampling support.

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@12074 110e8d01-0319-4d1e-a829-52ad28d1bb01

os/hal/ports/STM32/LLD/ADCv3/hal_adc_lld.c

@@ -863,6 +863,9 @@ void adc_lld_start_conversion(ADCDriver *adcp) {
 
   /* ADC configuration.*/
   adcp->adcm->CFGR  = cfgr;
+#if (STM32_ADCV3_OVERSAMPLING == TRUE) || defined(__DOXYGEN__)
+  adcp->adcm->CFGR2 = grpp->cfgr2;
+#endif
 
   /* Starting conversion.*/
   adcp->adcm->CR   |= ADC_CR_ADSTART;

os/hal/ports/STM32/LLD/ADCv3/hal_adc_lld.h

@@ -335,8 +335,14 @@
 /*===========================================================================*/
 
 /* Supported devices checks.*/
-#if !defined(STM32F3XX) && !defined(STM32L4XX)
+#if !defined(STM32F3XX) && !defined(STM32L4XX) && !defined(STM32L4XXP)
-#error "ADCv3 only supports F3 and L4 STM32 devices"
+#error "ADCv3 only supports F3, L4 and L4+ STM32 devices"
+#endif
+
+#if defined(STM32L4XX) || defined(STM32L4XXP) || defined(__DOXYGEN__)
+#define STM32_ADCV3_OVERSAMPLING            TRUE
+#else
+#define STM32_ADCV3_OVERSAMPLING            FALSE
 #endif
 
 /* Registry checks.*/
@@ -668,6 +674,17 @@ typedef struct {
    *          greater than one.
    */
   uint32_t                  cfgr;
+#if (STM32_ADCV3_OVERSAMPLING == TRUE) || defined(__DOXYGEN__)
+  /**
+   * @brief   ADC CFGR2 register initialization data.
+   * @note    The bits DMAEN and DMACFG are enforced internally
+   *          to the driver, keep them to zero.
+   * @note    The bits @p ADC_CFGR_CONT or @p ADC_CFGR_DISCEN must be
+   *          specified in continuous mode or if the buffer depth is
+   *          greater than one.
+   */
+  uint32_t                  cfgr2;
+#endif
   /**
    * @brief   ADC TR1 register initialization data.
    */
@@ -675,9 +692,7 @@ typedef struct {
 #if STM32_ADC_DUAL_MODE || defined(__DOXYGEN__)
   /**
    * @brief   ADC CCR register initialization data.
-   * @note    The bits CKMODE, MDMA, DMACFG are enforced internally to the
+   * @note    Put this field to zero if not using oversampling.
-   *          driver, keep them to zero.
-   * @note    This field is only present in dual mode.
    */
   uint32_t                  ccr;
 #endif

readme.txt

@@ -91,6 +91,7 @@
 *****************************************************************************
 
 *** Next ***
+- NEW: Added support for oversampling in STM32 ADCv3 driver.
 - NEW: Restructured the STM32F4xx HAL support, added support for STM32F413,
        added ability to handle the TIMPRE bit, separated the clock tree in
        two distinct implementation to reduce the proliferation of compiler

testhal/STM32/STM32L4xx/ADC/main.c

@@ -59,6 +59,7 @@ static const ADCConversionGroup adcgrpcfg1 = {
   NULL,
   adcerrorcallback,
   ADC_CFGR_CONT,            /* CFGR    */
+  0,                        /* CFGR2   */
   ADC_TR(0, 4095),          /* TR1     */
   {                         /* SMPR[2] */
     0,
@@ -84,6 +85,7 @@ static const ADCConversionGroup adcgrpcfg2 = {
   adccallback,
   adcerrorcallback,
   ADC_CFGR_CONT,                    /* CFGR    */
+  0,                        /* CFGR2   */
   ADC_TR(0, 4095),                  /* TR1     */
   {                                 /* SMPR[2] */
     ADC_SMPR1_SMP_AN5(ADC_SMPR_SMP_24P5)