From e5f7b7b8ff985f57f8a7994c5f7aa3bd33e983ac Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 8 Sep 2013 13:13:31 +0000 Subject: [PATCH] git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/kernel_3_dev@6277 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- .../ARMCMx/compilers/GCC/ld/STM32L152xB.ld | 153 ++++++++++++++++++ .../ports/ARMCMx/devices/STM32F0xx/cmparams.h | 2 +- .../ports/ARMCMx/devices/STM32F30x/cmparams.h | 2 +- .../ports/ARMCMx/devices/STM32F37x/cmparams.h | 2 +- .../ports/ARMCMx/devices/STM32F4xx/cmparams.h | 2 +- .../ports/ARMCMx/devices/STM32L1xx/cmparams.h | 87 ++++++++++ 6 files changed, 244 insertions(+), 4 deletions(-) create mode 100644 os/common/ports/ARMCMx/compilers/GCC/ld/STM32L152xB.ld create mode 100644 os/common/ports/ARMCMx/devices/STM32L1xx/cmparams.h diff --git a/os/common/ports/ARMCMx/compilers/GCC/ld/STM32L152xB.ld b/os/common/ports/ARMCMx/compilers/GCC/ld/STM32L152xB.ld new file mode 100644 index 000000000..966c2cef3 --- /dev/null +++ b/os/common/ports/ARMCMx/compilers/GCC/ld/STM32L152xB.ld @@ -0,0 +1,153 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012,2013 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * ST32L152xB memory setup. + */ +__main_stack_size__ = 0x0400; +__process_stack_size__ = 0x0200; + +MEMORY +{ + flash : org = 0x08000000, len = 128k + ram : org = 0x20000000, len = 16k +} + +__ram_start__ = ORIGIN(ram); +__ram_size__ = LENGTH(ram); +__ram_end__ = __ram_start__ + __ram_size__; + +ENTRY(ResetHandler) + +SECTIONS +{ + . = 0; + _text = .; + + startup : ALIGN(16) SUBALIGN(16) + { + KEEP(*(vectors)) + } > flash + + constructors : ALIGN(4) SUBALIGN(4) + { + PROVIDE(__init_array_start = .); + KEEP(*(SORT(.init_array.*))) + KEEP(*(.init_array)) + PROVIDE(__init_array_end = .); + } > flash + + destructors : ALIGN(4) SUBALIGN(4) + { + PROVIDE(__fini_array_start = .); + KEEP(*(.fini_array)) + KEEP(*(SORT(.fini_array.*))) + PROVIDE(__fini_array_end = .); + } > flash + + .text : ALIGN(16) SUBALIGN(16) + { + *(.text.startup.*) + *(.text) + *(.text.*) + *(.rodata) + *(.rodata.*) + *(.glue_7t) + *(.glue_7) + *(.gcc*) + } > flash + + .ARM.extab : + { + *(.ARM.extab* .gnu.linkonce.armextab.*) + } > flash + + .ARM.exidx : { + PROVIDE(__exidx_start = .); + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + PROVIDE(__exidx_end = .); + } > flash + + .eh_frame_hdr : + { + *(.eh_frame_hdr) + } > flash + + .eh_frame : ONLY_IF_RO + { + *(.eh_frame) + } > flash + + .textalign : ONLY_IF_RO + { + . = ALIGN(8); + } > flash + + . = ALIGN(4); + _etext = .; + _textdata = _etext; + + .stacks : + { + . = ALIGN(8); + __main_stack_base__ = .; + . += __main_stack_size__; + . = ALIGN(8); + __main_stack_end__ = .; + __process_stack_base__ = .; + __main_thread_stack_base__ = .; + . += __process_stack_size__; + . = ALIGN(8); + __process_stack_end__ = .; + __main_thread_stack_end__ = .; + } > ram + + .data : + { + . = ALIGN(4); + PROVIDE(_data = .); + *(.data) + . = ALIGN(4); + *(.data.*) + . = ALIGN(4); + *(.ramtext) + . = ALIGN(4); + PROVIDE(_edata = .); + } > ram AT > flash + + .bss : + { + . = ALIGN(4); + PROVIDE(_bss_start = .); + *(.bss) + . = ALIGN(4); + *(.bss.*) + . = ALIGN(4); + *(COMMON) + . = ALIGN(4); + PROVIDE(_bss_end = .); + } > ram +} + +PROVIDE(end = .); +_end = .; + +__heap_base__ = _end; +__heap_end__ = __ram_end__; diff --git a/os/common/ports/ARMCMx/devices/STM32F0xx/cmparams.h b/os/common/ports/ARMCMx/devices/STM32F0xx/cmparams.h index ed563b106..e0e842e52 100644 --- a/os/common/ports/ARMCMx/devices/STM32F0xx/cmparams.h +++ b/os/common/ports/ARMCMx/devices/STM32F0xx/cmparams.h @@ -55,7 +55,7 @@ /** * @brief Number of interrupt vectors. * @note This number does not include the 16 system vectors and must be - * rounded to a multiple of 4. + * rounded to a multiple of 8. */ #define CORTEX_NUM_VECTORS 32 diff --git a/os/common/ports/ARMCMx/devices/STM32F30x/cmparams.h b/os/common/ports/ARMCMx/devices/STM32F30x/cmparams.h index 84efdb0d3..28bc40724 100644 --- a/os/common/ports/ARMCMx/devices/STM32F30x/cmparams.h +++ b/os/common/ports/ARMCMx/devices/STM32F30x/cmparams.h @@ -55,7 +55,7 @@ /** * @brief Number of interrupt vectors. * @note This number does not include the 16 system vectors and must be - * rounded to a multiple of 4. + * rounded to a multiple of 8. */ #define CORTEX_NUM_VECTORS 88 diff --git a/os/common/ports/ARMCMx/devices/STM32F37x/cmparams.h b/os/common/ports/ARMCMx/devices/STM32F37x/cmparams.h index 5355b2176..45a7d1594 100644 --- a/os/common/ports/ARMCMx/devices/STM32F37x/cmparams.h +++ b/os/common/ports/ARMCMx/devices/STM32F37x/cmparams.h @@ -55,7 +55,7 @@ /** * @brief Number of interrupt vectors. * @note This number does not include the 16 system vectors and must be - * rounded to a multiple of 4. + * rounded to a multiple of 8. */ #define CORTEX_NUM_VECTORS 88 diff --git a/os/common/ports/ARMCMx/devices/STM32F4xx/cmparams.h b/os/common/ports/ARMCMx/devices/STM32F4xx/cmparams.h index 48e279e56..3bb79e75f 100644 --- a/os/common/ports/ARMCMx/devices/STM32F4xx/cmparams.h +++ b/os/common/ports/ARMCMx/devices/STM32F4xx/cmparams.h @@ -55,7 +55,7 @@ /** * @brief Number of interrupt vectors. * @note This number does not include the 16 system vectors and must be - * rounded to a multiple of 4. + * rounded to a multiple of 8. */ #define CORTEX_NUM_VECTORS 88 diff --git a/os/common/ports/ARMCMx/devices/STM32L1xx/cmparams.h b/os/common/ports/ARMCMx/devices/STM32L1xx/cmparams.h new file mode 100644 index 000000000..bd22a1973 --- /dev/null +++ b/os/common/ports/ARMCMx/devices/STM32L1xx/cmparams.h @@ -0,0 +1,87 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012,2013 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file STM32L1xx/cmparams.h + * @brief ARM Cortex-M4 parameters for the STM32L1xx. + * + * @defgroup ARMCMx_STM32L1xx STM32L1xx Specific Parameters + * @ingroup ARMCMx_SPECIFIC + * @details This file contains the Cortex-M4 specific parameters for the + * STM32L1xx platform. + * @{ + */ + +#ifndef _CMPARAMS_H_ +#define _CMPARAMS_H_ + +/** + * @brief Cortex core model. + */ +#define CORTEX_MODEL CORTEX_M3 + +/** + * @brief Memory Protection unit presence. + */ +#define CORTEX_HAS_MPU 1 + +/** + * @brief Floating Point unit presence. + */ +#define CORTEX_HAS_FPU 1 + +/** + * @brief Number of bits in priority masks. + */ +#define CORTEX_PRIORITY_BITS 4 + +/** + * @brief Number of interrupt vectors. + * @note This number does not include the 16 system vectors and must be + * rounded to a multiple of 8. + */ +#define CORTEX_NUM_VECTORS 64 + +/* The following code is not processed when the file is included from an + asm module.*/ +#if !defined(_FROM_ASM_) + +/* Including the device CMSIS header. Note, we are not using the definitions + from this header because we need this file to be usable also from + assembler source files. We verify that the info matches instead.*/ +#include "stm32l1xx.h" + +#if !CORTEX_HAS_MPU != !__MPU_PRESENT +#error "CMSIS __MPU_PRESENT mismatch" +#endif + +#if !CORTEX_HAS_FPU != !__FPU_PRESENT +#error "CMSIS __FPU_PRESENT mismatch" +#endif + +#if CORTEX_PRIORITY_BITS != __NVIC_PRIO_BITS +#error "CMSIS __NVIC_PRIO_BITS mismatch" +#endif + +#endif /* !defined(_FROM_ASM_) */ + +#endif /* _CMPARAMS_H_ */ + +/** @} */