From e6135542e2b55766a22d51fd109aec0445c12ce8 Mon Sep 17 00:00:00 2001 From: Giovanni Di Sirio Date: Sat, 17 Apr 2021 06:52:02 +0000 Subject: [PATCH] Fixed bad ordering of checks in STM32 SPIv2 driver. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@14207 27425a3e-05d8-49a3-a47f-9c15f0e5edd8 --- os/hal/ports/STM32/LLD/SPIv2/hal_spi_lld.h | 50 +++++++++++----------- 1 file changed, 25 insertions(+), 25 deletions(-) diff --git a/os/hal/ports/STM32/LLD/SPIv2/hal_spi_lld.h b/os/hal/ports/STM32/LLD/SPIv2/hal_spi_lld.h index 432bbf813..d495c7688 100644 --- a/os/hal/ports/STM32/LLD/SPIv2/hal_spi_lld.h +++ b/os/hal/ports/STM32/LLD/SPIv2/hal_spi_lld.h @@ -298,16 +298,16 @@ #error "Invalid IRQ priority assigned to SPI5" #endif -#if STM32_SPI_USE_SPIR && \ - !OSAL_IRQ_IS_VALID_PRIORITY(STM32_SPI_SPIR_IRQ_PRIORITY) -#error "Invalid IRQ priority assigned to SPIR" -#endif - #if STM32_SPI_USE_SPI6 && \ !OSAL_IRQ_IS_VALID_PRIORITY(STM32_SPI_SPI6_IRQ_PRIORITY) #error "Invalid IRQ priority assigned to SPI6" #endif +#if STM32_SPI_USE_SPIR && \ + !OSAL_IRQ_IS_VALID_PRIORITY(STM32_SPI_SPIR_IRQ_PRIORITY) +#error "Invalid IRQ priority assigned to SPIR" +#endif + #if STM32_SPI_USE_SPI1 && \ !STM32_DMA_IS_VALID_PRIORITY(STM32_SPI_SPI1_DMA_PRIORITY) #error "Invalid DMA priority assigned to SPI1" @@ -333,16 +333,16 @@ #error "Invalid DMA priority assigned to SPI5" #endif -#if STM32_SPI_USE_SPIR && \ - !STM32_DMA_IS_VALID_PRIORITY(STM32_SPI_SPIR_DMA_PRIORITY) -#error "Invalid DMA priority assigned to SPIR" -#endif - #if STM32_SPI_USE_SPI6 && \ !STM32_DMA_IS_VALID_PRIORITY(STM32_SPI_SPI6_DMA_PRIORITY) #error "Invalid DMA priority assigned to SPI6" #endif +#if STM32_SPI_USE_SPIR && \ + !STM32_DMA_IS_VALID_PRIORITY(STM32_SPI_SPIR_DMA_PRIORITY) +#error "Invalid DMA priority assigned to SPIR" +#endif + /* Check on the presence of the DMA streams settings in mcuconf.h.*/ #if STM32_SPI_USE_SPI1 && (!defined(STM32_SPI_SPI1_RX_DMA_STREAM) || \ !defined(STM32_SPI_SPI1_TX_DMA_STREAM)) @@ -369,16 +369,16 @@ #error "SPI5 DMA streams not defined" #endif -#if STM32_SPI_USE_SPIR && (!defined(STM32_SPI_SPIR_RX_DMA_STREAM) || \ - !defined(STM32_SPI_SPIR_TX_DMA_STREAM)) -#error "SPIR DMA streams not defined" -#endif - #if STM32_SPI_USE_SPI6 && (!defined(STM32_SPI_SPI6_RX_DMA_STREAM) || \ !defined(STM32_SPI_SPI6_TX_DMA_STREAM)) #error "SPI6 DMA streams not defined" #endif +#if STM32_SPI_USE_SPIR && (!defined(STM32_SPI_SPIR_RX_DMA_STREAM) || \ + !defined(STM32_SPI_SPIR_TX_DMA_STREAM)) +#error "SPIR DMA streams not defined" +#endif + /* Check on the validity of the assigned DMA channels.*/ #if STM32_SPI_USE_SPI1 && \ !STM32_DMA_IS_VALID_STREAM(STM32_SPI_SPI1_TX_DMA_STREAM) @@ -430,6 +430,11 @@ #error "Invalid DMA channel assigned to SPI6 RX" #endif +#if STM32_SPI_USE_SPI6 && \ + !STM32_DMA_IS_VALID_STREAM(STM32_SPI_SPI6_TX_DMA_STREAM) +#error "Invalid DMA channel assigned to SPI6 TX" +#endif + #if STM32_SPI_USE_SPIR && \ !STM32_DMA_IS_VALID_STREAM(STM32_SPI_SPIR_RX_DMA_STREAM) #error "Invalid DMA channel assigned to SPIR RX" @@ -440,11 +445,6 @@ #error "Invalid DMA channel assigned to SPIR TX" #endif -#if STM32_SPI_USE_SPI6 && \ - !STM32_DMA_IS_VALID_STREAM(STM32_SPI_SPI6_TX_DMA_STREAM) -#error "Invalid DMA channel assigned to SPI6 TX" -#endif - /* Devices without DMAMUX require an additional check.*/ #if STM32_ADVANCED_DMA && !STM32_DMA_SUPPORTS_DMAMUX @@ -504,6 +504,11 @@ #error "invalid DMA stream associated to SPI6 RX" #endif +#if STM32_SPI_USE_SPI6 && \ + !STM32_DMA_IS_VALID_ID(STM32_SPI_SPI6_TX_DMA_STREAM, STM32_SPI6_TX_DMA_MSK) +#error "invalid DMA stream associated to SPI6 TX" +#endif + #if STM32_SPI_USE_SPIR && \ !STM32_DMA_IS_VALID_ID(STM32_SPI_SPIR_RX_DMA_STREAM, STM32_SPIR_RX_DMA_MSK) #error "invalid DMA stream associated to SPIR RX" @@ -514,11 +519,6 @@ #error "invalid DMA stream associated to SPIR TX" #endif -#if STM32_SPI_USE_SPI6 && \ - !STM32_DMA_IS_VALID_ID(STM32_SPI_SPI6_TX_DMA_STREAM, STM32_SPI6_TX_DMA_MSK) -#error "invalid DMA stream associated to SPI6 TX" -#endif - #endif /* STM32_ADVANCED_DMA && !STM32_DMA_SUPPORTS_DMAMUX */ #if !defined(STM32_DMA_REQUIRED)