diff --git a/demos/STM32/RT-STM32G071RB-NUCLEO64/cfg/halconf.h b/demos/STM32/RT-STM32G071RB-NUCLEO64/cfg/halconf.h index 7d79fba37..757d5a99b 100644 --- a/demos/STM32/RT-STM32G071RB-NUCLEO64/cfg/halconf.h +++ b/demos/STM32/RT-STM32G071RB-NUCLEO64/cfg/halconf.h @@ -191,7 +191,7 @@ * @brief Enables the WDG subsystem. */ #if !defined(HAL_USE_WDG) || defined(__DOXYGEN__) -#define HAL_USE_WDG TRUE +#define HAL_USE_WDG FALSE #endif /** diff --git a/demos/STM32/RT-STM32G071RB-NUCLEO64/cfg/mcuconf.h b/demos/STM32/RT-STM32G071RB-NUCLEO64/cfg/mcuconf.h index c1529d7d0..1c32c8859 100644 --- a/demos/STM32/RT-STM32G071RB-NUCLEO64/cfg/mcuconf.h +++ b/demos/STM32/RT-STM32G071RB-NUCLEO64/cfg/mcuconf.h @@ -78,13 +78,15 @@ #define STM32_RTCSEL STM32_RTCSEL_NOCLOCK /* - * Shared IRQ settings. + * IRQ settings. */ #define STM32_IRQ_EXTI0_1_PRIORITY 3 #define STM32_IRQ_EXTI2_3_PRIORITY 3 #define STM32_IRQ_EXTI4_15_PRIORITY 3 #define STM32_IRQ_EXTI16_PRIORITY 3 #define STM32_IRQ_EXTI17_18_PRIORITY 3 +#define STM32_IRQ_USART1_PRIORITY 3 +#define STM32_IRQ_USART2_PRIORITY 3 #define STM32_IRQ_USART3_4_LP1_PRIORITY 3 /* @@ -150,11 +152,6 @@ #define STM32_SERIAL_USE_USART3 FALSE #define STM32_SERIAL_USE_UART4 FALSE #define STM32_SERIAL_USE_LPUART1 FALSE -#define STM32_SERIAL_USART1_PRIORITY 3 -#define STM32_SERIAL_USART2_PRIORITY 3 -#define STM32_SERIAL_USART3_PRIORITY 3 -#define STM32_SERIAL_UART4_PRIORITY 3 -#define STM32_SERIAL_LPUART1_PRIORITY 3 /* * SPI driver system settings. @@ -196,18 +193,11 @@ #define STM32_UART_USART3_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY #define STM32_UART_UART4_RX_DMA_STREAM STM32_DMA_STREAM_ID_ANY #define STM32_UART_UART4_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY -#define STM32_UART_USART1_IRQ_PRIORITY 3 -#define STM32_UART_USART2_IRQ_PRIORITY 3 -#define STM32_UART_USART3_IRQ_PRIORITY 3 -#define STM32_UART_UART4_IRQ_PRIORITY 3 -#define STM32_UART_USART1_DMA_PRIORITY 0 -#define STM32_UART_USART2_DMA_PRIORITY 0 -#define STM32_UART_USART3_DMA_PRIORITY 0 #define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure") /* * WDG driver system settings. */ -#define STM32_WDG_USE_IWDG TRUE +#define STM32_WDG_USE_IWDG FALSE #endif /* MCUCONF_H */ diff --git a/os/hal/ports/STM32/LLD/USARTv2/hal_serial_lld.c b/os/hal/ports/STM32/LLD/USARTv2/hal_serial_lld.c index 045b0ed3d..a45d617c0 100644 --- a/os/hal/ports/STM32/LLD/USARTv2/hal_serial_lld.c +++ b/os/hal/ports/STM32/LLD/USARTv2/hal_serial_lld.c @@ -431,44 +431,6 @@ OSAL_IRQ_HANDLER(STM32_USART2_HANDLER) { #endif #endif -#if defined(STM32_USART3_8_HANDLER) -#if STM32_SERIAL_USE_USART3 || STM32_SERIAL_USE_UART4 || \ - STM32_SERIAL_USE_UART5 || STM32_SERIAL_USE_USART6 || \ - STM32_SERIAL_USE_UART7 || STM32_SERIAL_USE_UART8 || defined(__DOXYGEN__) -/** - * @brief USART3..8 interrupt handler. - * - * @isr - */ -OSAL_IRQ_HANDLER(STM32_USART3_8_HANDLER) { - - OSAL_IRQ_PROLOGUE(); - -#if STM32_SERIAL_USE_USART3 - sd_lld_serve_interrupt(&SD3); -#endif -#if STM32_SERIAL_USE_UART4 - sd_lld_serve_interrupt(&SD4); -#endif -#if STM32_SERIAL_USE_UART5 - sd_lld_serve_interrupt(&SD5); -#endif -#if STM32_SERIAL_USE_USART6 - sd_lld_serve_interrupt(&SD6); -#endif -#if STM32_SERIAL_USE_UART7 - sd_lld_serve_interrupt(&SD7); -#endif -#if STM32_SERIAL_USE_UART8 - sd_lld_serve_interrupt(&SD8); -#endif - - OSAL_IRQ_EPILOGUE(); -} -#endif - -#else /* !defined(STM32_USART3_8_HANDLER) */ - #if STM32_SERIAL_USE_USART3 || defined(__DOXYGEN__) #if !defined(STM32_USART3_SUPPRESS_ISR) #if !defined(STM32_USART3_HANDLER) @@ -595,8 +557,6 @@ OSAL_IRQ_HANDLER(STM32_UART8_HANDLER) { #endif #endif -#endif /* !defined(STM32_USART3_8_HANDLER) */ - #if STM32_SERIAL_USE_LPUART1 || defined(__DOXYGEN__) #if !defined(STM32_LPUART1_SUPPRESS_ISR) #if !defined(STM32_LPUART1_HANDLER) diff --git a/os/hal/ports/STM32/LLD/USARTv2/hal_serial_lld.h b/os/hal/ports/STM32/LLD/USARTv2/hal_serial_lld.h index 20991f6a9..b7e5c3f52 100644 --- a/os/hal/ports/STM32/LLD/USARTv2/hal_serial_lld.h +++ b/os/hal/ports/STM32/LLD/USARTv2/hal_serial_lld.h @@ -375,60 +375,56 @@ #error "SERIAL driver activated but no USART/UART peripheral assigned" #endif -#if STM32_SERIAL_USE_USART1 && \ +#if !defined(STM32_USART1_SUPPRESS_ISR) && \ + STM32_SERIAL_USE_USART1 && \ !OSAL_IRQ_IS_VALID_PRIORITY(STM32_SERIAL_USART1_PRIORITY) #error "Invalid IRQ priority assigned to USART1" #endif -#if STM32_SERIAL_USE_USART2 && \ +#if !defined(STM32_USART2_SUPPRESS_ISR) && \ + STM32_SERIAL_USE_USART2 && \ !OSAL_IRQ_IS_VALID_PRIORITY(STM32_SERIAL_USART2_PRIORITY) #error "Invalid IRQ priority assigned to USART2" #endif -#if defined(STM32_USART3_8_HANDLER) - -#if (STM32_SERIAL_USE_USART3 || STM32_SERIAL_USE_UART4 || \ - STM32_SERIAL_USE_UART5 || STM32_SERIAL_USE_USART6 || \ - STM32_SERIAL_USE_UART7 || STM32_SERIAL_USE_UART8) && \ - !OSAL_IRQ_IS_VALID_PRIORITY(STM32_SERIAL_USART3_8_PRIORITY) -#error "Invalid IRQ priority assigned to USART3..8" -#endif - -#else /* !defined(STM32_USART3_8_HANDLER) */ - -#if STM32_SERIAL_USE_USART3 && \ +#if !defined(STM32_USART3_SUPPRESS_ISR) && \ + STM32_SERIAL_USE_USART3 && \ !OSAL_IRQ_IS_VALID_PRIORITY(STM32_SERIAL_USART3_PRIORITY) #error "Invalid IRQ priority assigned to USART3" #endif -#if STM32_SERIAL_USE_UART4 && \ +#if !defined(STM32_UART4_SUPPRESS_ISR) && \ + STM32_SERIAL_USE_UART4 && \ !OSAL_IRQ_IS_VALID_PRIORITY(STM32_SERIAL_UART4_PRIORITY) #error "Invalid IRQ priority assigned to UART4" #endif -#if STM32_SERIAL_USE_UART5 && \ +#if !defined(STM32_UART5_SUPPRESS_ISR) && \ + STM32_SERIAL_USE_UART5 && \ !OSAL_IRQ_IS_VALID_PRIORITY(STM32_SERIAL_UART5_PRIORITY) #error "Invalid IRQ priority assigned to UART5" #endif -#if STM32_SERIAL_USE_USART6 && \ +#if !defined(STM32_USART6_SUPPRESS_ISR) && \ + STM32_SERIAL_USE_USART6 && \ !OSAL_IRQ_IS_VALID_PRIORITY(STM32_SERIAL_USART6_PRIORITY) #error "Invalid IRQ priority assigned to USART6" #endif -#if STM32_SERIAL_USE_UART7 && \ +#if !defined(STM32_UART7_SUPPRESS_ISR) && \ + STM32_SERIAL_USE_UART7 && \ !OSAL_IRQ_IS_VALID_PRIORITY(STM32_SERIAL_UART7_PRIORITY) #error "Invalid IRQ priority assigned to UART7" #endif -#if STM32_SERIAL_USE_UART8 && \ +#if !defined(STM32_UART8_SUPPRESS_ISR) && \ + STM32_SERIAL_USE_UART8 && \ !OSAL_IRQ_IS_VALID_PRIORITY(STM32_SERIAL_UART8_PRIORITY) #error "Invalid IRQ priority assigned to UART8" #endif -#endif /* !defined(STM32_USART3_8_HANDLER) */ - -#if STM32_SERIAL_USE_LPUART1 && \ +#if !defined(STM32_LPUART1_SUPPRESS_ISR) && \ + STM32_SERIAL_USE_LPUART1 && \ !OSAL_IRQ_IS_VALID_PRIORITY(STM32_SERIAL_LPUART1_PRIORITY) #error "Invalid IRQ priority assigned to LPUART1" #endif diff --git a/os/hal/ports/STM32/STM32G0xx/stm32_isr.c b/os/hal/ports/STM32/STM32G0xx/stm32_isr.c index 65bfe0d9e..149c44300 100644 --- a/os/hal/ports/STM32/STM32G0xx/stm32_isr.c +++ b/os/hal/ports/STM32/STM32G0xx/stm32_isr.c @@ -131,17 +131,75 @@ OSAL_IRQ_HANDLER(Vector5C) { #endif #endif /* HAL_USE_PAL && (PAL_USE_WAIT || PAL_USE_CALLBACKS) */ -#if STM32_SERIAL_USE_USART3 || STM32_SERIAL_USE_UART4 || \ - STM32_SERIAL_USE_LPUART1 || defined(__DOXYGEN__) +#if HAL_USE_SERIAL || HAL_USE_UART || defined(__DOXYGEN__) +#if !defined(STM32_DISABLE_USART1_HANDLER) +#if STM32_SERIAL_USE_USART1 || STM32_UART_USE_USART1 /** - * @brief USART3, USART4 and LPUART1 interrupt handler. + * @brief USART1 interrupt handler. * * @isr */ -OSAL_IRQ_HANDLER(STM32_USART3_4_LP1_HANDLER) { +OSAL_IRQ_HANDLER(STM32_USART1_HANDLER) { OSAL_IRQ_PROLOGUE(); +#if HAL_USE_SERIAL +#if STM32_SERIAL_USE_USART1 + sd_lld_serve_interrupt(&SD1); +#endif +#endif +#if HAL_USE_UART +#if STM32_UART_USE_USART1 + uart_lld_serve_interrupt(&UARTD1); +#endif +#endif + + OSAL_IRQ_EPILOGUE(); +} +#endif +#endif + +#if !defined(STM32_DISABLE_USART2_HANDLER) +#if STM32_SERIAL_USE_USART2 || STM32_UART_USE_USART2 +/** + * @brief USART2 interrupt handler. + * + * @isr + */ +OSAL_IRQ_HANDLER(STM32_USART2_HANDLER) { + + OSAL_IRQ_PROLOGUE(); + +#if HAL_USE_SERIAL +#if STM32_SERIAL_USE_USART2 + sd_lld_serve_interrupt(&SD2); +#endif +#endif +#if HAL_USE_UART +#if STM32_UART_USE_USART2 + uart_lld_serve_interrupt(&UARTD2); +#endif +#endif + + OSAL_IRQ_EPILOGUE(); +} +#endif +#endif + +#if !defined(STM32_DISABLE_USART34LP1_HANDLER) +#if STM32_SERIAL_USE_USART3 || STM32_SERIAL_USE_UART4 || \ + STM32_SERIAL_USE_LPUART1 || STM32_UART_USE_USART3 || \ + STM32_UART_USE_UART4 +/** + * @brief USART 3, 4 and LP1 interrupt handler. + * + * @isr + */ +OSAL_IRQ_HANDLER(STM32_USART34LP1_HANDLER) { + + OSAL_IRQ_PROLOGUE(); + +#if HAL_USE_SERIAL #if STM32_SERIAL_USE_USART3 sd_lld_serve_interrupt(&SD3); #endif @@ -150,11 +208,22 @@ OSAL_IRQ_HANDLER(STM32_USART3_4_LP1_HANDLER) { #endif #if STM32_SERIAL_USE_LPUART1 sd_lld_serve_interrupt(&LPSD1); +#endif +#endif +#if HAL_USE_UART +#if STM32_UART_USE_USART3 + uart_lld_serve_interrupt(&UARTD3); +#endif +#if STM32_UART_USE_UART4 + uart_lld_serve_interrupt(&UARTD4); +#endif #endif OSAL_IRQ_EPILOGUE(); } #endif +#endif +#endif /* HAL_USE_SERIAL || HAL_USE_UART */ /*===========================================================================*/ /* Driver exported functions. */ @@ -172,8 +241,11 @@ void irqInit(void) { nvicEnableVector(EXTI2_3_IRQn, STM32_IRQ_EXTI2_3_PRIORITY); nvicEnableVector(EXTI4_15_IRQn, STM32_IRQ_EXTI4_15_PRIORITY); #endif -#if HAL_USE_SERIAL - nvicEnableVector(USART3_4_LPUART1_IRQn, STM32_IRQ_USART3_4_LP1_PRIORITY); + +#if HAL_USE_SERIAL || HAL_USE_UART + nvicEnableVector(STM32_USART1_NUMBER, STM32_IRQ_USART1_PRIORITY); + nvicEnableVector(STM32_USART2_NUMBER, STM32_IRQ_USART2_PRIORITY); + nvicEnableVector(STM32_USART3_4_LP1_NUMBER, STM32_IRQ_USART3_4_LP1_PRIORITY); #endif } @@ -189,8 +261,11 @@ void irqDeinit(void) { nvicDisableVector(EXTI2_3_IRQn); nvicDisableVector(EXTI4_15_IRQn); #endif -#if HAL_USE_SERIAL - nvicDisableVector(USART3_4_LPUART1_IRQn); + +#if HAL_USE_SERIAL || HAL_USE_UART + nvicDisableVector(STM32_USART1_NUMBER); + nvicDisableVector(STM32_USART2_NUMBER); + nvicDisableVector(STM32_USART3_4_LP1_NUMBER); #endif } diff --git a/os/hal/ports/STM32/STM32G0xx/stm32_isr.h b/os/hal/ports/STM32/STM32G0xx/stm32_isr.h index 69fb955fe..636ba6e05 100644 --- a/os/hal/ports/STM32/STM32G0xx/stm32_isr.h +++ b/os/hal/ports/STM32/STM32G0xx/stm32_isr.h @@ -33,6 +33,8 @@ * @name ISRs suppressed in standard drivers * @{ */ +#define STM32_USART1_SUPPRESS_ISR +#define STM32_USART2_SUPPRESS_ISR #define STM32_USART3_SUPPRESS_ISR #define STM32_UART4_SUPPRESS_ISR #define STM32_LPUART1_SUPPRESS_ISR @@ -42,58 +44,65 @@ * @name ISR names and numbers remapping * @{ */ +/* + * EXTI unit. + */ +#define STM32_EXTI_LINE01_HANDLER Vector54 +#define STM32_EXTI_LINE23_HANDLER Vector58 +#define STM32_EXTI_LINE4_15_HANDLER Vector5C +#define STM32_EXTI_LINE16_HANDLER Vector44 +#define STM32_EXTI_LINE1921_HANDLER Vector48 + +#define STM32_EXTI_LINE01_NUMBER 5 +#define STM32_EXTI_LINE23_NUMBER 6 +#define STM32_EXTI_LINE4_15_NUMBER 7 +#define STM32_EXTI_LINE16_NUMBER 1 +#define STM32_EXTI_LINE1921_NUMBER 2 + /* * I2C units. */ -#define STM32_I2C1_GLOBAL_HANDLER Vector9C -#define STM32_I2C1_GLOBAL_NUMBER 23 +#define STM32_I2C1_GLOBAL_HANDLER Vector9C +#define STM32_I2C2_GLOBAL_HANDLER VectorA0 -#define STM32_I2C2_GLOBAL_HANDLER VectorA0 -#define STM32_I2C2_GLOBAL_NUMBER 24 +#define STM32_I2C1_GLOBAL_NUMBER 23 +#define STM32_I2C2_GLOBAL_NUMBER 24 /* * TIM units. */ -#define STM32_TIM1_UP_HANDLER Vector74 -#define STM32_TIM1_CC_HANDLER Vector78 -#define STM32_TIM2_HANDLER Vector7C -#define STM32_TIM3_HANDLER VectorB4 -#define STM32_TIM6_HANDLER Vector84 -#define STM32_TIM7_HANDLER Vector88 -#define STM32_TIM14_HANDLER Vector8C -#define STM32_TIM15_HANDLER Vector90 -#define STM32_TIM16_HANDLER Vector94 -#define STM32_TIM17_HANDLER Vector98 +#define STM32_TIM1_UP_HANDLER Vector74 +#define STM32_TIM1_CC_HANDLER Vector78 +#define STM32_TIM2_HANDLER Vector7C +#define STM32_TIM3_HANDLER VectorB4 +#define STM32_TIM6_HANDLER Vector84 +#define STM32_TIM7_HANDLER Vector88 +#define STM32_TIM14_HANDLER Vector8C +#define STM32_TIM15_HANDLER Vector90 +#define STM32_TIM16_HANDLER Vector94 +#define STM32_TIM17_HANDLER Vector98 -#define STM32_TIM1_UP_NUMBER 13 -#define STM32_TIM1_CC_NUMBER 14 -#define STM32_TIM2_NUMBER 15 -#define STM32_TIM3_NUMBER 29 -#define STM32_TIM6_NUMBER 17 -#define STM32_TIM7_NUMBER 18 -#define STM32_TIM14_NUMBER 19 -#define STM32_TIM15_NUMBER 20 -#define STM32_TIM16_NUMBER 21 -#define STM32_TIM17_NUMBER 22 +#define STM32_TIM1_UP_NUMBER 13 +#define STM32_TIM1_CC_NUMBER 14 +#define STM32_TIM2_NUMBER 15 +#define STM32_TIM3_NUMBER 29 +#define STM32_TIM6_NUMBER 17 +#define STM32_TIM7_NUMBER 18 +#define STM32_TIM14_NUMBER 19 +#define STM32_TIM15_NUMBER 20 +#define STM32_TIM16_NUMBER 21 +#define STM32_TIM17_NUMBER 22 /* - * USART units. + * USART/UART units. */ -#define STM32_USART1_HANDLER VectorAC -#define STM32_USART2_HANDLER VectorB0 -#define STM32_USART3_4_LP1_HANDLER VectorB4 +#define STM32_USART1_HANDLER VectorAC +#define STM32_USART2_HANDLER VectorB0 +#define STM32_USART3_4_LP1_HANDLER VectorB4 -#define STM32_USART1_NUMBER 27 -#define STM32_USART2_NUMBER 28 -#define STM32_USART3_4_LP1_NUMBER 29 - -/* - * USB units. - */ -#define STM32_USB1_LP_HANDLER VectorBC -#define STM32_USB1_LP_NUMBER 31 -#define STM32_USB1_HP_HANDLER VectorBC -#define STM32_USB1_HP_NUMBER 31 +#define STM32_USART1_NUMBER 27 +#define STM32_USART2_NUMBER 28 +#define STM32_USART3_4_LP1_NUMBER 29 /** @} */ /*===========================================================================*/ @@ -140,7 +149,21 @@ #endif /** - * @brief EXTI17..18 interrupt priority level setting. + * @brief USART1 interrupt priority level setting. + */ +#if !defined(STM32_IRQ_USART1_PRIORITY) || defined(__DOXYGEN__) +#define STM32_IRQ_USART1_PRIORITY 3 +#endif + +/** + * @brief USART2 interrupt priority level setting. + */ +#if !defined(STM32_IRQ_USART2_PRIORITY) || defined(__DOXYGEN__) +#define STM32_IRQ_USART2_PRIORITY 3 +#endif + +/** + * @brief USART3, 4 and LP1 interrupt priority level setting. */ #if !defined(STM32_IRQ_USART3_4_LP1_PRIORITY) || defined(__DOXYGEN__) #define STM32_IRQ_USART3_4_LP1_PRIORITY 3 @@ -172,6 +195,14 @@ #error "Invalid IRQ priority assigned to STM32_IRQ_EXTI17_18_PRIORITY" #endif +#if !OSAL_IRQ_IS_VALID_PRIORITY(STM32_IRQ_USART1_PRIORITY) +#error "Invalid IRQ priority assigned to STM32_IRQ_USART1_PRIORITY" +#endif + +#if !OSAL_IRQ_IS_VALID_PRIORITY(STM32_IRQ_USART2_PRIORITY) +#error "Invalid IRQ priority assigned to STM32_IRQ_USART2_PRIORITY" +#endif + #if !OSAL_IRQ_IS_VALID_PRIORITY(STM32_IRQ_USART3_4_LP1_PRIORITY) #error "Invalid IRQ priority assigned to STM32_IRQ_USART3_4_LP1_PRIORITY" #endif diff --git a/os/hal/ports/STM32/STM32G0xx/stm32_registry.h b/os/hal/ports/STM32/STM32G0xx/stm32_registry.h index a03bd2e9b..fa7273f36 100644 --- a/os/hal/ports/STM32/STM32G0xx/stm32_registry.h +++ b/os/hal/ports/STM32/STM32G0xx/stm32_registry.h @@ -127,18 +127,6 @@ #define STM32_EXTI_NUM_LINES 16 #define STM32_EXTI_IMR1_MASK 0xFFF80000U -#define STM32_EXTI_LINE01_HANDLER Vector54 -#define STM32_EXTI_LINE23_HANDLER Vector58 -#define STM32_EXTI_LINE4_15_HANDLER Vector5C -#define STM32_EXTI_LINE16_HANDLER Vector44 -#define STM32_EXTI_LINE1921_HANDLER Vector48 - -#define STM32_EXTI_LINE01_NUMBER 5 -#define STM32_EXTI_LINE23_NUMBER 6 -#define STM32_EXTI_LINE4_15_NUMBER 7 -#define STM32_EXTI_LINE16_NUMBER 1 -#define STM32_EXTI_LINE1921_NUMBER 2 - /* GPIO attributes.*/ #define STM32_HAS_GPIOA TRUE #define STM32_HAS_GPIOB TRUE @@ -337,18 +325,6 @@ #define STM32_EXTI_IMR1_MASK 0xFFF80000U #define STM32_EXTI_IMR2_MASK 0xFFFFFFFFU -#define STM32_EXTI_LINE01_HANDLER Vector54 -#define STM32_EXTI_LINE23_HANDLER Vector58 -#define STM32_EXTI_LINE4_15_HANDLER Vector5C -#define STM32_EXTI_LINE16_HANDLER Vector44 -#define STM32_EXTI_LINE1921_HANDLER Vector48 - -#define STM32_EXTI_LINE01_NUMBER 5 -#define STM32_EXTI_LINE23_NUMBER 6 -#define STM32_EXTI_LINE4_15_NUMBER 7 -#define STM32_EXTI_LINE16_NUMBER 1 -#define STM32_EXTI_LINE1921_NUMBER 2 - /* GPIO attributes.*/ #define STM32_HAS_GPIOA TRUE #define STM32_HAS_GPIOB TRUE diff --git a/os/hal/ports/STM32/STM32L0xx/stm32_isr.h b/os/hal/ports/STM32/STM32L0xx/stm32_isr.h index 3fa3dcc2a..73fd1c775 100644 --- a/os/hal/ports/STM32/STM32L0xx/stm32_isr.h +++ b/os/hal/ports/STM32/STM32L0xx/stm32_isr.h @@ -84,6 +84,31 @@ /* Derived constants and error checks. */ /*===========================================================================*/ +/* IRQ priority checks.*/ +#if !OSAL_IRQ_IS_VALID_PRIORITY(STM32_IRQ_EXTI0_1_PRIORITY) +#error "Invalid IRQ priority assigned to STM32_IRQ_EXTI0_1_PRIORITY" +#endif + +#if !OSAL_IRQ_IS_VALID_PRIORITY(STM32_IRQ_EXTI2_3_PRIORITY) +#error "Invalid IRQ priority assigned to STM32_IRQ_EXTI2_3_PRIORITY" +#endif + +#if !OSAL_IRQ_IS_VALID_PRIORITY(STM32_IRQ_EXTI4_15_PRIORITY) +#error "Invalid IRQ priority assigned to STM32_IRQ_EXTI4_15_PRIORITY" +#endif + +#if !OSAL_IRQ_IS_VALID_PRIORITY(STM32_IRQ_EXTI16_PRIORITY) +#error "Invalid IRQ priority assigned to STM32_IRQ_EXTI16_PRIORITY" +#endif + +#if !OSAL_IRQ_IS_VALID_PRIORITY(STM32_IRQ_EXTI17_20_PRIORITY) +#error "Invalid IRQ priority assigned to STM32_IRQ_EXTI17_20_PRIORITY" +#endif + +#if !OSAL_IRQ_IS_VALID_PRIORITY(STM32_IRQ_EXTI21_22_PRIORITY) +#error "Invalid IRQ priority assigned to STM32_IRQ_EXTI21_22_PRIORITY" +#endif + /*===========================================================================*/ /* Driver data structures and types. */ /*===========================================================================*/