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ChibiOS
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git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2527 35acf78f-673a-0410-8e92-d51de3d6d3f4

This commit is contained in:
gdisirio 2010-12-24 20:49:28 +00:00
parent ebf1e0a604
commit ea76e46321
4 changed files with 11 additions and 16 deletions
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21
demos/ARMCM3-STM32F100-DISCOVERY-GCC/main.c
View File

@ -32,7 +32,7 @@ static void spicb(SPIDriver *spip);
#define ADC_GRP1_BUF_DEPTH 4
/*
* ADC samples buffer.
* ADC samples buffer.
*/
static adcsample_t samples[ADC_GRP1_NUM_CHANNELS * ADC_GRP1_BUF_DEPTH];
@ -56,16 +56,10 @@ static const ADCConversionGroup adcgrpcfg = {
ADC_SQR3_SQ1_N(ADC_CHANNEL_IN10) | ADC_SQR3_SQ0_N(ADC_CHANNEL_SENSOR)
};
/*
* ADC configuration structure, empty for STM32, there is nothing to configure.
*/
static const ADCConfig adccfg = {
};
/*
* PWM configuration structure.
* Cyclic callback enabled, channels 3 and 4 enabled without callbacks,
* the active state is a logic one.
* the active state is a logic one.
*/
static PWMConfig pwmcfg = {
pwmpcb,
@ -113,7 +107,7 @@ static void pwmpcb(PWMDriver *pwmp) {
/*
* ADC end conversion callback.
* The PWM channels are reprogrammed using the latest ADC samples.
* The latest samples are transmitted into a single SPI transaction.
* The latest samples are transmitted into a single SPI transaction.
*/
void adccb(ADCDriver *adcp, adcsample_t *buffer, size_t n) {
@ -143,7 +137,7 @@ void adccb(ADCDriver *adcp, adcsample_t *buffer, size_t n) {
}
/*
* SPI end transfer callback.
* SPI end transfer callback.
*/
static void spicb(SPIDriver *spip) {
@ -192,13 +186,13 @@ int main(void) {
/*
* If the user button is pressed after the reset then the test suite is
* executed immediately before activating the various device drivers in
* order to not alter the benchmark scores.
* order to not alter the benchmark scores.
*/
if (palReadPad(GPIOA, GPIOA_BUTTON))
TestThread(&SD1);
/*
* Initializes the SPI driver 1.
* Initializes the SPI driver 1.
*/
spiStart(&SPID1, &spicfg);
@ -217,7 +211,7 @@ int main(void) {
* Initializes the ADC driver 1 and performs a conversion.
* The pin PC0 on the port GPIOC is programmed as analog input.
*/
adcStart(&ADCD1, &adccfg);
adcStart(&ADCD1, NULL);
palSetGroupMode(GPIOC, PAL_PORT_BIT(0), PAL_MODE_INPUT_ANALOG);
adcConvert(&ADCD1, &adcgrpcfg, samples, ADC_GRP1_BUF_DEPTH);
@ -237,5 +231,4 @@ int main(void) {
TestThread(&SD1);
chThdSleepMilliseconds(500);
}
return 0;
}

1
os/hal/platforms/STM32/adc_lld.h
View File

@ -211,6 +211,7 @@ typedef struct {
* @note It could be empty on some architectures.
*/
typedef struct {
uint32_t dummy;
} ADCConfig;
/**

3
os/hal/platforms/STM32/pwm_lld.c
View File

@ -105,7 +105,8 @@ PWMDriver PWMD5;
static void serve_interrupt(PWMDriver *pwmp) {
uint16_t sr;
sr = pwmp->pd_tim->SR & pwmp->pd_tim->DIER;
sr = pwmp->pd_tim->SR;
sr &= pwmp->pd_tim->DIER;
pwmp->pd_tim->SR = ~(TIM_SR_CC1IF | TIM_SR_CC2IF | TIM_SR_CC3IF |
TIM_SR_CC4IF | TIM_SR_UIF);
if ((sr & TIM_SR_CC1IF) != 0)

2
os/hal/platforms/STM32/pwm_lld.h
View File

@ -262,7 +262,7 @@ struct PWMDriver {
* make sure that the source clock frequency is a multiple of the
* requested PWM clock frequency.
* @note The calculated value must fit into an unsigned 16 bits integer.
*
*
* @param[in] clksrc clock source frequency, depending on the target timer
* cell it can be one of:
* - STM32_TIMCLK1