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ChibiOS
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git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5587 35acf78f-673a-0410-8e92-d51de3d6d3f4

This commit is contained in:
gdisirio 2013-04-11 08:41:55 +00:00
parent df7afc9b41
commit ea93f0e55e
4 changed files with 1 additions and 64 deletions
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21
os/ports/GCC/PPC/SPC563Mxx/core.s
View File

@ -181,28 +181,7 @@ _ivinit:
/*
* Unhandled exceptions handler.
*/
.weak _IVOR0, _IVOR1, _IVOR2, _IVOR3, _IVOR4, _IVOR5
.weak _IVOR6, _IVOR7, _IVOR8, _IVOR9, _IVOR10, _IVOR11
.weak _IVOR12, _IVOR13, _IVOR14, _IVOR15, _IVOR32, _IVOR33
.weak _IVOR34
.weak _unhandled_exception
_IVOR0:
_IVOR1:
_IVOR2:
_IVOR3:
_IVOR5:
_IVOR6:
_IVOR7:
_IVOR8:
_IVOR9:
_IVOR11:
_IVOR12:
_IVOR13:
_IVOR14:
_IVOR15:
_IVOR32:
_IVOR33:
_IVOR34:
.type _unhandled_exception, @function
_unhandled_exception:
b _unhandled_exception

21
os/ports/GCC/PPC/SPC564Axx/core.s
View File

@ -209,28 +209,7 @@ _ivinit:
/*
* Unhandled exceptions handler.
*/
.weak _IVOR0, _IVOR1, _IVOR2, _IVOR3, _IVOR4, _IVOR5
.weak _IVOR6, _IVOR7, _IVOR8, _IVOR9, _IVOR10, _IVOR11
.weak _IVOR12, _IVOR13, _IVOR14, _IVOR15, _IVOR32, _IVOR33
.weak _IVOR34
.weak _unhandled_exception
_IVOR0:
_IVOR1:
_IVOR2:
_IVOR3:
_IVOR5:
_IVOR6:
_IVOR7:
_IVOR8:
_IVOR9:
_IVOR11:
_IVOR12:
_IVOR13:
_IVOR14:
_IVOR15:
_IVOR32:
_IVOR33:
_IVOR34:
.type _unhandled_exception, @function
_unhandled_exception:
b _unhandled_exception

21
os/ports/GCC/PPC/SPC56ELxx/core.s
View File

@ -510,28 +510,7 @@ _ivinit:
/*
* Unhandled exceptions handler.
*/
.weak _IVOR0, _IVOR1, _IVOR2, _IVOR3, _IVOR4, _IVOR5
.weak _IVOR6, _IVOR7, _IVOR8, _IVOR9, _IVOR10, _IVOR11
.weak _IVOR12, _IVOR13, _IVOR14, _IVOR15, _IVOR32, _IVOR33
.weak _IVOR34
.weak _unhandled_exception
_IVOR0:
_IVOR1:
_IVOR2:
_IVOR3:
_IVOR5:
_IVOR6:
_IVOR7:
_IVOR8:
_IVOR9:
_IVOR11:
_IVOR12:
_IVOR13:
_IVOR14:
_IVOR15:
_IVOR32:
_IVOR33:
_IVOR34:
.type _unhandled_exception, @function
_unhandled_exception:
b _unhandled_exception

2
os/ports/GCC/PPC/chcore.c
View File

@ -34,7 +34,7 @@
*/
void port_init(void) {
#if PPC_SUPPORTS_IVORS
/* The CPU support IVOR registers, the kernel requires IVOR4 and IVOR10
/* The CPU supports IVOR registers, the kernel requires IVOR4 and IVOR10
and the initialization is performed here.*/
asm volatile ("li %%r3, _IVOR4@l \t\n"
"mtIVOR4 %%r3 \t\n"