From eb07eec9a0880a6521d411f2794d41b5f3341faf Mon Sep 17 00:00:00 2001 From: Giovanni Di Sirio Date: Sun, 23 May 2021 09:50:46 +0000 Subject: [PATCH] Few fixes. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@14421 27425a3e-05d8-49a3-a47f-9c15f0e5edd8 --- os/hal/ports/STM32/STM32G0xx/hal_lld.c | 7 ++----- os/hal/ports/STM32/STM32G0xx/hal_lld.h | 2 +- 2 files changed, 3 insertions(+), 6 deletions(-) diff --git a/os/hal/ports/STM32/STM32G0xx/hal_lld.c b/os/hal/ports/STM32/STM32G0xx/hal_lld.c index b698fe511..07fbfd2d9 100644 --- a/os/hal/ports/STM32/STM32G0xx/hal_lld.c +++ b/os/hal/ports/STM32/STM32G0xx/hal_lld.c @@ -611,11 +611,8 @@ void stm32_clock_init(void) { STM32_LPUART1SEL; /* Set flash WS's for SYSCLK source.*/ - FLASH->ACR = FLASH_ACR_DBG_SWEN | FLASH_ACR_ICEN | FLASH_ACR_PRFTEN | - STM32_FLASHBITS; - while ((FLASH->ACR & FLASH_ACR_LATENCY_Msk) != - (STM32_FLASHBITS & FLASH_ACR_LATENCY_Msk)) { - } + flash_set_acr(FLASH_ACR_DBG_SWEN | FLASH_ACR_ICEN | FLASH_ACR_PRFTEN | + STM32_FLASHBITS); /* Switching to the configured SYSCLK source if it is different from HSI16.*/ #if STM32_SW != STM32_SW_HSISYS diff --git a/os/hal/ports/STM32/STM32G0xx/hal_lld.h b/os/hal/ports/STM32/STM32G0xx/hal_lld.h index 2a37998ea..3022b51b4 100644 --- a/os/hal/ports/STM32/STM32G0xx/hal_lld.h +++ b/os/hal/ports/STM32/STM32G0xx/hal_lld.h @@ -1496,7 +1496,7 @@ typedef struct { (clkpt) == CLK_PLLRCLK ? STM32_PLL_R_CLKOUT : \ (clkpt) == CLK_HCLK ? STM32_HCLK : \ (clkpt) == CLK_PCLK ? STM32_PCLK : \ - (clkpt) == CLK_PCLK TIM ? STM32_TIMPCLK : \ + (clkpt) == CLK_PCLKTIM ? STM32_TIMPCLK : \ (clkpt) == CLK_MCO ? STM32_MCOCLK : \ 0U) #endif /* !defined(HAL_LLD_USE_CLOCK_MANAGEMENT) */