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ChibiOS
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git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2933 35acf78f-673a-0410-8e92-d51de3d6d3f4

This commit is contained in:
gdisirio 2011-05-08 09:28:29 +00:00
parent 82215e7019
commit eb36dbf4fe
2 changed files with 14 additions and 18 deletions
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14
os/hal/platforms/STM32/sdc_lld.c
View File

@ -334,13 +334,6 @@ bool_t sdc_lld_read(SDCDriver *sdcp, uint32_t startblk,
uint8_t *buf, uint32_t n) { uint8_t *buf, uint32_t n) {
uint32_t sta, resp[1]; uint32_t sta, resp[1];
/* Prepares the DMA channel for reading.*/
dmaChannelSetup(&STM32_DMA2->channels[STM32_DMA_CHANNEL_4],
(n * SDC_BLOCK_SIZE) / sizeof (uint32_t), buf,
(STM32_SDC_SDIO_DMA_PRIORITY << 12) |
DMA_CCR1_PSIZE_1 | DMA_CCR1_MSIZE_1 |
DMA_CCR1_MINC);
/* Setting up data transfer. /* Setting up data transfer.
Options: Card to Controller, Block mode, DMA mode, 512 bytes blocks.*/ Options: Card to Controller, Block mode, DMA mode, 512 bytes blocks.*/
SDIO->ICR = 0xFFFFFFFF; SDIO->ICR = 0xFFFFFFFF;
@ -353,7 +346,12 @@ bool_t sdc_lld_read(SDCDriver *sdcp, uint32_t startblk,
SDIO_DCTRL_DTEN; SDIO_DCTRL_DTEN;
/* DMA channel activation.*/ /* DMA channel activation.*/
dmaEnableChannel(STM32_DMA2, STM32_DMA_CHANNEL_4); /* Prepares the DMA channel for reading.*/
dmaChannelSetup(&STM32_DMA2->channels[STM32_DMA_CHANNEL_4],
(n * SDC_BLOCK_SIZE) / sizeof (uint32_t), buf,
(STM32_SDC_SDIO_DMA_PRIORITY << 12) |
DMA_CCR1_PSIZE_1 | DMA_CCR1_MSIZE_1 |
DMA_CCR1_EN);
if (sdc_lld_send_cmd_short_crc(sdcp, SDC_CMD_READ_MULTIPLE_BLOCK, if (sdc_lld_send_cmd_short_crc(sdcp, SDC_CMD_READ_MULTIPLE_BLOCK,
startblk, resp) || startblk, resp) ||

18
os/hal/src/sdc.c
View File

@ -272,8 +272,7 @@ bool_t sdcRead(SDCDriver *sdcp, uint32_t startblk,
chDbgCheck((sdcp != NULL) && (buf != NULL) && (n > 0), "sdcRead"); chDbgCheck((sdcp != NULL) && (buf != NULL) && (n > 0), "sdcRead");
chSysLock(); chSysLock();
chDbgAssert(sdcp->state == SDC_ACTIVE, chDbgAssert(sdcp->state == SDC_ACTIVE, "sdcRead(), #1", "invalid state");
"sdcDisconnect(), #1", "invalid state");
sdcp->state = SDC_READING; sdcp->state = SDC_READING;
chSysUnlock(); chSysUnlock();
@ -304,20 +303,19 @@ bool_t sdcRead(SDCDriver *sdcp, uint32_t startblk,
bool_t sdcWrite(SDCDriver *sdcp, uint32_t startblk, bool_t sdcWrite(SDCDriver *sdcp, uint32_t startblk,
const uint8_t *buf, uint32_t n) { const uint8_t *buf, uint32_t n) {
bool_t sts; bool_t sts;
uint32_t resp[1];
chDbgCheck((sdcp != NULL) && (buf != NULL) && (n > 0), "sdcWrite"); chDbgCheck((sdcp != NULL) && (buf != NULL) && (n > 0), "sdcRead");
chSysLock();
chDbgAssert(sdcp->state == SDC_ACTIVE, "sdcWrite(), #1", "invalid state");
sdcp->state = SDC_WRITING;
chSysUnlock();
if ((sdcp->cardmode & SDC_MODE_HIGH_CAPACITY) == 0) if ((sdcp->cardmode & SDC_MODE_HIGH_CAPACITY) == 0)
startblk *= SDC_BLOCK_SIZE; startblk *= SDC_BLOCK_SIZE;
if (sdc_lld_send_cmd_short_crc(sdcp, SDC_CMD_READ_MULTIPLE_BLOCK,
startblk, resp))
return TRUE;
sts = sdc_lld_write(sdcp, startblk, buf, n); sts = sdc_lld_write(sdcp, startblk, buf, n);
sts = sts || sdc_lld_send_cmd_short_crc(sdcp, SDC_CMD_STOP_TRANSMISSION, sdcp->state = SDC_ACTIVE;
0, resp);
return sts; return sts;
} }