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Demo complete, to be tested. White space fixes. 

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@12499 110e8d01-0319-4d1e-a829-52ad28d1bb01
This commit is contained in:
Giovanni Di Sirio 2018-12-30 19:47:31 +00:00
parent 8c68f1fe7e
commit eb3eac8fea
9 changed files with 195 additions and 29 deletions
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10
os/hal/ports/STM32/LLD/ADCv4/hal_adc_lld.c
View File

@ -347,10 +347,10 @@ void adc_lld_init(void) {
#if STM32_ADC_USE_ADC12 == TRUE
/* Driver initialization.*/
adcObjectInit(&ADCD1);
ADCD1.adcc = ADC12_COMMON;
ADCD1.adcm = ADC1;
ADCD1.adcc = ADC12_COMMON;
ADCD1.adcm = ADC1;
#if STM32_ADC_DUAL_MODE
ADCD1.adcs = ADC2;
ADCD1.adcs = ADC2;
#endif
ADCD1.data.dma = NULL;
ADCD1.dmamode = ADC_DMA_SIZE |
@ -364,8 +364,8 @@ void adc_lld_init(void) {
#if STM32_ADC_USE_ADC3 == TRUE
/* Driver initialization.*/
adcObjectInit(&ADCD3);
ADCD3.adcc = ADC3_COMMON;
ADCD3.adcm = ADC3;
ADCD3.adcc = ADC3_COMMON;
ADCD3.adcm = ADC3;
ADCD3.data.bdma = NULL;
ADCD3.dmamode = ADC_DMA_SIZE |
STM32_DMA_CR_PL(STM32_ADC_ADC3_DMA_PRIORITY) |

14
testhal/STM32/multi/ADC/cfg/stm32l476_discovery/mcuconf.h
View File

@ -114,9 +114,9 @@
*/
#define STM32_ADC_DUAL_MODE FALSE
#define STM32_ADC_COMPACT_SAMPLES FALSE
#define STM32_ADC_USE_ADC1 FALSE
#define STM32_ADC_USE_ADC2 FALSE
#define STM32_ADC_USE_ADC3 FALSE
#define STM32_ADC_USE_ADC1 TRUE
#define STM32_ADC_USE_ADC2 TRUE
#define STM32_ADC_USE_ADC3 TRUE
#define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID(1, 1)
#define STM32_ADC_ADC2_DMA_STREAM STM32_DMA_STREAM_ID(1, 2)
#define STM32_ADC_ADC3_DMA_STREAM STM32_DMA_STREAM_ID(1, 3)
@ -140,8 +140,8 @@
* DAC driver system settings.
*/
#define STM32_DAC_DUAL_MODE FALSE
#define STM32_DAC_USE_DAC1_CH1 TRUE
#define STM32_DAC_USE_DAC1_CH2 TRUE
#define STM32_DAC_USE_DAC1_CH1 FALSE
#define STM32_DAC_USE_DAC1_CH2 FALSE
#define STM32_DAC_DAC1_CH1_IRQ_PRIORITY 10
#define STM32_DAC_DAC1_CH2_IRQ_PRIORITY 10
#define STM32_DAC_DAC1_CH1_DMA_PRIORITY 2
@ -155,9 +155,9 @@
#define STM32_GPT_USE_TIM1 FALSE
#define STM32_GPT_USE_TIM2 FALSE
#define STM32_GPT_USE_TIM3 FALSE
#define STM32_GPT_USE_TIM4 FALSE
#define STM32_GPT_USE_TIM4 TRUE
#define STM32_GPT_USE_TIM5 FALSE
#define STM32_GPT_USE_TIM6 TRUE
#define STM32_GPT_USE_TIM6 FALSE
#define STM32_GPT_USE_TIM7 FALSE
#define STM32_GPT_USE_TIM8 FALSE
#define STM32_GPT_TIM1_IRQ_PRIORITY 7

80
testhal/STM32/multi/ADC/cfg/stm32l476_discovery/portab.c
View File

@ -34,6 +34,80 @@
/* Module exported variables. */
/*===========================================================================*/
/*
* GPT configuration.
*/
const GPTConfig portab_gptcfg1 = {
.frequency = 1000000U,
.callback = NULL,
.cr2 = TIM_CR2_MMS_1, /* MMS = 010 = TRGO on Update Event. */
.dier = 0U
};
const ADCConfig portab_adccfg1 = {
.difsel = 0U
};
void adccallback(ADCDriver *adcp);
/*
* ADC errors callback, should never happen.
*/
void adcerrorcallback(ADCDriver *adcp, adcerror_t err);
/*
* ADC conversion group 1.
* Mode: One shot, 2 channels, SW triggered.
* Channels: IN0, IN5.
*/
const ADCConversionGroup portab_adcgrpcfg1 = {
.circular = false,
.num_channels = ADC_GRP1_NUM_CHANNELS,
.end_cb = NULL,
.error_cb = adcerrorcallback,
.cfgr = 0U,
.cfgr2 = 0U,
.tr1 = ADC_TR(0, 4095),
.smpr = {
ADC_SMPR1_SMP_AN0(ADC_SMPR_SMP_247P5) |
ADC_SMPR1_SMP_AN5(ADC_SMPR_SMP_247P5),
0U
},
.sqr = {
ADC_SQR1_SQ1_N(ADC_CHANNEL_IN0) | ADC_SQR1_SQ2_N(ADC_CHANNEL_IN5),
0U,
0U,
0U
}
};
/*
* ADC conversion group 2.
* Mode: Continuous, 2 channels, HW triggered by GPT4-TRGO.
* Channels: IN0, IN5.
*/
const ADCConversionGroup portab_adcgrpcfg2 = {
.circular = true,
.num_channels = ADC_GRP2_NUM_CHANNELS,
.end_cb = adccallback,
.error_cb = adcerrorcallback,
.cfgr = ADC_CFGR_EXTEN_RISING |
ADC_CFGR_EXTSEL_SRC(12), /* TIM4_TRGO */
.cfgr2 = 0U,
.tr1 = ADC_TR(0, 4095),
.smpr = {
ADC_SMPR1_SMP_AN0(ADC_SMPR_SMP_247P5) |
ADC_SMPR1_SMP_AN5(ADC_SMPR_SMP_247P5),
0U
},
.sqr = {
ADC_SQR1_SQ1_N(ADC_CHANNEL_IN0) | ADC_SQR1_SQ2_N(ADC_CHANNEL_IN5),
0U,
0U,
0U
}
};
/*===========================================================================*/
/* Module local types. */
/*===========================================================================*/
@ -52,9 +126,9 @@
void portab_setup(void) {
/* Setting up the output pin as analog as suggested
by the Reference Manual.*/
palSetPadMode(GPIOA, 4, PAL_MODE_INPUT_ANALOG);
/* ADC inputs.*/
palSetPadMode(GPIOA, 0, PAL_MODE_INPUT_ANALOG);
palSetPadMode(GPIOB, 1, PAL_MODE_INPUT_ANALOG);
}
/** @} */

11
testhal/STM32/multi/ADC/cfg/stm32l476_discovery/portab.h
View File

@ -39,7 +39,11 @@
#define PORTAB_SD1 SD2
#define PORTAB_DAC_TRIG 0
#define PORTAB_GPT1 GPTD4
#define PORTAB_ADC1 ADCD1
#define ADC_GRP1_NUM_CHANNELS 2
#define ADC_GRP2_NUM_CHANNELS 2
/*===========================================================================*/
/* Module pre-compile time settings. */
@ -61,6 +65,11 @@
/* External declarations. */
/*===========================================================================*/
extern const GPTConfig portab_gptcfg1;
extern const ADCConfig portab_adccfg1;
extern const ADCConversionGroup portab_adcgrpcfg1;
extern const ADCConversionGroup portab_adcgrpcfg2;
#ifdef __cplusplus
extern "C" {
#endif

10
testhal/STM32/multi/ADC/cfg/stm32l4r5zi_nucleo144/mcuconf.h
View File

@ -127,7 +127,7 @@
* ADC driver system settings.
*/
#define STM32_ADC_COMPACT_SAMPLES FALSE
#define STM32_ADC_USE_ADC1 FALSE
#define STM32_ADC_USE_ADC1 TRUE
#define STM32_ADC_ADC1_DMA_CHANNEL 10
#define STM32_ADC_ADC1_DMA_PRIORITY 2
#define STM32_ADC_ADC12_IRQ_PRIORITY 5
@ -144,8 +144,8 @@
* DAC driver system settings.
*/
#define STM32_DAC_DUAL_MODE FALSE
#define STM32_DAC_USE_DAC1_CH1 TRUE
#define STM32_DAC_USE_DAC1_CH2 TRUE
#define STM32_DAC_USE_DAC1_CH1 FALSE
#define STM32_DAC_USE_DAC1_CH2 FALSE
#define STM32_DAC_DAC1_CH1_IRQ_PRIORITY 10
#define STM32_DAC_DAC1_CH2_IRQ_PRIORITY 10
#define STM32_DAC_DAC1_CH1_DMA_PRIORITY 2
@ -159,9 +159,9 @@
#define STM32_GPT_USE_TIM1 FALSE
#define STM32_GPT_USE_TIM2 FALSE
#define STM32_GPT_USE_TIM3 FALSE
#define STM32_GPT_USE_TIM4 FALSE
#define STM32_GPT_USE_TIM4 TRUE
#define STM32_GPT_USE_TIM5 FALSE
#define STM32_GPT_USE_TIM6 TRUE
#define STM32_GPT_USE_TIM6 FALSE
#define STM32_GPT_USE_TIM7 FALSE
#define STM32_GPT_USE_TIM8 FALSE
#define STM32_GPT_TIM1_IRQ_PRIORITY 7

80
testhal/STM32/multi/ADC/cfg/stm32l4r5zi_nucleo144/portab.c
View File

@ -34,6 +34,80 @@
/* Module exported variables. */
/*===========================================================================*/
/*
* GPT configuration.
*/
const GPTConfig portab_gptcfg1 = {
.frequency = 1000000U,
.callback = NULL,
.cr2 = TIM_CR2_MMS_1, /* MMS = 010 = TRGO on Update Event. */
.dier = 0U
};
const ADCConfig portab_adccfg1 = {
.difsel = 0U
};
void adccallback(ADCDriver *adcp);
/*
* ADC errors callback, should never happen.
*/
void adcerrorcallback(ADCDriver *adcp, adcerror_t err);
/*
* ADC conversion group 1.
* Mode: One shot, 2 channels, SW triggered.
* Channels: IN0, IN5.
*/
const ADCConversionGroup portab_adcgrpcfg1 = {
.circular = false,
.num_channels = ADC_GRP1_NUM_CHANNELS,
.end_cb = NULL,
.error_cb = adcerrorcallback,
.cfgr = 0U,
.cfgr2 = 0U,
.tr1 = ADC_TR(0, 4095),
.smpr = {
ADC_SMPR1_SMP_AN0(ADC_SMPR_SMP_247P5) |
ADC_SMPR1_SMP_AN5(ADC_SMPR_SMP_247P5),
0U
},
.sqr = {
ADC_SQR1_SQ1_N(ADC_CHANNEL_IN0) | ADC_SQR1_SQ2_N(ADC_CHANNEL_IN5),
0U,
0U,
0U
}
};
/*
* ADC conversion group 2.
* Mode: Continuous, 2 channels, HW triggered by GPT4-TRGO.
* Channels: IN0, IN5.
*/
const ADCConversionGroup portab_adcgrpcfg2 = {
.circular = true,
.num_channels = ADC_GRP2_NUM_CHANNELS,
.end_cb = adccallback,
.error_cb = adcerrorcallback,
.cfgr = ADC_CFGR_EXTEN_RISING |
ADC_CFGR_EXTSEL_SRC(12), /* TIM4_TRGO */
.cfgr2 = 0U,
.tr1 = ADC_TR(0, 4095),
.smpr = {
ADC_SMPR1_SMP_AN0(ADC_SMPR_SMP_247P5) |
ADC_SMPR1_SMP_AN5(ADC_SMPR_SMP_247P5),
0U
},
.sqr = {
ADC_SQR1_SQ1_N(ADC_CHANNEL_IN0) | ADC_SQR1_SQ2_N(ADC_CHANNEL_IN5),
0U,
0U,
0U
}
};
/*===========================================================================*/
/* Module local types. */
/*===========================================================================*/
@ -52,9 +126,9 @@
void portab_setup(void) {
/* Setting up the output pin as analog as suggested
by the Reference Manual.*/
palSetPadMode(GPIOA, 4, PAL_MODE_INPUT_ANALOG);
/* ADC inputs.*/
palSetPadMode(GPIOA, 0, PAL_MODE_INPUT_ANALOG);
palSetPadMode(GPIOB, 1, PAL_MODE_INPUT_ANALOG);
}
/** @} */

11
testhal/STM32/multi/ADC/cfg/stm32l4r5zi_nucleo144/portab.h
View File

@ -39,7 +39,11 @@
#define PORTAB_SD1 LPSD1
#define PORTAB_DAC_TRIG 5
#define PORTAB_GPT1 GPTD4
#define PORTAB_ADC1 ADCD1
#define ADC_GRP1_NUM_CHANNELS 2
#define ADC_GRP2_NUM_CHANNELS 2
/*===========================================================================*/
/* Module pre-compile time settings. */
@ -61,6 +65,11 @@
/* External declarations. */
/*===========================================================================*/
extern const GPTConfig portab_gptcfg1;
extern const ADCConfig portab_adccfg1;
extern const ADCConversionGroup portab_adcgrpcfg1;
extern const ADCConversionGroup portab_adcgrpcfg2;
#ifdef __cplusplus
extern "C" {
#endif

2
testhal/STM32/multi/ADC/debug/STM32-ADC (Select ELF file)(OpenOCD, Flash and Run).launch
View File

@ -33,7 +33,7 @@
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6
testhal/STM32/multi/ADC/main.c
View File

@ -57,7 +57,7 @@ void adccallback(ADCDriver *adcp) {
}
if ((n % 200) == 0U) {
palToggleLine(LINE_LED2);
palToggleLine(PORTAB_LINE_LED2);
}
}
@ -86,9 +86,9 @@ static THD_FUNCTION(Thread1, arg) {
(void)arg;
chRegSetThreadName("blinker");
while (true) {
palSetLine(LINE_LED1);
palSetLine(PORTAB_LINE_LED1);
chThdSleepMilliseconds(500);
palClearLine(LINE_LED1);
palClearLine(PORTAB_LINE_LED1);
chThdSleepMilliseconds(500);
}
}