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ChibiOS
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git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@1857 35acf78f-673a-0410-8e92-d51de3d6d3f4

This commit is contained in:
gdisirio 2010-04-07 11:54:32 +00:00
parent 3076655c39
commit ec36599e62
3 changed files with 2 additions and 40 deletions
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38
os/ports/GCC/ARMCMx/chcore_v7m.c
View File

@ -53,43 +53,6 @@ void SysTickVector(void) {
chSysUnlockFromIsr();
}
#if CORTEX_MODEL == CORTEX_M0
#define PUSH_CONTEXT(sp, prio) { \
asm volatile ("mrs %0, PSP \n\t" \
"sub %0, %0, #40 \n\t" \
"stmia %0!, {r3-r7} \n\t" \
"sub %0, %0, #20 \n\t" \
"mov r3, r8 \n\t" \
"str r3, [%0, #20] \n\t" \
"mov r3, r9 \n\t" \
"str r3, [%0, #24] \n\t" \
"mov r3, r10 \n\t" \
"str r3, [%0, #28] \n\t" \
"mov r3, r11 \n\t" \
"str r3, [%0, #32] \n\t" \
"mov r3, lr \n\t" \
"str r3, [%0, #36] \n\t" \
: "=r" (sp) : "r" (sp), "r" (prio)); \
}
#define POP_CONTEXT(sp) { \
asm volatile ("ldr r3, [%0, #20] \n\t" \
"mov r8, r3 \n\t" \
"ldr r3, [%0, #24] \n\t" \
"mov r9, r3 \n\t" \
"ldr r3, [%0, #28] \n\t" \
"mov r10, r3 \n\t" \
"ldr r3, [%0, #32] \n\t" \
"mov r11, r3 \n\t" \
"ldr r3, [%0, #36] \n\t" \
"mov lr, r3 \n\t" \
"ldmia %0!, {r3-r7} \n\t" \
"add %0, %0, #20 \n\t" \
"msr PSP, %0 \n\t" \
"msr BASEPRI, r3 \n\t" \
"bx lr" : "=r" (sp) : "r" (sp)); \
}
#else /* CORTEX_MODEL != CORTEX_M0 */
#if !defined(CH_CURRP_REGISTER_CACHE)
#define PUSH_CONTEXT(sp, prio) { \
asm volatile ("mrs %0, PSP \n\t" \
@ -117,7 +80,6 @@ void SysTickVector(void) {
"bx lr" : "=r" (sp) : "r" (sp)); \
}
#endif /* defined(CH_CURRP_REGISTER_CACHE) */
#endif /* CORTEX_MODEL != CORTEX_M0 */
/**
* @brief SVC vector.

3
os/ports/GCC/ARMCMx/chcore_v7m.h
View File

@ -263,7 +263,7 @@ struct intctx {
* @param[in] ntp the thread to be switched in
* @param[in] otp the thread to be switched out
*/
static INLINE Thread *port_switch(Thread *ntp, Thread *otp) {
static INLINE void port_switch(Thread *ntp, Thread *otp) {
register Thread *_ntp asm ("r0") = (ntp);
register Thread *_otp asm ("r1") = (otp);
#if CH_DBG_ENABLE_STACK_CHECK
@ -273,7 +273,6 @@ static INLINE Thread *port_switch(Thread *ntp, Thread *otp) {
"b chDbgPanic");
#endif /* CH_DBG_ENABLE_STACK_CHECK */
asm volatile ("svc #0" : : "r" (_otp), "r" (_ntp) : "memory");
return _otp;
}
#ifdef __cplusplus

1
readme.txt
View File

@ -57,6 +57,7 @@
*****************************************************************************
*** 1.5.5 ***
- FIX: Removed some "dead" code in the ARMv7-M files.
- NEW: LPC13xx support, drivers (Serial, PAL, HAL) and demo.
- CHANGE: Renamed LPC111x port and platform in LPC11xx.