From ece59fba75103c038d8bd79f90cd27ac56bf330c Mon Sep 17 00:00:00 2001 From: Rocco Marco Guglielmi Date: Wed, 6 Jul 2016 14:05:22 +0000 Subject: [PATCH] Fixed Bug #763. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/stable_16.1.x@9683 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- os/hal/ports/STM32/STM32L4xx/hal_lld.c | 21 +++++++++++++++++++++ readme.txt | 3 ++- 2 files changed, 23 insertions(+), 1 deletion(-) diff --git a/os/hal/ports/STM32/STM32L4xx/hal_lld.c b/os/hal/ports/STM32/STM32L4xx/hal_lld.c index 8277a8600..7ad91c7fe 100644 --- a/os/hal/ports/STM32/STM32L4xx/hal_lld.c +++ b/os/hal/ports/STM32/STM32L4xx/hal_lld.c @@ -59,6 +59,27 @@ static void hal_lld_backup_domain_init(void) { RCC->BDCR = RCC_BDCR_BDRST; RCC->BDCR = 0; } + +#if STM32_LSE_ENABLED + /* LSE activation.*/ +#if defined(STM32_LSE_BYPASS) + /* LSE Bypass.*/ + RCC->BDCR |= STM32_LSEDRV | RCC_BDCR_LSEON | RCC_BDCR_LSEBYP; +#else + /* No LSE Bypass.*/ + RCC->BDCR |= STM32_LSEDRV | RCC_BDCR_LSEON; +#endif + while ((RCC->BDCR & RCC_BDCR_LSERDY) == 0) + ; /* Wait until LSE is stable. */ +#endif + +#if STM32_MSIPLL_ENABLED + /* MSI PLL activation depends on LSE. Reactivating and checking for + MSI stability.*/ + RCC->CR |= RCC_CR_MSIPLLEN; + while ((RCC->CR & RCC_CR_MSIRDY) == 0) + ; /* Wait until MSI is stable. */ +#endif #if HAL_USE_RTC /* If the backup domain hasn't been initialized yet then proceed with diff --git a/readme.txt b/readme.txt index f7f7735e5..2abe798c4 100644 --- a/readme.txt +++ b/readme.txt @@ -71,7 +71,8 @@ ***************************************************************************** *** Releases and Change Log *** ***************************************************************************** - +*** 16.1.6 *** +- HAL: Fixed wrong backup domain reset in STM32L4xx\hal_lld (bug #763). *** 16.1.5 *** - NEW: Added support for more Nucleo and Discovery boards. - HAL: Board files regenerated using the latest version of the generator