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Fixed bug #927. 

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@11811 110e8d01-0319-4d1e-a829-52ad28d1bb01
This commit is contained in:
Giovanni Di Sirio 2018-03-18 12:43:14 +00:00
parent a18251e55d
commit ecfed423db
7 changed files with 8 additions and 12 deletions
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3
os/hal/ports/STM32/STM32F0xx/hal_lld.c
View File

@ -272,8 +272,7 @@ void stm32_clock_init(void) {
/* HSI is selected as new source without touching the other fields in /* HSI is selected as new source without touching the other fields in
CFGR. Clearing the register has to be postponed after HSI is the CFGR. Clearing the register has to be postponed after HSI is the
new source.*/ new source.*/
RCC->CFGR &= ~RCC_CFGR_SW; /* Reset SW */ RCC->CFGR &= ~RCC_CFGR_SW; /* Reset SW, selecting HSI. */
RCC->CFGR |= RCC_CFGR_SWS_HSI; /* Select HSI as internal*/
while ((RCC->CFGR & RCC_CFGR_SWS) != RCC_CFGR_SWS_HSI) while ((RCC->CFGR & RCC_CFGR_SWS) != RCC_CFGR_SWS_HSI)
; /* Wait until HSI is selected. */ ; /* Wait until HSI is selected. */

3
os/hal/ports/STM32/STM32F1xx/hal_lld.c
View File

@ -253,8 +253,7 @@ void stm32_clock_init(void) {
/* HSI is selected as new source without touching the other fields in /* HSI is selected as new source without touching the other fields in
CFGR. Clearing the register has to be postponed after HSI is the CFGR. Clearing the register has to be postponed after HSI is the
new source.*/ new source.*/
RCC->CFGR &= ~RCC_CFGR_SW; /* Reset SW */ RCC->CFGR &= ~RCC_CFGR_SW; /* Reset SW, selecting HSI. */
RCC->CFGR |= RCC_CFGR_SWS_HSI; /* Select HSI as internal*/
while ((RCC->CFGR & RCC_CFGR_SWS) != RCC_CFGR_SWS_HSI) while ((RCC->CFGR & RCC_CFGR_SWS) != RCC_CFGR_SWS_HSI)
; /* Wait until HSI is selected. */ ; /* Wait until HSI is selected. */

3
os/hal/ports/STM32/STM32F37x/hal_lld.c
View File

@ -154,8 +154,7 @@ void stm32_clock_init(void) {
/* HSI is selected as new source without touching the other fields in /* HSI is selected as new source without touching the other fields in
CFGR. Clearing the register has to be postponed after HSI is the CFGR. Clearing the register has to be postponed after HSI is the
new source.*/ new source.*/
RCC->CFGR &= ~RCC_CFGR_SW; /* Reset SW */ RCC->CFGR &= ~RCC_CFGR_SW; /* Reset SW, selecting HSI. */
RCC->CFGR |= RCC_CFGR_SWS_HSI; /* Select HSI as internal*/
while ((RCC->CFGR & RCC_CFGR_SWS) != RCC_CFGR_SWS_HSI) while ((RCC->CFGR & RCC_CFGR_SWS) != RCC_CFGR_SWS_HSI)
; /* Wait until HSI is selected. */ ; /* Wait until HSI is selected. */

3
os/hal/ports/STM32/STM32F3xx/hal_lld.c
View File

@ -159,8 +159,7 @@ void stm32_clock_init(void) {
/* HSI is selected as new source without touching the other fields in /* HSI is selected as new source without touching the other fields in
CFGR. Clearing the register has to be postponed after HSI is the CFGR. Clearing the register has to be postponed after HSI is the
new source.*/ new source.*/
RCC->CFGR &= ~RCC_CFGR_SW; /* Reset SW */ RCC->CFGR &= ~RCC_CFGR_SW; /* Reset SW, selecting HSI. */
RCC->CFGR |= RCC_CFGR_SWS_HSI; /* Select HSI as internal*/
while ((RCC->CFGR & RCC_CFGR_SWS) != RCC_CFGR_SWS_HSI) while ((RCC->CFGR & RCC_CFGR_SWS) != RCC_CFGR_SWS_HSI)
; /* Wait until HSI is selected. */ ; /* Wait until HSI is selected. */

3
os/hal/ports/STM32/STM32F4xx/hal_lld.c
View File

@ -177,8 +177,7 @@ void stm32_clock_init(void) {
/* HSI is selected as new source without touching the other fields in /* HSI is selected as new source without touching the other fields in
CFGR. Clearing the register has to be postponed after HSI is the CFGR. Clearing the register has to be postponed after HSI is the
new source.*/ new source.*/
RCC->CFGR &= ~RCC_CFGR_SW; /* Reset SW */ RCC->CFGR &= ~RCC_CFGR_SW; /* Reset SW, selecting HSI. */
RCC->CFGR |= RCC_CFGR_SWS_HSI; /* Select HSI as internal*/
while ((RCC->CFGR & RCC_CFGR_SWS) != RCC_CFGR_SWS_HSI) while ((RCC->CFGR & RCC_CFGR_SWS) != RCC_CFGR_SWS_HSI)
; /* Wait until HSI is selected. */ ; /* Wait until HSI is selected. */

3
os/hal/ports/STM32/STM32F7xx/hal_lld.c
View File

@ -184,8 +184,7 @@ void stm32_clock_init(void) {
/* HSI is selected as new source without touching the other fields in /* HSI is selected as new source without touching the other fields in
CFGR. Clearing the register has to be postponed after HSI is the CFGR. Clearing the register has to be postponed after HSI is the
new source.*/ new source.*/
RCC->CFGR &= ~RCC_CFGR_SW; /* Reset SW */ RCC->CFGR &= ~RCC_CFGR_SW; /* Reset SW, selecting HSI. */
RCC->CFGR |= RCC_CFGR_SWS_HSI; /* Select HSI as internal*/
while ((RCC->CFGR & RCC_CFGR_SWS) != RCC_CFGR_SWS_HSI) while ((RCC->CFGR & RCC_CFGR_SWS) != RCC_CFGR_SWS_HSI)
; /* Wait until HSI is selected. */ ; /* Wait until HSI is selected. */

2
readme.txt
View File

@ -110,6 +110,8 @@
- EX: Updated LIS302DL to 1.1.0 (backported to 18.2.1). - EX: Updated LIS302DL to 1.1.0 (backported to 18.2.1).
- EX: Updated LPS25H to 1.1.0 (backported to 18.2.1). - EX: Updated LPS25H to 1.1.0 (backported to 18.2.1).
- EX: Updated LSM303DLHC to 1.1.0 (backported to 18.2.1). - EX: Updated LSM303DLHC to 1.1.0 (backported to 18.2.1).
- HAL: Fixed useless writes in read-only CFGR_SWS field on all STM32Fxx
(bug #927)(backported to 18.2.1 and 17.6.4).
- HAL: Fixed typo in hal_pal.h (bug #926)(backported to 18.2.1). - HAL: Fixed typo in hal_pal.h (bug #926)(backported to 18.2.1).
- HAL: Fixed I2C address not accepted (bug #923)(backported to 18.2.1 - HAL: Fixed I2C address not accepted (bug #923)(backported to 18.2.1
and 17.6.4). and 17.6.4).