Fixed bug #927.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@11811 110e8d01-0319-4d1e-a829-52ad28d1bb01
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@ -272,8 +272,7 @@ void stm32_clock_init(void) {
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/* HSI is selected as new source without touching the other fields in
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CFGR. Clearing the register has to be postponed after HSI is the
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new source.*/
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RCC->CFGR &= ~RCC_CFGR_SW; /* Reset SW */
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RCC->CFGR |= RCC_CFGR_SWS_HSI; /* Select HSI as internal*/
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RCC->CFGR &= ~RCC_CFGR_SW; /* Reset SW, selecting HSI. */
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while ((RCC->CFGR & RCC_CFGR_SWS) != RCC_CFGR_SWS_HSI)
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; /* Wait until HSI is selected. */
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@ -253,8 +253,7 @@ void stm32_clock_init(void) {
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/* HSI is selected as new source without touching the other fields in
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CFGR. Clearing the register has to be postponed after HSI is the
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new source.*/
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RCC->CFGR &= ~RCC_CFGR_SW; /* Reset SW */
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RCC->CFGR |= RCC_CFGR_SWS_HSI; /* Select HSI as internal*/
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RCC->CFGR &= ~RCC_CFGR_SW; /* Reset SW, selecting HSI. */
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while ((RCC->CFGR & RCC_CFGR_SWS) != RCC_CFGR_SWS_HSI)
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; /* Wait until HSI is selected. */
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@ -154,8 +154,7 @@ void stm32_clock_init(void) {
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/* HSI is selected as new source without touching the other fields in
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CFGR. Clearing the register has to be postponed after HSI is the
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new source.*/
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RCC->CFGR &= ~RCC_CFGR_SW; /* Reset SW */
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RCC->CFGR |= RCC_CFGR_SWS_HSI; /* Select HSI as internal*/
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RCC->CFGR &= ~RCC_CFGR_SW; /* Reset SW, selecting HSI. */
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while ((RCC->CFGR & RCC_CFGR_SWS) != RCC_CFGR_SWS_HSI)
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; /* Wait until HSI is selected. */
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@ -159,8 +159,7 @@ void stm32_clock_init(void) {
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/* HSI is selected as new source without touching the other fields in
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CFGR. Clearing the register has to be postponed after HSI is the
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new source.*/
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RCC->CFGR &= ~RCC_CFGR_SW; /* Reset SW */
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RCC->CFGR |= RCC_CFGR_SWS_HSI; /* Select HSI as internal*/
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RCC->CFGR &= ~RCC_CFGR_SW; /* Reset SW, selecting HSI. */
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while ((RCC->CFGR & RCC_CFGR_SWS) != RCC_CFGR_SWS_HSI)
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; /* Wait until HSI is selected. */
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@ -177,8 +177,7 @@ void stm32_clock_init(void) {
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/* HSI is selected as new source without touching the other fields in
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CFGR. Clearing the register has to be postponed after HSI is the
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new source.*/
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RCC->CFGR &= ~RCC_CFGR_SW; /* Reset SW */
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RCC->CFGR |= RCC_CFGR_SWS_HSI; /* Select HSI as internal*/
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RCC->CFGR &= ~RCC_CFGR_SW; /* Reset SW, selecting HSI. */
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while ((RCC->CFGR & RCC_CFGR_SWS) != RCC_CFGR_SWS_HSI)
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; /* Wait until HSI is selected. */
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@ -184,8 +184,7 @@ void stm32_clock_init(void) {
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/* HSI is selected as new source without touching the other fields in
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CFGR. Clearing the register has to be postponed after HSI is the
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new source.*/
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RCC->CFGR &= ~RCC_CFGR_SW; /* Reset SW */
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RCC->CFGR |= RCC_CFGR_SWS_HSI; /* Select HSI as internal*/
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RCC->CFGR &= ~RCC_CFGR_SW; /* Reset SW, selecting HSI. */
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while ((RCC->CFGR & RCC_CFGR_SWS) != RCC_CFGR_SWS_HSI)
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; /* Wait until HSI is selected. */
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@ -110,6 +110,8 @@
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- EX: Updated LIS302DL to 1.1.0 (backported to 18.2.1).
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- EX: Updated LPS25H to 1.1.0 (backported to 18.2.1).
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- EX: Updated LSM303DLHC to 1.1.0 (backported to 18.2.1).
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- HAL: Fixed useless writes in read-only CFGR_SWS field on all STM32Fxx
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(bug #927)(backported to 18.2.1 and 17.6.4).
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- HAL: Fixed typo in hal_pal.h (bug #926)(backported to 18.2.1).
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- HAL: Fixed I2C address not accepted (bug #923)(backported to 18.2.1
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and 17.6.4).
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