git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/stable_20.3.x@13741 27425a3e-05d8-49a3-a47f-9c15f0e5edd8
This commit is contained in:
Giovanni Di Sirio 2020-07-06 09:35:47 +00:00
parent 0af4a1c954
commit ed35f56452
12 changed files with 13 additions and 12 deletions

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@ -37,7 +37,7 @@
</cconfiguration>
</storageModule>
<storageModule moduleId="cdtBuildSystem" version="4.0.0">
<project id="RT-STM32H743ZI_REV_V-NUCLEO144.null.1703860681" name="RT-STM32H743ZI_REV_V-NUCLEO144"/>
<project id="RT-STM32H743ZI_REV_XY-NUCLEO144.null.1703860681" name="RT-STM32H743ZI_REV_XY-NUCLEO144"/>
</storageModule>
<storageModule moduleId="scannerConfiguration">
<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>

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@ -1,6 +1,6 @@
<?xml version="1.0" encoding="UTF-8"?>
<projectDescription>
<name>RT-STM32H743ZI_REV_V-NUCLEO144</name>
<name>RT-STM32H743ZI_REV_XY-NUCLEO144</name>
<comment></comment>
<projects>
</projects>

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@ -150,7 +150,7 @@ CPPWARN = -Wall -Wextra -Wundef
#
# List all user C define here, like -D_DEBUG=1
UDEFS = -DSTM32_ENFORCE_H7_REV_V # Must be removed for non-Rev-V devices.
UDEFS = -DSTM32_ENFORCE_H7_REV_XY # Remove for non revision X or Y devices.
# Define ASM defines here
UADEFS =

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@ -121,7 +121,7 @@
STM32_BDMA_CR_MSIZE_MASK)
#define STM32_BDMA_CR_PL_MASK BDMA_CCR_PL_Msk
#define STM32_BDMA_CR_PL(n) ((n) << 12U)
#if !defined(STM32_ENFORCE_H7_REV_V)
#if !defined(STM32_ENFORCE_H7_REV_XY)
#define STM32_BDMA_CR_DBM BDMA_CCR_DBM
#define STM32_BDMA_CR_CM BDMA_CCR_CT
#endif
@ -272,7 +272,7 @@ typedef struct {
*
* @special
*/
#if !defined(STM32_ENFORCE_H7_REV_V) || defined(__DOXYGEN__)
#if defined(STM32_ENFORCE_H7_REV_XY) || defined(__DOXYGEN__)
#define bdmaStreamSetMemory(stp, addr) { \
(stp)->channel->CM0AR = (uint32_t)(addr); \
}

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@ -108,7 +108,7 @@ static inline void init_pwr(void) {
PWR->CR3 = STM32_PWR_CR3; /* Other bits, lower byte is not changed. */
PWR->CPUCR = STM32_PWR_CPUCR;
PWR->D3CR = STM32_VOS;
#if !defined(STM32_ENFORCE_H7_REV_V)
#if !defined(STM32_ENFORCE_H7_REV_XY)
SYSCFG->PWRCR = STM32_ODEN;
#endif
while ((PWR->D3CR & PWR_D3CR_VOSRDY) == 0)
@ -217,7 +217,7 @@ void stm32_clock_init(void) {
(void)rcc;
#endif
#if defined(STM32_ENFORCE_H7_REV_V)
#if defined(STM32_ENFORCE_H7_REV_XY)
/* Fix for errata 2.2.15: Reading from AXI SRAM might lead to data
read corruption.
AXI->TARG7_FN_MOD.*/
@ -250,7 +250,7 @@ void stm32_clock_init(void) {
/* Registers cleared to reset values.*/
RCC->CR = RCC_CR_HSION; /* CR Reset value. */
RCC->HSICFGR = 0x40000000U; /* HSICFGR Reset value. */
#if !defined(STM32_ENFORCE_H7_REV_V)
#if !defined(STM32_ENFORCE_H7_REV_XY)
RCC->CSICFGR = 0x20000000U; /* CSICFGR Reset value. */
#endif
RCC->CSR = 0x00000000U; /* CSR reset value. */

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@ -84,7 +84,7 @@
#endif
/** @} */
#if !defined(STM32_ENFORCE_H7_REV_V)
#if !defined(STM32_ENFORCE_H7_REV_XY)
/**
* @name Absolute Maximum Ratings
* @{
@ -215,7 +215,7 @@
#define STM32_ADCCLK_MAX 100000000
/** @} */
#else /* defined(STM32_ENFORCE_H7_REV_V) */
#else /* defined(STM32_ENFORCE_H7_REV_XY) */
#define STM32_SYSCLK_MAX 400000000
#define STM32_SYSCLK_MAX_NOBOOST 400000000
@ -243,7 +243,7 @@
#define STM32_SPI456_MAX 100000000
#define STM32_ADCCLK_MAX 36000000
#endif /* defined(STM32_ENFORCE_H7_REV_V) */
#endif /* defined(STM32_ENFORCE_H7_REV_XY) */
/**
* @name Internal clock sources frequencies

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@ -77,6 +77,7 @@
- NEW: Added a new setting to STM32 USBv1 allowing for some clock deviation
from 48MHz. Renamed setting USB_HOST_WAKEUP_DURATION to
STM32_USB_HOST_WAKEUP_DURATION for consistency.
- FIX: Fixed wrong revisions handling in STM32H743 HAL (bug #1110).
- FIX: Fixed missing STM32_I2C_BDMA_REQUIRED definition in I2Cv3 driver
(bug #1109).
- FIX: Fixed wrong definitions in SPC563M board files (bug #1108).

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@ -152,7 +152,7 @@ CPPWARN = -Wall -Wextra -Wundef
#
# List all user C define here, like -D_DEBUG=1
UDEFS = -DSTM32_ENFORCE_H7_REV_V # Must be removed for non-Rev-V devices.
UDEFS = -DSTM32_ENFORCE_H7_REV_XY # Remove for non revision X or Y devices.
# Define ASM defines here
UADEFS =