git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@531 35acf78f-673a-0410-8e92-d51de3d6d3f4

demos/ARM7-LPC214x-G++/ch.ld

@@ -45,7 +45,7 @@ SECTIONS
 {
 	. = 0;
 
-	.text :
+	.text : ALIGN(16) SUBALIGN(16)
 	{
         _text = .;
         KEEP(*(vectors))

demos/ARM7-LPC214x-GCC-minimal/ch.ld

@@ -45,7 +45,7 @@ SECTIONS
 {
 	. = 0;
 
-	.text :
+	.text : ALIGN(16) SUBALIGN(16)
 	{
         _text = .;
         KEEP(*(vectors))

demos/ARM7-LPC214x-GCC/ch.ld

@@ -45,7 +45,7 @@ SECTIONS
 {
 	. = 0;
 
-	.text :
+	.text : ALIGN(16) SUBALIGN(16)
 	{
         _text = .;
         KEEP(*(vectors))

demos/ARMCM3-STM32F103-GCC/ch.ld

@@ -26,64 +26,64 @@ __stacks_total_size__	= __main_stack_size__ + __process_stack_size__;
 
 MEMORY
 {
-	flash : org = 0x08000000, len = 128k
+    flash : org = 0x08000000, len = 128k
-	ram : org = 0x20000000, len = 20k
+    ram : org = 0x20000000, len = 20k
 }
 
-__ram_start__		= ORIGIN(ram);
+__ram_start__       = ORIGIN(ram);
-__ram_size__		= LENGTH(ram);
+__ram_size__        = LENGTH(ram);
-__ram_end__		= __ram_start__ + __ram_size__;
+__ram_end__         = __ram_start__ + __ram_size__;
 
 SECTIONS
 {
-	. = 0;
+    . = 0;
 
-	.text :
+    .text : ALIGN(16) SUBALIGN(16)
-	{
+    {
-		_text = .;
+        _text = .;
-		KEEP(*(vectors));
+        KEEP(*(vectors));
-                *(.text)
+        *(.text)
-		*(.text.*);
+        *(.text.*);
-		*(.rodata);
+        *(.rodata);
-		*(.rodata.*);
+        *(.rodata.*);
-		*(.glue_7t);
+        *(.glue_7t);
-		*(.glue_7);
+        *(.glue_7);
-		*(.gcc*);
+        *(.gcc*);
-		*(.ctors);
+        *(.ctors);
-		*(.dtors);
+        *(.dtors);
-		. = ALIGN(4);
+        . = ALIGN(4);
-		_etext = .;
+        _etext = .;
-	} > flash
+    } > flash
 
-	_textdata = _etext;
+    _textdata = _etext;
 
-	.data :
+    .data :
-	{
+    {
-		_data = .;
+        _data = .;
-		*(.data)
+        *(.data)
-		. = ALIGN(4);
+        . = ALIGN(4);
-		*(.data.*)
+        *(.data.*)
-		. = ALIGN(4);
+        . = ALIGN(4);
-		*(.ramtext)
+        *(.ramtext)
-		. = ALIGN(4);
+        . = ALIGN(4);
-		_edata = .;
+        _edata = .;
-	} > ram AT > flash
+    } > ram AT > flash
 
-	.bss :
+    .bss :
-	{
+    {
-		_bss_start = .;
+        _bss_start = .;
-		*(.bss)
+        *(.bss)
-		. = ALIGN(4);
+        . = ALIGN(4);
-		*(.bss.*)
+        *(.bss.*)
-		. = ALIGN(4);
+        . = ALIGN(4);
-		*(COMMON)
+        *(COMMON)
-		. = ALIGN(4);
+        . = ALIGN(4);
-		_bss_end = .;
+        _bss_end = .;
-	} > ram    
+    } > ram    
 }
 
 PROVIDE(end = .);
-_end 			= .;
+_end            = .;
 
-__heap_base__		= _end;
+__heap_base__   = _end;
-__heap_end__		= __ram_end__ - __stacks_total_size__;
+__heap_end__    = __ram_end__ - __stacks_total_size__;

docs/reports/LPC2148-48-ARM.txt

@@ -1,5 +1,5 @@
 ***************************************************************************
-Kernel:   ChibiOS/RT 0.8.0
+Kernel:   ChibiOS/RT 0.8.2
 Compiler: GCC 4.3.2 (YAGARTO 28.09.2008)
 Options:  -O2 -fomit-frame-pointer -mabi=apcs-gnu -falign-functions=16
 Settings: CCLK=48, MAMCR=2, MAMTIM=3 (3 wait states)
@@ -53,7 +53,7 @@ Settings: CCLK=48, MAMCR=2, MAMTIM=3 (3 wait states)
 --- Result: SUCCESS
 ---------------------------------------------------------------------------
 --- Test Case 16 (Benchmark, context switch #1, optimal)
---- Score : 144452 msgs/S, 288904 ctxswc/S
+--- Score : 144451 msgs/S, 288902 ctxswc/S
 --- Result: SUCCESS
 ---------------------------------------------------------------------------
 --- Test Case 17 (Benchmark, context switch #2, empty ready list)
@@ -65,23 +65,23 @@ Settings: CCLK=48, MAMCR=2, MAMTIM=3 (3 wait states)
 --- Result: SUCCESS
 ---------------------------------------------------------------------------
 --- Test Case 19 (Benchmark, threads creation/termination, worst case)
---- Score : 86776 threads/S
+--- Score : 92663 threads/S
 --- Result: SUCCESS
 ---------------------------------------------------------------------------
 --- Test Case 20 (Benchmark, threads creation/termination, optimal)
---- Score : 119534 threads/S
+--- Score : 122600 threads/S
 --- Result: SUCCESS
 ---------------------------------------------------------------------------
 --- Test Case 21 (Benchmark, mass reschedulation, 5 threads)
---- Score : 36005 reschedulations/S, 216030 ctxswc/S
+--- Score : 36006 reschedulations/S, 216036 ctxswc/S
 --- Result: SUCCESS
 ---------------------------------------------------------------------------
 --- Test Case 22 (Benchmark, I/O Queues throughput)
---- Score : 341232 bytes/S
+--- Score : 341236 bytes/S
 --- Result: SUCCESS
 ---------------------------------------------------------------------------
 --- Test Case 23 (Benchmark, virtual timers set/reset)
---- Score : 309498 timers/S
+--- Score : 309496 timers/S
 --- Result: SUCCESS
 ---------------------------------------------------------------------------
 

docs/reports/STM32F103-48.txt

@@ -5,10 +5,6 @@ Options:  -O2 -fomit-frame-pointer -mabi=apcs-gnu -falign-functions=16
 Settings: SYSCLK=48, ACR=0x11 (1 wait state)
 ***************************************************************************
 
-*****************************
-*** ChibiOS/RT test suite ***
-*****************************
-
 ---------------------------------------------------------------------------
 --- Test Case 1 (Ready List, priority enqueuing test #1)
 --- Result: SUCCESS

docs/reports/STM32F103-72.txt

@@ -1,14 +1,10 @@
 ***************************************************************************
-Kernel:   ChibiOS/RT 0.8.0
+Kernel:   ChibiOS/RT 0.8.2
 Compiler: GCC 4.3.2 (YAGARTO 28.09.2008)
 Options:  -O2 -fomit-frame-pointer -mabi=apcs-gnu -falign-functions=16
 Settings: SYSCLK=72, ACR=0x12 (2 wait states)
 ***************************************************************************
 
-*****************************
-*** ChibiOS/RT test suite ***
-*****************************
-
 ---------------------------------------------------------------------------
 --- Test Case 1 (Ready List, priority enqueuing test #1)
 --- Result: SUCCESS
@@ -44,7 +40,7 @@ Settings: SYSCLK=72, ACR=0x12 (2 wait states)
 --- Result: SUCCESS
 ---------------------------------------------------------------------------
 --- Test Case 12 (Heap, allocation and fragmentation test)
---- Size  : 17252 bytes, not fragmented
+--- Size  : 17224 bytes, not fragmented
 --- Result: SUCCESS
 ---------------------------------------------------------------------------
 --- Test Case 13 (Memory Pools, allocation and enqueuing test)
@@ -69,11 +65,11 @@ Settings: SYSCLK=72, ACR=0x12 (2 wait states)
 --- Result: SUCCESS
 ---------------------------------------------------------------------------
 --- Test Case 19 (Benchmark, threads creation/termination, worst case)
---- Score : 141666 threads/S
+--- Score : 149938 threads/S
 --- Result: SUCCESS
 ---------------------------------------------------------------------------
 --- Test Case 20 (Benchmark, threads creation/termination, optimal)
---- Score : 188024 threads/S
+--- Score : 187045 threads/S
 --- Result: SUCCESS
 ---------------------------------------------------------------------------
 --- Test Case 21 (Benchmark, mass reschedulation, 5 threads)

readme.txt

@@ -87,6 +87,14 @@ Win32-MinGW            - ChibiOS/RT simulator and demo into a WIN32 process,
   WORKING_AREA(), THD_WA_SIZE() and STACK_ALIGN() instead.
 - CHANGE: Renamed the default idle thread function from _IdleThread() to
           _idle().
+- Added to the LPC2148 and STM32 load scripts the options "ALIGN(16)
+  SUBALIGN(16)" to the flash loading section in order to enforce the alignment
+  for both the code and read only data. This is done in order to obtain more
+  accurate timings from benchmarks, those families have 16 bytes
+  prefetch buffers and are very sensitive to alignment changes.
+  You can remove those options in order to save some flash space if accurate
+  response time is not on top of your priorities, it mainly depends on your
+  requirements.
 
 *** 0.8.1 ***
 - FIX: Fixed a regression in version 0.8.0, the configuration switch