Fixed RTC on STM32F0xx.

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@7228 35acf78f-673a-0410-8e92-d51de3d6d3f4
This commit is contained in:
gdisirio 2014-09-01 09:32:56 +00:00
parent f4cf9a546c
commit ee3a27ccf9
4 changed files with 13 additions and 1 deletions

View File

@ -333,6 +333,7 @@ void rtc_lld_set_alarm(RTCDriver *rtcp,
rtcp->rtc->CR &= ~RTC_CR_ALRAE; rtcp->rtc->CR &= ~RTC_CR_ALRAE;
} }
} }
#if STM32_RTC_NUM_ALARMS > 1
else { else {
if (alarmspec != NULL) { if (alarmspec != NULL) {
rtcp->rtc->CR &= ~RTC_CR_ALRBE; rtcp->rtc->CR &= ~RTC_CR_ALRBE;
@ -347,6 +348,7 @@ void rtc_lld_set_alarm(RTCDriver *rtcp,
rtcp->rtc->CR &= ~RTC_CR_ALRBE; rtcp->rtc->CR &= ~RTC_CR_ALRBE;
} }
} }
#endif /* STM32_RTC_NUM_ALARMS > 1 */
} }
/** /**
@ -363,8 +365,10 @@ void rtc_lld_get_alarm(RTCDriver *rtcp,
RTCAlarm *alarmspec) { RTCAlarm *alarmspec) {
if (alarm == 1) if (alarm == 1)
alarmspec->alrmr = rtcp->rtc->ALRMAR; alarmspec->alrmr = rtcp->rtc->ALRMAR;
#if STM32_RTC_NUM_ALARMS > 1
else else
alarmspec->alrmr = rtcp->rtc->ALRMBR; alarmspec->alrmr = rtcp->rtc->ALRMBR;
#endif /* STM32_RTC_NUM_ALARMS > 1 */
} }
#endif /* STM32_RTC_NUM_ALARMS > 0 */ #endif /* STM32_RTC_NUM_ALARMS > 0 */

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@ -763,6 +763,12 @@
#define STM32_FLASHBITS 0x00000011 #define STM32_FLASHBITS 0x00000011
#endif #endif
/*
* For compatibility with driver assuming a specific PPRE clock.
*/
#define STM32_PCLK1 STM32_PCLK
#define STM32_PCLK2 STM32_PCLK
/*===========================================================================*/ /*===========================================================================*/
/* Driver data structures and types. */ /* Driver data structures and types. */
/*===========================================================================*/ /*===========================================================================*/

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@ -7,6 +7,7 @@ PLATFORMSRC = ${CHIBIOS}/os/hal/ports/common/ARMCMx/nvic.c \
${CHIBIOS}/os/hal/ports/STM32/LLD/ext_lld.c \ ${CHIBIOS}/os/hal/ports/STM32/LLD/ext_lld.c \
${CHIBIOS}/os/hal/ports/STM32/LLD/GPIOv2/pal_lld.c \ ${CHIBIOS}/os/hal/ports/STM32/LLD/GPIOv2/pal_lld.c \
${CHIBIOS}/os/hal/ports/STM32/LLD/I2Cv2/i2c_lld.c \ ${CHIBIOS}/os/hal/ports/STM32/LLD/I2Cv2/i2c_lld.c \
${CHIBIOS}/os/hal/ports/STM32/LLD/RTCv2/rtc_lld.c \
${CHIBIOS}/os/hal/ports/STM32/LLD/SPIv2/spi_lld.c \ ${CHIBIOS}/os/hal/ports/STM32/LLD/SPIv2/spi_lld.c \
${CHIBIOS}/os/hal/ports/STM32/LLD/TIMv1/gpt_lld.c \ ${CHIBIOS}/os/hal/ports/STM32/LLD/TIMv1/gpt_lld.c \
${CHIBIOS}/os/hal/ports/STM32/LLD/TIMv1/icu_lld.c \ ${CHIBIOS}/os/hal/ports/STM32/LLD/TIMv1/icu_lld.c \
@ -22,6 +23,7 @@ PLATFORMINC = ${CHIBIOS}/os/hal/ports/common/ARMCMx \
${CHIBIOS}/os/hal/ports/STM32/LLD \ ${CHIBIOS}/os/hal/ports/STM32/LLD \
${CHIBIOS}/os/hal/ports/STM32/LLD/GPIOv2 \ ${CHIBIOS}/os/hal/ports/STM32/LLD/GPIOv2 \
${CHIBIOS}/os/hal/ports/STM32/LLD/I2Cv2 \ ${CHIBIOS}/os/hal/ports/STM32/LLD/I2Cv2 \
${CHIBIOS}/os/hal/ports/STM32/LLD/RTCv2 \
${CHIBIOS}/os/hal/ports/STM32/LLD/SPIv2 \ ${CHIBIOS}/os/hal/ports/STM32/LLD/SPIv2 \
${CHIBIOS}/os/hal/ports/STM32/LLD/TIMv1 \ ${CHIBIOS}/os/hal/ports/STM32/LLD/TIMv1 \
${CHIBIOS}/os/hal/ports/STM32/LLD/USARTv2 \ ${CHIBIOS}/os/hal/ports/STM32/LLD/USARTv2 \

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@ -84,7 +84,7 @@
/* RTC attributes.*/ /* RTC attributes.*/
#define STM32_HAS_RTC TRUE #define STM32_HAS_RTC TRUE
#define STM32_RTC_HAS_SUBSECONDS TRUE #define STM32_RTC_HAS_SUBSECONDS TRUE
#define STM32_RTC_HAS_PERIODIC_WAKEUPS TRUE #define STM32_RTC_HAS_PERIODIC_WAKEUPS FALSE
#define STM32_RTC_NUM_ALARMS 1 #define STM32_RTC_NUM_ALARMS 1
#define STM32_RTC_HAS_INTERRUPTS FALSE #define STM32_RTC_HAS_INTERRUPTS FALSE