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git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5783 35acf78f-673a-0410-8e92-d51de3d6d3f4

This commit is contained in:
pcirillo 2013-06-01 08:46:31 +00:00
parent 09b9d8de34
commit ee5f454577
15 changed files with 89 additions and 103 deletions
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12
os/hal/platforms/SPC563Mxx/spc563m_registry.h
View File

@ -39,20 +39,14 @@
#define SPC5_HAS_DSPI2 TRUE
#define SPC5_HAS_DSPI3 FALSE
#define SPC5_DSPI_FIFO_DEPTH 16
#define SPC5_DSPI1_TX1_DMA_DEV_ID 12
#define SPC5_DSPI1_TX2_DMA_DEV_ID 25
#define SPC5_DSPI1_TX_DMA_DEV_ID 12
#define SPC5_DSPI1_RX_DMA_DEV_ID 13
#define SPC5_DSPI2_TX1_DMA_DEV_ID 14
#define SPC5_DSPI2_TX2_DMA_DEV_ID 26
#define SPC5_DSPI2_TX_DMA_DEV_ID 14
#define SPC5_DSPI2_RX_DMA_DEV_ID 15
#define SPC5_DSPI1_EOQF_HANDLER vector132
#define SPC5_DSPI1_EOQF_NUMBER 132
#define SPC5_DSPI1_TFFF_HANDLER vector133
#define SPC5_DSPI1_TFFF_NUMBER 133
#define SPC5_DSPI2_EOQF_HANDLER vector137
#define SPC5_DSPI2_EOQF_NUMBER 137
#define SPC5_DSPI2_TFFF_HANDLER vector138
#define SPC5_DSPI2_TFFF_NUMBER 138
#define SPC5_DSPI1_ENABLE_CLOCK()
#define SPC5_DSPI1_DISABLE_CLOCK()
#define SPC5_DSPI2_ENABLE_CLOCK()
@ -119,7 +113,7 @@
#define SPC5_EMIOS_FLAG_F15_NUMBER 66
#define SPC5_EMIOS_FLAG_F23_NUMBER 209
#define SPC5_EMIOS_CLK (64000000 / \
#define SPC5_EMIOS_CLK (SPC5_SYSCLK / \
SPC5_EMIOS_GLOBAL_PRESCALER)
#define SPC5_EMIOS_ENABLE_CLOCK()
#define SPC5_EMIOS_DISABLE_CLOCK()

2
os/hal/platforms/SPC564Axx/spc564a_registry.h
View File

@ -112,7 +112,7 @@
#define SPC5_EMIOS_FLAG_F22_NUMBER 208
#define SPC5_EMIOS_FLAG_F23_NUMBER 209
#define SPC5_EMIOS_CLK (64000000 / \
#define SPC5_EMIOS_CLK (SPC5_SYSCLK / \
SPC5_EMIOS_GLOBAL_PRESCALER)
#define SPC5_EMIOS_ENABLE_CLOCK()
#define SPC5_EMIOS_DISABLE_CLOCK()

16
os/hal/platforms/SPC5xx/eMIOS200_v1/icu_lld.c
View File

@ -174,32 +174,32 @@ static void icu_lld_serve_interrupt(ICUDriver *icup) {
uint32_t sr = icup->emiosp->CH[icup->ch_number].CSR.R;
if(sr && EMIOSS_OVFL && icup->config->overflow_cb != NULL){
if (sr && EMIOSS_OVFL && icup->config->overflow_cb != NULL) {
icup->emiosp->CH[icup->ch_number].CSR.R |= EMIOSS_OVFLC;
_icu_isr_invoke_overflow_cb(icup);
}
if (sr && EMIOSS_FLAG){
if (sr && EMIOSS_FLAG) {
icup->emiosp->CH[icup->ch_number].CSR.R |= EMIOSS_FLAGC;
if (icup->config->mode == ICU_INPUT_ACTIVE_HIGH) {
if (icup->emiosp->CH[icup->ch_number].CSR.B.UCIN == 1U && \
if (icup->emiosp->CH[icup->ch_number].CSR.B.UCIN == 1U && \
icup->config->period_cb != NULL) {
A2_3 = icup->emiosp->CH[icup->ch_number].CADR.R;
period = A2_3 - A2_1;
_icu_isr_invoke_period_cb(icup);
A2_1 = A2_3;
} else if (icup->emiosp->CH[icup->ch_number].CSR.B.UCIN == 0 && \
} else if (icup->emiosp->CH[icup->ch_number].CSR.B.UCIN == 0 && \
icup->config->width_cb != NULL) {
A2_2 = icup->emiosp->CH[icup->ch_number].CADR.R;
width = A2_2 - A2_1;
_icu_isr_invoke_width_cb(icup);
}
} else if (icup->config->mode == ICU_INPUT_ACTIVE_LOW) {
if (icup->emiosp->CH[icup->ch_number].CSR.B.UCIN == 1U && \
if (icup->emiosp->CH[icup->ch_number].CSR.B.UCIN == 1U && \
icup->config->width_cb != NULL) {
A2_2 = icup->emiosp->CH[icup->ch_number].CADR.R;
width = A2_2 - A2_1;
_icu_isr_invoke_width_cb(icup);
} else if (icup->emiosp->CH[icup->ch_number].CSR.B.UCIN == 0 && \
} else if (icup->emiosp->CH[icup->ch_number].CSR.B.UCIN == 0 && \
icup->config->period_cb != NULL) {
A2_3 = icup->emiosp->CH[icup->ch_number].CADR.R;
period = A2_3 - A2_1;
@ -208,7 +208,7 @@ static void icu_lld_serve_interrupt(ICUDriver *icup) {
}
}
}
if(sr && EMIOSS_OVR){
if (sr && EMIOSS_OVR) {
icup->emiosp->CH[icup->ch_number].CSR.R |= EMIOSS_OVRC;
}
@ -721,7 +721,7 @@ void icu_lld_start(ICUDriver *icup) {
icup->emiosp->CH[icup->ch_number].CCR.R |= EMIOSC_UCPREN;
/* Set source polarity.*/
if(icup->config->mode == ICU_INPUT_ACTIVE_HIGH){
if (icup->config->mode == ICU_INPUT_ACTIVE_HIGH) {
icup->emiosp->CH[icup->ch_number].CCR.R |= EMIOSC_EDPOL;
} else {
icup->emiosp->CH[icup->ch_number].CCR.R &= ~EMIOSC_EDPOL;

26
os/hal/platforms/SPC5xx/eMIOS200_v1/icu_lld.h
View File

@ -45,7 +45,7 @@
* @note The default is @p FALSE.
*/
#if !defined(SPC5_ICU_USE_EMIOS_CH0) || defined(__DOXYGEN__)
#define SPC5_ICU_USE_EMIOS_CH0 FALSE
#define SPC5_ICU_USE_EMIOS_CH0 FALSE
#endif
/**
@ -54,7 +54,7 @@
* @note The default is @p FALSE.
*/
#if !defined(SPC5_ICU_USE_EMIOS_CH1) || defined(__DOXYGEN__)
#define SPC5_ICU_USE_EMIOS_CH1 FALSE
#define SPC5_ICU_USE_EMIOS_CH1 FALSE
#endif
/**
@ -63,7 +63,7 @@
* @note The default is @p FALSE.
*/
#if !defined(SPC5_ICU_USE_EMIOS_CH2) || defined(__DOXYGEN__)
#define SPC5_ICU_USE_EMIOS_CH2 FALSE
#define SPC5_ICU_USE_EMIOS_CH2 FALSE
#endif
/**
@ -72,7 +72,7 @@
* @note The default is @p FALSE.
*/
#if !defined(SPC5_ICU_USE_EMIOS_CH3) || defined(__DOXYGEN__)
#define SPC5_ICU_USE_EMIOS_CH3 FALSE
#define SPC5_ICU_USE_EMIOS_CH3 FALSE
#endif
/**
@ -81,7 +81,7 @@
* @note The default is @p FALSE.
*/
#if !defined(SPC5_ICU_USE_EMIOS_CH4) || defined(__DOXYGEN__)
#define SPC5_ICU_USE_EMIOS_CH4 FALSE
#define SPC5_ICU_USE_EMIOS_CH4 FALSE
#endif
/**
@ -90,7 +90,7 @@
* @note The default is @p FALSE.
*/
#if !defined(SPC5_ICU_USE_EMIOS_CH5) || defined(__DOXYGEN__)
#define SPC5_ICU_USE_EMIOS_CH5 FALSE
#define SPC5_ICU_USE_EMIOS_CH5 FALSE
#endif
/**
@ -99,7 +99,7 @@
* @note The default is @p FALSE.
*/
#if !defined(SPC5_ICU_USE_EMIOS_CH6) || defined(__DOXYGEN__)
#define SPC5_ICU_USE_EMIOS_CH6 FALSE
#define SPC5_ICU_USE_EMIOS_CH6 FALSE
#endif
/**
@ -108,7 +108,7 @@
* @note The default is @p FALSE.
*/
#if !defined(SPC5_ICU_USE_EMIOS_CH8) || defined(__DOXYGEN__)
#define SPC5_ICU_USE_EMIOS_CH8 FALSE
#define SPC5_ICU_USE_EMIOS_CH8 FALSE
#endif
/**
@ -117,7 +117,7 @@
* @note The default is @p FALSE.
*/
#if !defined(SPC5_ICU_USE_EMIOS_CH7) || defined(__DOXYGEN__)
#define SPC5_ICU_USE_EMIOS_CH7 FALSE
#define SPC5_ICU_USE_EMIOS_CH7 FALSE
#endif
/**
@ -214,21 +214,21 @@
* @brief ICUD10 interrupt priority level setting.
*/
#if !defined(SPC5_EMIOS_FLAG_F16_PRIORITY) || defined(__DOXYGEN__)
#define SPC5_EMIOS_FLAG_F16_PRIORITY 7
#define SPC5_EMIOS_FLAG_F16_PRIORITY 7
#endif
/**
* @brief ICUD11 interrupt priority level setting.
*/
#if !defined(SPC5_EMIOS_FLAG_F17_PRIORITY) || defined(__DOXYGEN__)
#define SPC5_EMIOS_FLAG_F17_PRIORITY 7
#define SPC5_EMIOS_FLAG_F17_PRIORITY 7
#endif
/**
* @brief ICUD12 interrupt priority level setting.
*/
#if !defined(SPC5_EMIOS_FLAG_F18_PRIORITY) || defined(__DOXYGEN__)
#define SPC5_EMIOS_FLAG_F18_PRIORITY 7
#define SPC5_EMIOS_FLAG_F18_PRIORITY 7
#endif
/** @} */
@ -320,7 +320,7 @@ struct ICUDriver {
/**
* @brief eMIOSx channel number.
*/
uint32_t ch_number;
uint32_t ch_number;
/**
* @brief Current configuration data.
*/

22
os/hal/platforms/SPC5xx/eMIOS200_v1/pwm_lld.c
View File

@ -162,28 +162,28 @@ static void pwm_lld_serve_interrupt(PWMDriver *pwmp) {
uint32_t sr = pwmp->emiosp->CH[pwmp->ch_number].CSR.R;
if(sr && EMIOSS_OVFL){
if (sr && EMIOSS_OVFL) {
pwmp->emiosp->CH[pwmp->ch_number].CSR.R |= EMIOSS_OVFLC;
}
if(sr && EMIOSS_OVR){
if (sr && EMIOSS_OVR) {
pwmp->emiosp->CH[pwmp->ch_number].CSR.R |= EMIOSS_OVRC;
}
if (sr && EMIOSS_FLAG){
if (sr && EMIOSS_FLAG) {
pwmp->emiosp->CH[pwmp->ch_number].CSR.R |= EMIOSS_FLAGC;
if (pwmp->config->channels[0].mode == PWM_OUTPUT_ACTIVE_HIGH) {
if (pwmp->emiosp->CH[pwmp->ch_number].CSR.B.UCOUT == 1U && \
if (pwmp->emiosp->CH[pwmp->ch_number].CSR.B.UCOUT == 1U && \
pwmp->config->callback != NULL) {
pwmp->config->callback(pwmp);
} else if (pwmp->emiosp->CH[pwmp->ch_number].CSR.B.UCOUT == 0 && \
} else if (pwmp->emiosp->CH[pwmp->ch_number].CSR.B.UCOUT == 0 && \
pwmp->config->channels[0].callback != NULL) {
pwmp->config->channels[0].callback(pwmp);
}
} else if (pwmp->config->channels[0].mode == PWM_OUTPUT_ACTIVE_LOW) {
if (pwmp->emiosp->CH[pwmp->ch_number].CSR.B.UCOUT == 0 && \
if (pwmp->emiosp->CH[pwmp->ch_number].CSR.B.UCOUT == 0 && \
pwmp->config->callback != NULL) {
pwmp->config->callback(pwmp);
} else if (pwmp->emiosp->CH[pwmp->ch_number].CSR.B.UCOUT == 1U && \
} else if (pwmp->emiosp->CH[pwmp->ch_number].CSR.B.UCOUT == 1U && \
pwmp->config->channels[0].callback != NULL) {
pwmp->config->channels[0].callback(pwmp);
}
@ -707,19 +707,19 @@ void pwm_lld_start(PWMDriver *pwmp) {
pwmp->emiosp->CH[pwmp->ch_number].CBDR.R = pwmp->config->period;
pwmp->emiosp->CH[pwmp->ch_number].CCR.R |=
EMIOSC_BSL(EMIOS_BSL_INTERNAL_COUNTER) | EMIOS_CCR_MODE_OPWFMB | 2U;
pwmp->emiosp->CH[pwmp->ch_number].CCR.R |= EMIOSC_UCPREN;;
pwmp->emiosp->CH[pwmp->ch_number].CCR.R |= EMIOSC_UCPREN;
/* Set output polarity.*/
if(pwmp->config->channels[0].mode == PWM_OUTPUT_ACTIVE_LOW) {
if (pwmp->config->channels[0].mode == PWM_OUTPUT_ACTIVE_LOW) {
pwmp->emiosp->CH[pwmp->ch_number].CCR.R |= EMIOSC_EDPOL;
} else if(pwmp->config->channels[0].mode == PWM_OUTPUT_ACTIVE_HIGH) {
} else if (pwmp->config->channels[0].mode == PWM_OUTPUT_ACTIVE_HIGH) {
pwmp->emiosp->CH[pwmp->ch_number].CCR.R &= ~EMIOSC_EDPOL;
}
/* Channel disables.*/
pwmp->emiosp->UCDIS.R |= (1 << pwmp->ch_number);
} else if (pwmp->config->mode == PWM_ALIGN_CENTER){
} else if (pwmp->config->mode == PWM_ALIGN_CENTER) {
/* Not implemented.*/
}

2
os/hal/platforms/SPC5xx/eMIOS200_v1/pwm_lld.h
View File

@ -62,7 +62,7 @@
* @note The default is @p FALSE.
*/
#if !defined(SPC5_PWM_USE_EMIOS_CH9) || defined(__DOXYGEN__)
#define SPC5_PWM_USE_EMIOS_CH9 FALSE
#define SPC5_PWM_USE_EMIOS_CH9 FALSE
#endif
/**

3
os/hal/platforms/SPC5xx/eMIOS200_v1/spc5_emios.h
View File

@ -67,7 +67,8 @@
#define EMIOS_CCR_MODE_MC_CME 17
#define EMIOS_CCR_MODE_MC_UP_DOWN 18
#define EMIOS_CCR_MODE_OPWMT 38
#define EMIOS_CCR_MODE_MCB 84
#define EMIOS_CCR_MODE_MCB_UP 80
#define EMIOS_CCR_MODE_MCB_UP_DOWN 84
#define EMIOS_CCR_MODE_OPWFMB 88
#define EMIOS_CCR_MODE_OPWMCB_TE 92
#define EMIOS_CCR_MODE_OPWMCB_LE 93

2
testhal/SPC563Mxx/ICU-PWM/halconf.h
View File

@ -128,7 +128,7 @@
* @brief Enables the SERIAL subsystem.
*/
#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__)
#define HAL_USE_SERIAL TRUE
#define HAL_USE_SERIAL FALSE
#endif
/**

53
testhal/SPC563Mxx/ICU-PWM/main.c
View File

@ -1,21 +1,21 @@
/*
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
* Licensed under ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
* You may obtain a copy of the License at:
*
* http://www.st.com/software_license_agreement_liberty_v2
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
#include "ch.h"
#include "hal.h"
/* Inclusion of the main header files of all the imported components in the
order specified in the application wizard. The file is generated
automatically.*/
#include "components.h"
static void pwmpcb(PWMDriver *pwmp) {
@ -30,8 +30,8 @@ static void pwmc1cb(PWMDriver *pwmp) {
}
static PWMConfig pwmcfg = {
80000, /* 80kHz PWM clock frequency.*/
20000, /* Initial PWM period 0.25s.*/
100000, /* 100kHz PWM clock frequency.*/
20000, /* Initial PWM period 0.2s.*/
pwmpcb,
{
{PWM_OUTPUT_ACTIVE_HIGH, pwmc1cb}
@ -40,7 +40,6 @@ static PWMConfig pwmcfg = {
};
icucnt_t last_width, last_period;
icucnt_t last_width2, last_period2;
static void icuwidthcb(ICUDriver *icup) {
@ -56,7 +55,7 @@ static void icuperiodcb(ICUDriver *icup) {
static ICUConfig icucfg = {
ICU_INPUT_ACTIVE_HIGH,
80000, /* 80kHz ICU clock frequency.*/
100000, /* 100kHz ICU clock frequency.*/
icuwidthcb,
icuperiodcb,
NULL
@ -67,15 +66,11 @@ static ICUConfig icucfg = {
*/
int main(void) {
/*
* System initializations.
* - HAL initialization, this also initializes the configured device drivers
* and performs the board-specific initializations.
* - Kernel initialization, the main() function becomes a thread and the
* RTOS is active.
*/
halInit();
chSysInit();
/* Initialization of all the imported components in the order specified in
the application wizard. The function is generated automatically.*/
componentsInit();
palClearPad(PORT11, P11_LED4);
/*
* Initializes the PWM driver 8 and ICU driver 1.

0
testhal/SPC564Axx/ICU_PWM/Makefile → testhal/SPC564Axx/ICU-PWM/Makefile
View File

0
testhal/SPC564Axx/ICU_PWM/chconf.h → testhal/SPC564Axx/ICU-PWM/chconf.h
View File

0
testhal/SPC564Axx/ICU_PWM/halconf.h → testhal/SPC564Axx/ICU-PWM/halconf.h
View File

54
testhal/SPC564Axx/ICU_PWM/main.c → testhal/SPC564Axx/ICU-PWM/main.c
View File

@ -1,21 +1,21 @@
/*
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
* Licensed under ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
* You may obtain a copy of the License at:
*
* http://www.st.com/software_license_agreement_liberty_v2
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
#include "ch.h"
#include "hal.h"
/* Inclusion of the main header files of all the imported components in the
order specified in the application wizard. The file is generated
automatically.*/
#include "components.h"
static void pwmpcb(PWMDriver *pwmp) {
@ -30,8 +30,8 @@ static void pwmc1cb(PWMDriver *pwmp) {
}
static PWMConfig pwmcfg = {
80000, /* 80kHz PWM clock frequency.*/
20000, /* Initial PWM period 0.25s.*/
187500, /* 187500Hz PWM clock frequency.*/
19500, /* Initial PWM period 0.1040s.*/
pwmpcb,
{
{PWM_OUTPUT_ACTIVE_HIGH, pwmc1cb}
@ -40,7 +40,6 @@ static PWMConfig pwmcfg = {
};
icucnt_t last_width, last_period;
icucnt_t last_width2, last_period2;
static void icuwidthcb(ICUDriver *icup) {
@ -56,7 +55,7 @@ static void icuperiodcb(ICUDriver *icup) {
static ICUConfig icucfg = {
ICU_INPUT_ACTIVE_HIGH,
80000, /* 80kHz ICU clock frequency.*/
187500, /* 187500Hz ICU clock frequency.*/
icuwidthcb,
icuperiodcb,
NULL
@ -66,15 +65,12 @@ static ICUConfig icucfg = {
* Application entry point.
*/
int main(void) {
/*
* System initializations.
* - HAL initialization, this also initializes the configured device drivers
* and performs the board-specific initializations.
* - Kernel initialization, the main() function becomes a thread and the
* RTOS is active.
*/
halInit();
chSysInit();
/* Initialization of all the imported components in the order specified in
the application wizard. The function is generated automatically.*/
componentsInit();
palClearPad(PORT11, P11_LED4);
/*
* Initializes the PWM driver 6 and ICU driver 3.

0
testhal/SPC564Axx/ICU_PWM/mcuconf.h → testhal/SPC564Axx/ICU-PWM/mcuconf.h
View File

0
testhal/SPC564Axx/ICU_PWM/readme.txt → testhal/SPC564Axx/ICU-PWM/readme.txt
View File