git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5783 35acf78f-673a-0410-8e92-d51de3d6d3f4
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@ -39,20 +39,14 @@
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#define SPC5_HAS_DSPI2 TRUE
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#define SPC5_HAS_DSPI3 FALSE
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#define SPC5_DSPI_FIFO_DEPTH 16
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#define SPC5_DSPI1_TX1_DMA_DEV_ID 12
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#define SPC5_DSPI1_TX2_DMA_DEV_ID 25
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#define SPC5_DSPI1_TX_DMA_DEV_ID 12
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#define SPC5_DSPI1_RX_DMA_DEV_ID 13
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#define SPC5_DSPI2_TX1_DMA_DEV_ID 14
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#define SPC5_DSPI2_TX2_DMA_DEV_ID 26
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#define SPC5_DSPI2_TX_DMA_DEV_ID 14
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#define SPC5_DSPI2_RX_DMA_DEV_ID 15
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#define SPC5_DSPI1_EOQF_HANDLER vector132
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#define SPC5_DSPI1_EOQF_NUMBER 132
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#define SPC5_DSPI1_TFFF_HANDLER vector133
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#define SPC5_DSPI1_TFFF_NUMBER 133
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#define SPC5_DSPI2_EOQF_HANDLER vector137
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#define SPC5_DSPI2_EOQF_NUMBER 137
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#define SPC5_DSPI2_TFFF_HANDLER vector138
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#define SPC5_DSPI2_TFFF_NUMBER 138
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#define SPC5_DSPI1_ENABLE_CLOCK()
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#define SPC5_DSPI1_DISABLE_CLOCK()
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#define SPC5_DSPI2_ENABLE_CLOCK()
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@ -119,7 +113,7 @@
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#define SPC5_EMIOS_FLAG_F15_NUMBER 66
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#define SPC5_EMIOS_FLAG_F23_NUMBER 209
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#define SPC5_EMIOS_CLK (64000000 / \
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#define SPC5_EMIOS_CLK (SPC5_SYSCLK / \
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SPC5_EMIOS_GLOBAL_PRESCALER)
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#define SPC5_EMIOS_ENABLE_CLOCK()
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#define SPC5_EMIOS_DISABLE_CLOCK()
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@ -112,7 +112,7 @@
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#define SPC5_EMIOS_FLAG_F22_NUMBER 208
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#define SPC5_EMIOS_FLAG_F23_NUMBER 209
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#define SPC5_EMIOS_CLK (64000000 / \
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#define SPC5_EMIOS_CLK (SPC5_SYSCLK / \
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SPC5_EMIOS_GLOBAL_PRESCALER)
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#define SPC5_EMIOS_ENABLE_CLOCK()
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#define SPC5_EMIOS_DISABLE_CLOCK()
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@ -174,32 +174,32 @@ static void icu_lld_serve_interrupt(ICUDriver *icup) {
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uint32_t sr = icup->emiosp->CH[icup->ch_number].CSR.R;
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if(sr && EMIOSS_OVFL && icup->config->overflow_cb != NULL){
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if (sr && EMIOSS_OVFL && icup->config->overflow_cb != NULL) {
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icup->emiosp->CH[icup->ch_number].CSR.R |= EMIOSS_OVFLC;
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_icu_isr_invoke_overflow_cb(icup);
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}
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if (sr && EMIOSS_FLAG){
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if (sr && EMIOSS_FLAG) {
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icup->emiosp->CH[icup->ch_number].CSR.R |= EMIOSS_FLAGC;
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if (icup->config->mode == ICU_INPUT_ACTIVE_HIGH) {
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if (icup->emiosp->CH[icup->ch_number].CSR.B.UCIN == 1U && \
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if (icup->emiosp->CH[icup->ch_number].CSR.B.UCIN == 1U && \
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icup->config->period_cb != NULL) {
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A2_3 = icup->emiosp->CH[icup->ch_number].CADR.R;
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period = A2_3 - A2_1;
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_icu_isr_invoke_period_cb(icup);
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A2_1 = A2_3;
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} else if (icup->emiosp->CH[icup->ch_number].CSR.B.UCIN == 0 && \
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} else if (icup->emiosp->CH[icup->ch_number].CSR.B.UCIN == 0 && \
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icup->config->width_cb != NULL) {
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A2_2 = icup->emiosp->CH[icup->ch_number].CADR.R;
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width = A2_2 - A2_1;
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_icu_isr_invoke_width_cb(icup);
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}
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} else if (icup->config->mode == ICU_INPUT_ACTIVE_LOW) {
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if (icup->emiosp->CH[icup->ch_number].CSR.B.UCIN == 1U && \
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if (icup->emiosp->CH[icup->ch_number].CSR.B.UCIN == 1U && \
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icup->config->width_cb != NULL) {
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A2_2 = icup->emiosp->CH[icup->ch_number].CADR.R;
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width = A2_2 - A2_1;
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_icu_isr_invoke_width_cb(icup);
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} else if (icup->emiosp->CH[icup->ch_number].CSR.B.UCIN == 0 && \
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} else if (icup->emiosp->CH[icup->ch_number].CSR.B.UCIN == 0 && \
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icup->config->period_cb != NULL) {
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A2_3 = icup->emiosp->CH[icup->ch_number].CADR.R;
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period = A2_3 - A2_1;
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@ -208,7 +208,7 @@ static void icu_lld_serve_interrupt(ICUDriver *icup) {
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}
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}
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}
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if(sr && EMIOSS_OVR){
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if (sr && EMIOSS_OVR) {
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icup->emiosp->CH[icup->ch_number].CSR.R |= EMIOSS_OVRC;
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}
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@ -721,7 +721,7 @@ void icu_lld_start(ICUDriver *icup) {
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icup->emiosp->CH[icup->ch_number].CCR.R |= EMIOSC_UCPREN;
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/* Set source polarity.*/
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if(icup->config->mode == ICU_INPUT_ACTIVE_HIGH){
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if (icup->config->mode == ICU_INPUT_ACTIVE_HIGH) {
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icup->emiosp->CH[icup->ch_number].CCR.R |= EMIOSC_EDPOL;
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} else {
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icup->emiosp->CH[icup->ch_number].CCR.R &= ~EMIOSC_EDPOL;
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@ -45,7 +45,7 @@
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* @note The default is @p FALSE.
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*/
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#if !defined(SPC5_ICU_USE_EMIOS_CH0) || defined(__DOXYGEN__)
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#define SPC5_ICU_USE_EMIOS_CH0 FALSE
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#define SPC5_ICU_USE_EMIOS_CH0 FALSE
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#endif
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/**
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@ -54,7 +54,7 @@
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* @note The default is @p FALSE.
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*/
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#if !defined(SPC5_ICU_USE_EMIOS_CH1) || defined(__DOXYGEN__)
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#define SPC5_ICU_USE_EMIOS_CH1 FALSE
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#define SPC5_ICU_USE_EMIOS_CH1 FALSE
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#endif
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/**
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@ -63,7 +63,7 @@
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* @note The default is @p FALSE.
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*/
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#if !defined(SPC5_ICU_USE_EMIOS_CH2) || defined(__DOXYGEN__)
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#define SPC5_ICU_USE_EMIOS_CH2 FALSE
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#define SPC5_ICU_USE_EMIOS_CH2 FALSE
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#endif
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/**
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* @note The default is @p FALSE.
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*/
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#if !defined(SPC5_ICU_USE_EMIOS_CH3) || defined(__DOXYGEN__)
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#define SPC5_ICU_USE_EMIOS_CH3 FALSE
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#define SPC5_ICU_USE_EMIOS_CH3 FALSE
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#endif
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/**
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* @note The default is @p FALSE.
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*/
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#if !defined(SPC5_ICU_USE_EMIOS_CH4) || defined(__DOXYGEN__)
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#define SPC5_ICU_USE_EMIOS_CH4 FALSE
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#define SPC5_ICU_USE_EMIOS_CH4 FALSE
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#endif
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/**
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@ -90,7 +90,7 @@
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* @note The default is @p FALSE.
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*/
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#if !defined(SPC5_ICU_USE_EMIOS_CH5) || defined(__DOXYGEN__)
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#define SPC5_ICU_USE_EMIOS_CH5 FALSE
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#define SPC5_ICU_USE_EMIOS_CH5 FALSE
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#endif
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/**
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@ -99,7 +99,7 @@
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* @note The default is @p FALSE.
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*/
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#if !defined(SPC5_ICU_USE_EMIOS_CH6) || defined(__DOXYGEN__)
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#define SPC5_ICU_USE_EMIOS_CH6 FALSE
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#define SPC5_ICU_USE_EMIOS_CH6 FALSE
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#endif
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/**
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@ -108,7 +108,7 @@
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* @note The default is @p FALSE.
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*/
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#if !defined(SPC5_ICU_USE_EMIOS_CH8) || defined(__DOXYGEN__)
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#define SPC5_ICU_USE_EMIOS_CH8 FALSE
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#define SPC5_ICU_USE_EMIOS_CH8 FALSE
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#endif
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/**
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* @note The default is @p FALSE.
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*/
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#if !defined(SPC5_ICU_USE_EMIOS_CH7) || defined(__DOXYGEN__)
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#define SPC5_ICU_USE_EMIOS_CH7 FALSE
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#define SPC5_ICU_USE_EMIOS_CH7 FALSE
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#endif
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/**
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* @brief ICUD10 interrupt priority level setting.
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*/
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#if !defined(SPC5_EMIOS_FLAG_F16_PRIORITY) || defined(__DOXYGEN__)
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#define SPC5_EMIOS_FLAG_F16_PRIORITY 7
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#define SPC5_EMIOS_FLAG_F16_PRIORITY 7
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#endif
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/**
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* @brief ICUD11 interrupt priority level setting.
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*/
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#if !defined(SPC5_EMIOS_FLAG_F17_PRIORITY) || defined(__DOXYGEN__)
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#define SPC5_EMIOS_FLAG_F17_PRIORITY 7
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#define SPC5_EMIOS_FLAG_F17_PRIORITY 7
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#endif
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/**
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* @brief ICUD12 interrupt priority level setting.
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*/
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#if !defined(SPC5_EMIOS_FLAG_F18_PRIORITY) || defined(__DOXYGEN__)
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#define SPC5_EMIOS_FLAG_F18_PRIORITY 7
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#define SPC5_EMIOS_FLAG_F18_PRIORITY 7
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#endif
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/** @} */
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@ -320,7 +320,7 @@ struct ICUDriver {
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/**
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* @brief eMIOSx channel number.
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*/
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uint32_t ch_number;
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uint32_t ch_number;
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/**
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* @brief Current configuration data.
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*/
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@ -162,28 +162,28 @@ static void pwm_lld_serve_interrupt(PWMDriver *pwmp) {
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uint32_t sr = pwmp->emiosp->CH[pwmp->ch_number].CSR.R;
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if(sr && EMIOSS_OVFL){
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if (sr && EMIOSS_OVFL) {
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pwmp->emiosp->CH[pwmp->ch_number].CSR.R |= EMIOSS_OVFLC;
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}
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if(sr && EMIOSS_OVR){
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if (sr && EMIOSS_OVR) {
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pwmp->emiosp->CH[pwmp->ch_number].CSR.R |= EMIOSS_OVRC;
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}
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if (sr && EMIOSS_FLAG){
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if (sr && EMIOSS_FLAG) {
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pwmp->emiosp->CH[pwmp->ch_number].CSR.R |= EMIOSS_FLAGC;
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if (pwmp->config->channels[0].mode == PWM_OUTPUT_ACTIVE_HIGH) {
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if (pwmp->emiosp->CH[pwmp->ch_number].CSR.B.UCOUT == 1U && \
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if (pwmp->emiosp->CH[pwmp->ch_number].CSR.B.UCOUT == 1U && \
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pwmp->config->callback != NULL) {
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pwmp->config->callback(pwmp);
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} else if (pwmp->emiosp->CH[pwmp->ch_number].CSR.B.UCOUT == 0 && \
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} else if (pwmp->emiosp->CH[pwmp->ch_number].CSR.B.UCOUT == 0 && \
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pwmp->config->channels[0].callback != NULL) {
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pwmp->config->channels[0].callback(pwmp);
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}
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} else if (pwmp->config->channels[0].mode == PWM_OUTPUT_ACTIVE_LOW) {
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if (pwmp->emiosp->CH[pwmp->ch_number].CSR.B.UCOUT == 0 && \
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if (pwmp->emiosp->CH[pwmp->ch_number].CSR.B.UCOUT == 0 && \
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pwmp->config->callback != NULL) {
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pwmp->config->callback(pwmp);
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} else if (pwmp->emiosp->CH[pwmp->ch_number].CSR.B.UCOUT == 1U && \
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} else if (pwmp->emiosp->CH[pwmp->ch_number].CSR.B.UCOUT == 1U && \
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pwmp->config->channels[0].callback != NULL) {
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pwmp->config->channels[0].callback(pwmp);
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}
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@ -707,19 +707,19 @@ void pwm_lld_start(PWMDriver *pwmp) {
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pwmp->emiosp->CH[pwmp->ch_number].CBDR.R = pwmp->config->period;
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pwmp->emiosp->CH[pwmp->ch_number].CCR.R |=
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EMIOSC_BSL(EMIOS_BSL_INTERNAL_COUNTER) | EMIOS_CCR_MODE_OPWFMB | 2U;
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pwmp->emiosp->CH[pwmp->ch_number].CCR.R |= EMIOSC_UCPREN;;
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pwmp->emiosp->CH[pwmp->ch_number].CCR.R |= EMIOSC_UCPREN;
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/* Set output polarity.*/
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if(pwmp->config->channels[0].mode == PWM_OUTPUT_ACTIVE_LOW) {
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if (pwmp->config->channels[0].mode == PWM_OUTPUT_ACTIVE_LOW) {
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pwmp->emiosp->CH[pwmp->ch_number].CCR.R |= EMIOSC_EDPOL;
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} else if(pwmp->config->channels[0].mode == PWM_OUTPUT_ACTIVE_HIGH) {
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} else if (pwmp->config->channels[0].mode == PWM_OUTPUT_ACTIVE_HIGH) {
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pwmp->emiosp->CH[pwmp->ch_number].CCR.R &= ~EMIOSC_EDPOL;
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}
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/* Channel disables.*/
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pwmp->emiosp->UCDIS.R |= (1 << pwmp->ch_number);
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} else if (pwmp->config->mode == PWM_ALIGN_CENTER){
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} else if (pwmp->config->mode == PWM_ALIGN_CENTER) {
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/* Not implemented.*/
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}
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@ -62,7 +62,7 @@
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* @note The default is @p FALSE.
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*/
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#if !defined(SPC5_PWM_USE_EMIOS_CH9) || defined(__DOXYGEN__)
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#define SPC5_PWM_USE_EMIOS_CH9 FALSE
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#define SPC5_PWM_USE_EMIOS_CH9 FALSE
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#endif
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/**
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@ -67,7 +67,8 @@
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#define EMIOS_CCR_MODE_MC_CME 17
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#define EMIOS_CCR_MODE_MC_UP_DOWN 18
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#define EMIOS_CCR_MODE_OPWMT 38
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#define EMIOS_CCR_MODE_MCB 84
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#define EMIOS_CCR_MODE_MCB_UP 80
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#define EMIOS_CCR_MODE_MCB_UP_DOWN 84
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#define EMIOS_CCR_MODE_OPWFMB 88
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#define EMIOS_CCR_MODE_OPWMCB_TE 92
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#define EMIOS_CCR_MODE_OPWMCB_LE 93
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@ -128,7 +128,7 @@
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* @brief Enables the SERIAL subsystem.
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*/
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#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__)
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#define HAL_USE_SERIAL TRUE
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#define HAL_USE_SERIAL FALSE
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#endif
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/**
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@ -1,21 +1,21 @@
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/*
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ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
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* Licensed under ST Liberty SW License Agreement V2, (the "License");
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* You may not use this file except in compliance with the License.
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* You may obtain a copy of the License at:
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*
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* http://www.st.com/software_license_agreement_liberty_v2
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
|
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* limitations under the License.
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*/
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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||||
http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
|
||||
limitations under the License.
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*/
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#include "ch.h"
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#include "hal.h"
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/* Inclusion of the main header files of all the imported components in the
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order specified in the application wizard. The file is generated
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automatically.*/
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#include "components.h"
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static void pwmpcb(PWMDriver *pwmp) {
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@ -30,8 +30,8 @@ static void pwmc1cb(PWMDriver *pwmp) {
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}
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static PWMConfig pwmcfg = {
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80000, /* 80kHz PWM clock frequency.*/
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20000, /* Initial PWM period 0.25s.*/
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100000, /* 100kHz PWM clock frequency.*/
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20000, /* Initial PWM period 0.2s.*/
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pwmpcb,
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{
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{PWM_OUTPUT_ACTIVE_HIGH, pwmc1cb}
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@ -40,7 +40,6 @@ static PWMConfig pwmcfg = {
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};
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icucnt_t last_width, last_period;
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icucnt_t last_width2, last_period2;
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static void icuwidthcb(ICUDriver *icup) {
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@ -56,7 +55,7 @@ static void icuperiodcb(ICUDriver *icup) {
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static ICUConfig icucfg = {
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ICU_INPUT_ACTIVE_HIGH,
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80000, /* 80kHz ICU clock frequency.*/
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100000, /* 100kHz ICU clock frequency.*/
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icuwidthcb,
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icuperiodcb,
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NULL
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@ -67,15 +66,11 @@ static ICUConfig icucfg = {
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*/
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int main(void) {
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/*
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* System initializations.
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* - HAL initialization, this also initializes the configured device drivers
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* and performs the board-specific initializations.
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* - Kernel initialization, the main() function becomes a thread and the
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* RTOS is active.
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*/
|
||||
halInit();
|
||||
chSysInit();
|
||||
/* Initialization of all the imported components in the order specified in
|
||||
the application wizard. The function is generated automatically.*/
|
||||
componentsInit();
|
||||
|
||||
palClearPad(PORT11, P11_LED4);
|
||||
|
||||
/*
|
||||
* Initializes the PWM driver 8 and ICU driver 1.
|
||||
|
|
|
@ -1,21 +1,21 @@
|
|||
/*
|
||||
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
|
||||
* Licensed under ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at:
|
||||
*
|
||||
* http://www.st.com/software_license_agreement_liberty_v2
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
#include "ch.h"
|
||||
#include "hal.h"
|
||||
/* Inclusion of the main header files of all the imported components in the
|
||||
order specified in the application wizard. The file is generated
|
||||
automatically.*/
|
||||
#include "components.h"
|
||||
|
||||
static void pwmpcb(PWMDriver *pwmp) {
|
||||
|
||||
|
@ -30,8 +30,8 @@ static void pwmc1cb(PWMDriver *pwmp) {
|
|||
}
|
||||
|
||||
static PWMConfig pwmcfg = {
|
||||
80000, /* 80kHz PWM clock frequency.*/
|
||||
20000, /* Initial PWM period 0.25s.*/
|
||||
187500, /* 187500Hz PWM clock frequency.*/
|
||||
19500, /* Initial PWM period 0.1040s.*/
|
||||
pwmpcb,
|
||||
{
|
||||
{PWM_OUTPUT_ACTIVE_HIGH, pwmc1cb}
|
||||
|
@ -40,7 +40,6 @@ static PWMConfig pwmcfg = {
|
|||
};
|
||||
|
||||
icucnt_t last_width, last_period;
|
||||
icucnt_t last_width2, last_period2;
|
||||
|
||||
static void icuwidthcb(ICUDriver *icup) {
|
||||
|
||||
|
@ -56,7 +55,7 @@ static void icuperiodcb(ICUDriver *icup) {
|
|||
|
||||
static ICUConfig icucfg = {
|
||||
ICU_INPUT_ACTIVE_HIGH,
|
||||
80000, /* 80kHz ICU clock frequency.*/
|
||||
187500, /* 187500Hz ICU clock frequency.*/
|
||||
icuwidthcb,
|
||||
icuperiodcb,
|
||||
NULL
|
||||
|
@ -66,15 +65,12 @@ static ICUConfig icucfg = {
|
|||
* Application entry point.
|
||||
*/
|
||||
int main(void) {
|
||||
/*
|
||||
* System initializations.
|
||||
* - HAL initialization, this also initializes the configured device drivers
|
||||
* and performs the board-specific initializations.
|
||||
* - Kernel initialization, the main() function becomes a thread and the
|
||||
* RTOS is active.
|
||||
*/
|
||||
halInit();
|
||||
chSysInit();
|
||||
|
||||
/* Initialization of all the imported components in the order specified in
|
||||
the application wizard. The function is generated automatically.*/
|
||||
componentsInit();
|
||||
|
||||
palClearPad(PORT11, P11_LED4);
|
||||
|
||||
/*
|
||||
* Initializes the PWM driver 6 and ICU driver 3.
|
Loading…
Reference in New Issue