From ef53891490be19446ef7305aa68aebdaf89ec044 Mon Sep 17 00:00:00 2001 From: Giovanni Di Sirio Date: Tue, 9 Jul 2019 09:27:21 +0000 Subject: [PATCH] Missing definitions in G0 registry. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@12889 27425a3e-05d8-49a3-a47f-9c15f0e5edd8 --- os/hal/ports/STM32/STM32G0xx/platform.mk | 2 +- os/hal/ports/STM32/STM32G0xx/stm32_registry.h | 30 +++++++++++++++++-- 2 files changed, 29 insertions(+), 3 deletions(-) diff --git a/os/hal/ports/STM32/STM32G0xx/platform.mk b/os/hal/ports/STM32/STM32G0xx/platform.mk index d8e8aa535..1cd72709d 100644 --- a/os/hal/ports/STM32/STM32G0xx/platform.mk +++ b/os/hal/ports/STM32/STM32G0xx/platform.mk @@ -32,7 +32,7 @@ include $(CHIBIOS)/os/hal/ports/STM32/LLD/EXTIv1/driver.mk include $(CHIBIOS)/os/hal/ports/STM32/LLD/GPIOv2/driver.mk #include $(CHIBIOS)/os/hal/ports/STM32/LLD/I2Cv2/driver.mk #include $(CHIBIOS)/os/hal/ports/STM32/LLD/RTCv2/driver.mk -#include $(CHIBIOS)/os/hal/ports/STM32/LLD/SPIv2/driver.mk +include $(CHIBIOS)/os/hal/ports/STM32/LLD/SPIv2/driver.mk include $(CHIBIOS)/os/hal/ports/STM32/LLD/TIMv1/driver.mk include $(CHIBIOS)/os/hal/ports/STM32/LLD/USARTv2/driver.mk include $(CHIBIOS)/os/hal/ports/STM32/LLD/xWDGv1/driver.mk diff --git a/os/hal/ports/STM32/STM32G0xx/stm32_registry.h b/os/hal/ports/STM32/STM32G0xx/stm32_registry.h index 935724c6a..a03bd2e9b 100644 --- a/os/hal/ports/STM32/STM32G0xx/stm32_registry.h +++ b/os/hal/ports/STM32/STM32G0xx/stm32_registry.h @@ -96,6 +96,7 @@ #define STM32_DMA_SUPPORTS_CSELR FALSE #define STM32_DMA1_NUM_CHANNELS 7 +#define STM32_DMA2_NUM_CHANNELS 0 #define STM32_DMA1_CH1_HANDLER Vector64 #define STM32_DMA1_CH23_HANDLER Vector68 #define STM32_DMA1_CH4567_HANDLER Vector6C @@ -103,7 +104,19 @@ #define STM32_DMA1_CH23_NUMBER 10 #define STM32_DMA1_CH4567_NUMBER 11 -#define STM32_DMA2_NUM_CHANNELS 0 +#define STM32_DMA1_CH2_NUMBER STM32_DMA1_CH23_NUMBER +#define STM32_DMA1_CH3_NUMBER STM32_DMA1_CH23_NUMBER +#define DMA1_CH2_CMASK 0x00000006U +#define DMA1_CH3_CMASK 0x00000006U + +#define STM32_DMA1_CH4_NUMBER STM32_DMA1_CH4567_NUMBER +#define STM32_DMA1_CH5_NUMBER STM32_DMA1_CH4567_NUMBER +#define STM32_DMA1_CH6_NUMBER STM32_DMA1_CH4567_NUMBER +#define STM32_DMA1_CH7_NUMBER STM32_DMA1_CH4567_NUMBER +#define DMA1_CH4_CMASK 0x00000078U +#define DMA1_CH5_CMASK 0x00000078U +#define DMA1_CH6_CMASK 0x00000078U +#define DMA1_CH7_CMASK 0x00000078U /* ETH attributes.*/ #define STM32_HAS_ETH FALSE @@ -292,6 +305,7 @@ #define STM32_DMA_SUPPORTS_CSELR FALSE #define STM32_DMA1_NUM_CHANNELS 7 +#define STM32_DMA2_NUM_CHANNELS 0 #define STM32_DMA1_CH1_HANDLER Vector64 #define STM32_DMA1_CH23_HANDLER Vector68 #define STM32_DMA1_CH4567_HANDLER Vector6C @@ -299,7 +313,19 @@ #define STM32_DMA1_CH23_NUMBER 10 #define STM32_DMA1_CH4567_NUMBER 11 -#define STM32_DMA2_NUM_CHANNELS 0 +#define STM32_DMA1_CH2_NUMBER STM32_DMA1_CH23_NUMBER +#define STM32_DMA1_CH3_NUMBER STM32_DMA1_CH23_NUMBER +#define DMA1_CH2_CMASK 0x00000006U +#define DMA1_CH3_CMASK 0x00000006U + +#define STM32_DMA1_CH4_NUMBER STM32_DMA1_CH4567_NUMBER +#define STM32_DMA1_CH5_NUMBER STM32_DMA1_CH4567_NUMBER +#define STM32_DMA1_CH6_NUMBER STM32_DMA1_CH4567_NUMBER +#define STM32_DMA1_CH7_NUMBER STM32_DMA1_CH4567_NUMBER +#define DMA1_CH4_CMASK 0x00000078U +#define DMA1_CH5_CMASK 0x00000078U +#define DMA1_CH6_CMASK 0x00000078U +#define DMA1_CH7_CMASK 0x00000078U /* ETH attributes.*/ #define STM32_HAS_ETH FALSE