From f03a012a2d196dd26b0c8ae38bcd397956346352 Mon Sep 17 00:00:00 2001
From: gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>
Date: Mon, 5 Jul 2010 12:48:35 +0000
Subject: [PATCH] Fixed bug 3025133.

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2054 35acf78f-673a-0410-8e92-d51de3d6d3f4
---
 os/ports/GCC/ARMCMx/chcore.h | 25 +++++++++++++++++++++----
 readme.txt                   |  4 ++++
 2 files changed, 25 insertions(+), 4 deletions(-)

diff --git a/os/ports/GCC/ARMCMx/chcore.h b/os/ports/GCC/ARMCMx/chcore.h
index 7ccc59290..c0396c1d5 100644
--- a/os/ports/GCC/ARMCMx/chcore.h
+++ b/os/ports/GCC/ARMCMx/chcore.h
@@ -128,7 +128,7 @@
  *          to user in the ARMv6-M port.
  */
 #ifndef CORTEX_PRIORITY_SVCALL
-#define CORTEX_PRIORITY_SVCALL (CORTEX_MAXIMUM_PRIORITY + 1)
+#define CORTEX_PRIORITY_SVCALL  (CORTEX_MAXIMUM_PRIORITY + 1)
 #else
 /* If it is externally redefined then better perform a validity check on it.*/
 #if !CORTEX_IS_VALID_PRIORITY(CORTEX_PRIORITY_SVCALL)
@@ -146,7 +146,7 @@
  *          the minimum priority level.
  */
 #ifndef CORTEX_PRIORITY_PENDSV
-#define CORTEX_PRIORITY_PENDSV CORTEX_MINIMUM_PRIORITY
+#define CORTEX_PRIORITY_PENDSV  CORTEX_MINIMUM_PRIORITY
 #else
 /* If it is externally redefined then better perform a validity check on it.*/
 #if !CORTEX_IS_VALID_PRIORITY(CORTEX_PRIORITY_PENDSV)
@@ -164,6 +164,17 @@
 #define CORTEX_BASEPRI_KERNEL   CORTEX_PRIORITY_MASK(CORTEX_PRIORITY_SVCALL+1)
 #endif
 
+/**
+ * @brief   Stack alignment enforcement.
+ * @note    The default value is 64 in order to comply with EABI, reducing
+ *          the value to 32 can save some RAM space if you don't care about
+ *          binary compatibility with EABI compiled libraries.
+ * @note    Allowed values are 32 or 64.
+ */
+#ifndef CORTEX_STACK_ALIGNMENT
+#define CORTEX_STACK_ALIGNMENT  64
+#endif
+
 /*===========================================================================*/
 /* Port exported info.                                                       */
 /*===========================================================================*/
@@ -211,9 +222,15 @@
 /*===========================================================================*/
 
 /**
- * @brief   32 bits stack and memory alignment enforcement.
+ * @brief   Stack and memory alignment enforcement.
  */
-typedef uint32_t stkalign_t;
+#if (CORTEX_STACK_ALIGNMENT == 64) || defined(__DOXYGEN__)
+typedef uint64_t stkalign_t __attribute__ ((aligned (8)));
+#elif CORTEX_STACK_ALIGNMENT == 32
+typedef uint32_t stkalign_t __attribute__ ((aligned (4)));
+#else
+#error "invalid stack alignment selected"
+#endif
 
 /**
  * @brief   Generic ARM register.
diff --git a/readme.txt b/readme.txt
index 6aabf751e..9e87eba3a 100644
--- a/readme.txt
+++ b/readme.txt
@@ -58,6 +58,10 @@
 *** Releases                                                              ***
 *****************************************************************************
 
+*** 2.1.1 ***
+- FIX: Added option to enforce the stack alignment to 32 or 64 bits in the
+  Cortex-Mx port (bug 3025133)(backported to 2.0.2).
+
 *** 2.1.0 ***
 - FIX: Fixed notification order in input queues (bug 3020708)(backported in
   2.0.1).