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Fixed bug #838. 

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@10202 35acf78f-673a-0410-8e92-d51de3d6d3f4
This commit is contained in:
Giovanni Di Sirio 2017-05-27 14:44:33 +00:00
parent b9df092c8c
commit f269531a40
2 changed files with 10 additions and 8 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

16
os/hal/ports/STM32/LLD/USARTv1/hal_uart_lld.c
View File

@ -565,10 +565,10 @@ void uart_lld_start(UARTDriver *uartp) {
if (&UARTD4 == uartp) {
bool b;
chDbgAssert((uartp->config->cr2 & STM32_UART45_CR2_CHECK_MASK) == 0,
"specified invalid bits in UART4 CR2 register settings");
chDbgAssert((uartp->config->cr3 & STM32_UART45_CR3_CHECK_MASK) == 0,
"specified invalid bits in UART4 CR3 register settings");
osalDbgAssert((uartp->config->cr2 & STM32_UART45_CR2_CHECK_MASK) == 0,
"specified invalid bits in UART4 CR2 register settings");
osalDbgAssert((uartp->config->cr3 & STM32_UART45_CR3_CHECK_MASK) == 0,
"specified invalid bits in UART4 CR3 register settings");
b = dmaStreamAllocate(uartp->dmarx,
STM32_UART_UART4_IRQ_PRIORITY,
@ -591,10 +591,10 @@ void uart_lld_start(UARTDriver *uartp) {
if (&UARTD5 == uartp) {
bool b;
chDbgAssert((uartp->config->cr2 & STM32_UART45_CR2_CHECK_MASK) == 0,
"specified invalid bits in UART5 CR2 register settings");
chDbgAssert((uartp->config->cr3 & STM32_UART45_CR3_CHECK_MASK) == 0,
"specified invalid bits in UART5 CR3 register settings");
osalDbgAssert((uartp->config->cr2 & STM32_UART45_CR2_CHECK_MASK) == 0,
"specified invalid bits in UART5 CR2 register settings");
osalDbgAssert((uartp->config->cr3 & STM32_UART45_CR3_CHECK_MASK) == 0,
"specified invalid bits in UART5 CR3 register settings");
b = dmaStreamAllocate(uartp->dmarx,
STM32_UART_UART5_IRQ_PRIORITY,

2
readme.txt
View File

@ -161,6 +161,8 @@
- RT: Merged RT4.
- NIL: Merged NIL2.
- NIL: Added STM32F7 demo.
- HAL: Fixed dependency to kernel in uart lld (v1) (bug #838)(backported
to 16.1.9).
- HAL: Fixed STM32 OTGv1 number of endpoints (bug #833)(backported to 16.1.8).
- HAL: Fixed transaction end problem with STM32 OTGv1 driver (bug #832)
(backported to 16.1.8).