Fixed bug #680.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@8573 35acf78f-673a-0410-8e92-d51de3d6d3f4
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@ -358,7 +358,7 @@ void adc_lld_init(void) {
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#endif
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ADCD3.dmastp = STM32_DMA2_STREAM5;
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ADCD3.dmamode = ADC_DMA_SIZE |
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STM32_DMA_CR_PL(STM32_ADC_ADC12_DMA_PRIORITY) |
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STM32_DMA_CR_PL(STM32_ADC_ADC34_DMA_PRIORITY) |
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STM32_DMA_CR_DIR_P2M |
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STM32_DMA_CR_MINC | STM32_DMA_CR_TCIE |
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STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE;
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@ -419,7 +419,6 @@ void adc_lld_start(ADCDriver *adcp) {
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/* Clock source setting.*/
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adcp->adcc->CCR = STM32_ADC_ADC12_CLOCK_MODE | ADC_DMA_MDMA;
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/* Differential channels setting.*/
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#if STM32_ADC_DUAL_MODE
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adcp->adcm->DIFSEL = adcp->config->difsel;
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@ -267,34 +267,35 @@
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}
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/** @} */
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/**
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* @name ADC peripherals specific RCC operations
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* @{
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*/
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/**
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* @brief Enables ADC peripherals clock.
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* @brief Enables the ADC1/ADC2/ADC3 peripheral clock.
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*
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* @param[in] lp low power enable flag
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*
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* @api
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*/
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#define rccEnableADC(lp) rccEnableAHB2(RCC_AHB2ENR_ADCEN, lp)
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#define rccEnableADC123(lp) rccEnableAHB2(RCC_AHB2ENR_ADCEN, lp)
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/**
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* @brief Disables ADC peripherals clock.
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* @brief Disables the ADC1/ADC2/ADC3 peripheral clock.
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*
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* @param[in] lp low power enable flag
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*
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* @api
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*/
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#define rccDisableADC(lp) rccDisableAHB2(RCC_AHB2ENR_ADCEN, lp)
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#define rccDisableADC123(lp) rccDisableAHB2(RCC_AHB2ENR_ADCEN, lp)
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/**
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* @brief Resets ADC peripherals.
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* @brief Resets the ADC1/ADC2/ADC3 peripheral.
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*
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* @api
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*/
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#define rccResetADC() rccResetAHB2(RCC_AHB2RSTR_ADCRST)
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#define rccResetADC123() rccResetAHB2(RCC_AHB2RSTR_ADCRST)
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/** @} */
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/**
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@ -137,6 +137,8 @@
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- HAL: Updated STM32F0xx headers to STM32CubeF0 version 1.3.0. Added support
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for STM32F030xC, STM32F070x6, STM32F070xB, STM32F091xC,
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STM32F098xx devices.
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- HAL: Fixed wrong DMA priority assigned to STM32F3 ADC3&4 (bug #680)
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(backported to 3.0.4 and 2.6.10).
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- HAL: Fixed invalid DMA settings in STM32 DACv1 driver in dual mode
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(bug #677)(backported to 3.0.4).
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- HAL: Fixed usbStop() hangs in STM32 OTGv1 driver (bug #674)(backported
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