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ChibiOS
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Fixed bug #680. 

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@8573 35acf78f-673a-0410-8e92-d51de3d6d3f4
This commit is contained in:
Giovanni Di Sirio 2015-12-10 14:19:45 +00:00
parent 3842ff446c
commit f33a1bf193
3 changed files with 10 additions and 8 deletions
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3
os/hal/ports/STM32/STM32F3xx/adc_lld.c
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@ -358,7 +358,7 @@ void adc_lld_init(void) {
#endif #endif
ADCD3.dmastp = STM32_DMA2_STREAM5; ADCD3.dmastp = STM32_DMA2_STREAM5;
ADCD3.dmamode = ADC_DMA_SIZE | ADCD3.dmamode = ADC_DMA_SIZE |
STM32_DMA_CR_PL(STM32_ADC_ADC12_DMA_PRIORITY) | STM32_DMA_CR_PL(STM32_ADC_ADC34_DMA_PRIORITY) |
STM32_DMA_CR_DIR_P2M | STM32_DMA_CR_DIR_P2M |
STM32_DMA_CR_MINC | STM32_DMA_CR_TCIE | STM32_DMA_CR_MINC | STM32_DMA_CR_TCIE |
STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE; STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE;
@ -419,7 +419,6 @@ void adc_lld_start(ADCDriver *adcp) {
/* Clock source setting.*/ /* Clock source setting.*/
adcp->adcc->CCR = STM32_ADC_ADC12_CLOCK_MODE | ADC_DMA_MDMA; adcp->adcc->CCR = STM32_ADC_ADC12_CLOCK_MODE | ADC_DMA_MDMA;
/* Differential channels setting.*/ /* Differential channels setting.*/
#if STM32_ADC_DUAL_MODE #if STM32_ADC_DUAL_MODE
adcp->adcm->DIFSEL = adcp->config->difsel; adcp->adcm->DIFSEL = adcp->config->difsel;

13
os/hal/ports/STM32/STM32L4xx/stm32_rcc.h
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@ -267,34 +267,35 @@
} }
/** @} */ /** @} */
/** /**
* @name ADC peripherals specific RCC operations * @name ADC peripherals specific RCC operations
* @{ * @{
*/ */
/** /**
* @brief Enables ADC peripherals clock. * @brief Enables the ADC1/ADC2/ADC3 peripheral clock.
* *
* @param[in] lp low power enable flag * @param[in] lp low power enable flag
* *
* @api * @api
*/ */
#define rccEnableADC(lp) rccEnableAHB2(RCC_AHB2ENR_ADCEN, lp) #define rccEnableADC123(lp) rccEnableAHB2(RCC_AHB2ENR_ADCEN, lp)
/** /**
* @brief Disables ADC peripherals clock. * @brief Disables the ADC1/ADC2/ADC3 peripheral clock.
* *
* @param[in] lp low power enable flag * @param[in] lp low power enable flag
* *
* @api * @api
*/ */
#define rccDisableADC(lp) rccDisableAHB2(RCC_AHB2ENR_ADCEN, lp) #define rccDisableADC123(lp) rccDisableAHB2(RCC_AHB2ENR_ADCEN, lp)
/** /**
* @brief Resets ADC peripherals. * @brief Resets the ADC1/ADC2/ADC3 peripheral.
* *
* @api * @api
*/ */
#define rccResetADC() rccResetAHB2(RCC_AHB2RSTR_ADCRST) #define rccResetADC123() rccResetAHB2(RCC_AHB2RSTR_ADCRST)
/** @} */ /** @} */
/** /**

2
readme.txt
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@ -137,6 +137,8 @@
- HAL: Updated STM32F0xx headers to STM32CubeF0 version 1.3.0. Added support - HAL: Updated STM32F0xx headers to STM32CubeF0 version 1.3.0. Added support
for STM32F030xC, STM32F070x6, STM32F070xB, STM32F091xC, for STM32F030xC, STM32F070x6, STM32F070xB, STM32F091xC,
STM32F098xx devices. STM32F098xx devices.
- HAL: Fixed wrong DMA priority assigned to STM32F3 ADC3&4 (bug #680)
(backported to 3.0.4 and 2.6.10).
- HAL: Fixed invalid DMA settings in STM32 DACv1 driver in dual mode - HAL: Fixed invalid DMA settings in STM32 DACv1 driver in dual mode
(bug #677)(backported to 3.0.4). (bug #677)(backported to 3.0.4).
- HAL: Fixed usbStop() hangs in STM32 OTGv1 driver (bug #674)(backported - HAL: Fixed usbStop() hangs in STM32 OTGv1 driver (bug #674)(backported